专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06691278B1 Detecting errors in coded bit strings 有权
标题翻译：检测编码位串中的错误
公开(公告)号：US06691278B1
公开(公告)日：2004-02-10
申请号：US09418210
申请日：1999-10-13
申请人： Ara Patapoutian , Ba-Zhong Shen , Peter McEwen , Michael Leis
发明人： Ara Patapoutian , Ba-Zhong Shen , Peter McEwen , Michael Leis
IPC分类号： G06F1100
CPC分类号： H03M13/09 , G11B20/1833 , G11B2220/2562 , H03M13/11 , H03M13/15 , H03M13/3944 , H03M13/41
摘要： A parity check matrix is generated for detecting predefined errors in a coded string of bits. A column of the matrix is generated by selecting values for elements in the column and processing a predefined error with the selected values in order to produce a syndrome. The selected values are assigned to the column of the parity check matrix if an element of the syndrome has a value indicative of the predefined error.
摘要翻译：生成奇偶校验矩阵以检测编码比特串中的预定义错误。通过选择列中的元素的值并使用所选值处理预定义的错误来产生矩阵的列，以产生综合征。如果校正子的元素具有指示预定义错误的值，则将所选择的值分配给奇偶校验矩阵的列。

2. 发明授权

US06810485B2 Determining the timing of a data signal 失效
标题翻译：确定数据信号的时序
公开(公告)号：US06810485B2
公开(公告)日：2004-10-26
申请号：US09755252
申请日：2001-01-04
申请人： Peter McEwen , Ara Patapoutian , Ke Han
发明人： Peter McEwen , Ara Patapoutian , Ke Han
IPC分类号： G06F104
CPC分类号： G11B20/1403 , G11B20/10296 , G11B20/1426
摘要： Determining a phase error in a data signal includes detecting bits in an original data signal, determining a phase error in the original data signal based on the detected bits, adjusting a clock signal based on the phase error, sampling the original data signal with the clock signal to produce a sampled data signal, and repeating detecting, determining, adjusting and sampling using the sampled data signal instead of the original data signal.
摘要翻译：确定数据信号中的相位误差包括检测原始数据信号中的位，基于检测到的位确定原始数据信号中的相位误差，基于相位误差调整时钟信号，用时钟采样原始数据信号信号以产生采样数据信号，并且使用采样数据信号代替原始数据信号来重复检测，确定，调整和采样。

3. 发明授权

US06882604B2 Method and apparatus for utilizing modulation codes that produce maximized sample timing information 有权
标题翻译：用于利用产生最大化采样定时信息的调制码的方法和装置
公开(公告)号：US06882604B2
公开(公告)日：2005-04-19
申请号：US09953845
申请日：2001-09-17
申请人： Ara Patapoutian , Peter McEwen
发明人： Ara Patapoutian , Peter McEwen
IPC分类号： G11B5/09 , G11B20/10 , G11B20/14 , G11B20/18 , G11B7/00 , H04J13/02
CPC分类号： G11B20/10037 , G11B5/09 , G11B20/10009 , G11B20/10296 , G11B20/1403 , G11B20/1426 , G11B20/1833
摘要： The invention is a modulation system that encodes symbols in accordance with a modulation code which, for a given communications channel, produces a signal that at the decoder includes maximized sample timing information in each encoded symbol. For systems that use PLLs to control a sample timing clock, the sample timing information is the average or squared slope. The modulation code used for a given system is selected based on the target response h(x) of the associated communications channel, such that h (x)*rk exceeds a predetermined threshold value, where “*” represents convolution and rk is a modulation code symbol. To reduce the bit overhead, or code rate, the inventive modulation system provides more modulation code symbols at the start of a data block, or sector, when system jitter is expected to be relatively high in response, for example, to the movement of a read head. The system then includes fewer modulation code symbols later in the block, when the system jitter associated with a read or receive operation is reduced. The system thus provides sufficient timing information to minimize PLL jitter.
摘要翻译：本发明是一种调制系统，其根据调制码对符号进行编码，对于给定的通信信道，调制码产生一个在解码器处包括每个编码符号中的最大化采样定时信息的信号。对于使用PLL来控制采样定时时钟的系统，采样定时信息是平均或平方斜率。用于给定系统的调制码基于相关通信信道的目标响应h（x）被选择，使得h（x）* r≠k超过预定阈值，其中“* “表示卷积，r＆lt; k＆gt;是调制码符号。为了减少比特开销或码率，本发明的调制系统在数据块或扇区的开始处提供更多的调制码符号，当系统抖动被预期相对较高时，例如对于a的移动读头当与读取或接收操作相关联的系统抖动减小时，该系统随后在块中包括更少的调制码符号。因此，该系统提供足够的定时信息以最小化PLL抖动。

4. 发明授权

US06728894B2 System and method for clock adjustment by subsequently detecting a target bit of data stream, re-adjusting, and correcting clock based on difference in detected bit 有权
标题翻译：通过随后检测数据流的目标位置，根据检测到的位的差异重新调整和校正时钟来进行时钟调整的系统和方法
公开(公告)号：US06728894B2
公开(公告)日：2004-04-27
申请号：US09785430
申请日：2001-02-16
申请人： Peter McEwen , Ara Patapoutian , Ke Han , Eduardo Veiga , Jeffrey L. Sonntag
发明人： Peter McEwen , Ara Patapoutian , Ke Han , Eduardo Veiga , Jeffrey L. Sonntag
IPC分类号： G06F1100
CPC分类号： G11B20/1403 , H03L7/091
摘要： Adjusting a clock signal includes receiving a data stream, detecting a bit in the data stream using a first amount of data in the data stream, adjusting the clock signal based on the detected bit, detecting the bit in the data stream using a second amount of data in the data stream, the second amount of data comprising more data than the first amount of data, and correcting the clock signal if a result of initial detecting differs from a result of subsequent detecting.
摘要翻译：调整时钟信号包括接收数据流，使用数据流中的第一数据量来检测数据流中的位，基于检测到的位来调整时钟信号，使用第二量的数据流检测数据流中的位数据流中的数据，第二数据量包括比第一数据量多的数据，以及如果初始检测结果与随后检测的结果不同，则校正时钟信号。

5. 发明授权

US06587291B2 Asynchronously sampling wide bi-phase codes 有权
公开(公告)号：US06587291B2
公开(公告)日：2003-07-01
申请号：US09850610
申请日：2001-05-07
申请人： Ara Patapoutian , Peter McEwen , Eduardo Veiga , Bruce D. Buch
发明人： Ara Patapoutian , Peter McEwen , Eduardo Veiga , Bruce D. Buch
IPC分类号： G11B509
CPC分类号： G11B5/59688
摘要： Sampling data with wide bi-phase code symbols includes sampling a wide bi-phase code symbol in the data a number (N) of times to produce samples of data, selecting a subset of the samples, determining which sample in the subset of samples has a largest magnitude, and selecting a subset of samples in a subsequent wide bi-phase code symbol based on a sample in a previous subset that has the largest magnitude.

6. 发明授权

US06184806B2 Rate 32/33 (D=0, K=6) run length limited modulation code having optimized error propagation 失效
标题翻译：速率32/33（D = 0，K = 6）游程长度限制调制码具有优化的误差传播
公开(公告)号：US06184806B2
公开(公告)日：2001-02-06
申请号：US09042243
申请日：1998-03-13
申请人： Ara Patapoutian , Jennifer Stander , Peter McEwen , Bahjat Zafer , James Fitzpatrick
发明人： Ara Patapoutian , Jennifer Stander , Peter McEwen , Bahjat Zafer , James Fitzpatrick
IPC分类号： H03M700
CPC分类号： H03M5/145 , G11B5/09 , G11B20/10009 , G11B20/10055
摘要： A method and apparatus for encoding a sequence of 32 bit digital data words into a sequence of 33 bit code words in consonance with predetermined minimum zero run length (d) and predetermined maximum zero run length (k) for recording upon a magnetic medium within a magnetic recording channel is disclosed. The method comprises steps of dividing each data word into eight data nibbles, determining whether any data nibble contains all zeros. If no code violation, mapping the eight data nibbles to seven code nibbles and to four bits of a five bit code sub-word and setting a fifth control bit to one. If one or more code violations are present, embedding code violation locations within at least the five bit code sub-word and other code nibbles if necessary and remapping data nibbles ordinarily directed to the code sub-word and nibble locations to code locations otherwise containing the data nibbles determined to be code violations.
摘要翻译：一种用于将32位数字数据字序列编码成符合预定的最小零游程长度（d）和预定的最大零游程长度（k）的33位码字序列的方法和装置，用于在一个磁记录通道被公开。该方法包括以下步骤：将每个数据字划分为八个数据半字节，确定任何数据半字节是否包含全部零。如果没有代码违例，则将八个数据半字节映射到七个代码半字节，并将五位代码子字的四位映射到一位。如果存在一个或多个代码违例，则在必要时将代码违反位置嵌入到至少五位代码子字和其他代码半字节中，并且将通常指向代码子字和半字节位置的数据半字节重新映射到代码位置，否则包含数据半字节被确定为代码违例。

7. 发明授权

US06259384B1 High rate runlength limited codes for 10-bit ECC symbols 有权
标题翻译： 10位ECC符号的高速率游程限制码
公开(公告)号：US06259384B1
公开(公告)日：2001-07-10
申请号：US09350685
申请日：1999-07-09
申请人： Peter McEwen , Kelly Fitzpatrick , Bahjat Zafar
发明人： Peter McEwen , Kelly Fitzpatrick , Bahjat Zafar
IPC分类号： H03M700
CPC分类号： H03M7/46 , G11B5/09
摘要： A methodology for designing and implementing high rate RLL codes is optimized for application to 10-bit ECC symbols, and provides rate 30/31, rate 40/41, rate 50/51 and much higher modulation code rates for use in magnetic recording channels. A relatively small subcode encoding—one easy to implement—is applied to a portion of the input stream, and the resulting base codeword is partitioned into nibbles that, in turn, are interleaved among the unencoded ECC symbols. Code constraints on the subcode word nibbles depend upon the values of adjacent unencoded symbols. The resulting codes provide excellent density and error propagation performance.
摘要翻译：用于设计和实现高速率RLL代码的方法被优化用于应用于10位ECC符号，并且提供用于磁记录通道的速率30/31，速率40/41，速率50/51和更高的调制码率。一个易于实现的相对较小的子代码编码被应用到输入流的一部分，并且所得到的基本码字被分割成半字节，其进而在未经编码的ECC符号之间进行交织。子代码字半字节上的代码约束取决于相邻未编码符号的值。所得到的代码提供了出色的密度和误差传播性能。

8. 发明授权

US06738205B1 Self-writing of servo patterns in disk drives 有权
标题翻译：在磁盘驱动器中自动写入伺服模式
公开(公告)号：US06738205B1
公开(公告)日：2004-05-18
申请号：US09903445
申请日：2001-07-08
申请人： Patrick Moran , Tim Everett , Peter McEwen , Mike Moser , Stan Shepherd , Eduardo Gentile Veiga , Murat Erkocevic , Bill Baker
发明人： Patrick Moran , Tim Everett , Peter McEwen , Mike Moser , Stan Shepherd , Eduardo Gentile Veiga , Murat Erkocevic , Bill Baker
IPC分类号： G11B586
CPC分类号： G11B5/865 , G11B5/59633
摘要： A method and system for self-servo writing a disk drive by transferring a servo reference pattern by magnetic printing onto at least one storage surface of a reference disk, wherein a resulting printed reference pattern includes embedded servo information providing servo timing and transducer head position information; assembling the disk drive including the steps of installing at least said disk into the disk drive and enclosing said disk and the data transducers within a housing sealed against particulate contamination from an eternal ambient environment; reading the printed reference pattern from said disk via at least one transducer head to generate a readback signal; sampling the readback signal at a sampling rate to generate a sampled signal; processing the sampled signal waveform specturm to generate a recovered signal including the embedded servo information and a fundamental frequency of the sampled signal; using the servo information from the recovered signal to precisely position and maintain the data transducers at concentric track locations of disk storage surfaces; and self-writing disk drive servo patterns onto the storage surfaces at the concentric track locations with the data transducers in accordance with disk drive servo pattern features.
摘要翻译：一种用于通过磁性印刷将伺服参考图案转移到参考盘的至少一个存储表面上来自动伺服写入磁盘驱动器的方法和系统，其中所得到的打印参考图案包括提供伺服定时和换能器头部位置信息的嵌入式伺服信息 ; 组装磁盘驱动器包括以下步骤：至少将所述磁盘安装到磁盘驱动器中，并将所述磁盘和数据传感器封装在壳体内，密封以防止来自永恒环境环境的颗粒污染物; 经由至少一个换能器头从所述盘读取打印的参考图案以产生回读信号; 以采样率对回读信号进行采样以产生采样信号; 处理采样信号波形谱以产生包括嵌入伺服信息和采样信号的基频的恢复信号; 使用来自恢复信号的伺服信息来精确地将数据传感器定位并保持在盘存储表面的同心轨迹位置; 以及根据磁盘驱动器伺服模式特征，使用数据传感器在同心轨道位置的存储表面上自写盘驱动器伺服模式。

9. 发明授权

US07089483B2 Two stage detector having viterbi detector matched to a channel and post processor matched to a channel code 有权
标题翻译：具有与通道和后处理器匹配的维特比检测器的两级检测器与通道代码匹配
公开(公告)号：US07089483B2
公开(公告)日：2006-08-08
申请号：US10793414
申请日：2004-03-04
申请人： Peter McEwen , Kelly Fitzpatrick
发明人： Peter McEwen , Kelly Fitzpatrick
IPC分类号： H03M13/03
CPC分类号： H04L1/0071 , G11B20/18 , G11B2020/1863 , H03M13/41 , H03M13/6331 , H03M13/6343 , H03M13/6502 , H04L1/0054
摘要： A two-stage sampling data detector for a partial response channel having a channel code encoder for encoding user information sequences into blocks of code words in accordance with a predetermined channel block code characterized by a list of most likely error-events comprising impermissible code words. The detector includes a first-stage detector, such as a Viterbi detector, connected to receive samples from the partial response channel and matched to characteristics of the channel and not to the channel code, puts out unchecked bit estimates. A second stage post-processor checks the bit estimates in relation to derived detector decision metrics information and the channel block code, and puts out post-processed bit estimates to a channel code decoder after correcting detected erroneous sequences in accordance with the decision metrics information, information derived from the channel code, and the list of most likely error-events. A method for generating the channel block code is also described.
摘要翻译：一种用于部分响应信道的两级采样数据检测器，具有信道码编码器，用于根据预定信道块码将用户信息序列编码成码字块，其特征在于包含不允许码字的最可能的错误事件列表。该检测器包括第一级检测器，例如维特比检测器，其被连接以接收来自部分响应信道的样本，并且与信道的特征匹配，而不是与信道码匹配，输出未检查的比特估计。第二级后处理器相对于导出的检测器判定度量信息和信道块码检查比特估计，并且根据决策度量信息校正检测到的错误序列之后，向信道码解码器输出后处理比特估计，从信道码导出的信息，以及最可能的错误事件的列表。还描述了用于产生信道块码的方法。

10. 发明授权

US06417788B1 High rate runlength limited codes for 10-bit ECC symbols 有权
标题翻译： 10位ECC符号的高速率游程限制码
公开(公告)号：US06417788B1
公开(公告)日：2002-07-09
申请号：US09803401
申请日：2001-03-09
申请人： Peter McEwen , Kelly K Fitzpatrick , Bahjat M. Zafer
发明人： Peter McEwen , Kelly K Fitzpatrick , Bahjat M. Zafer
IPC分类号： H03M700
CPC分类号： G11B5/09 , H03M7/46
摘要： A methodology for designing an implementing high rate RLL codes is optimized for application to 10-bit ECC symbols, and provides rate 20/21, rate 50/51, rate 90/91 and other modulation code rates for use in magnetic recording channels. A relatively small subcode encoding—one easy to implement—is applied to a portion of the input stream, and the resulting base codeword is partitioned into nibbles that, in turn, are interleaved among the unencoded ECC symbols. Code constraints on the subcode word nibbles depend upon the values of adjacent unencoded symbols. The resulting codes provide excellent density and error propagation performance.
摘要翻译：用于设计实现的高速率RLL码的方法被优化用于应用于10位ECC符号，并提供用于磁记录通道的速率20/21，速率50/51，速率90/91和其他调制码率。一个易于实现的相对较小的子代码编码被应用到输入流的一部分，并且所得到的基本码字被分割成半字节，其进而在未经编码的ECC符号之间进行交织。子代码字半字节上的代码约束取决于相邻未编码符号的值。所得到的代码提供了出色的密度和误差传播性能。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式