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    • 1. 发明专利
    • Apparatus for electroless deposition of metal onto semiconductor substrate
    • 用于金属沉积在半导体基板上的电沉积装置
    • JP2007046156A
    • 2007-02-22
    • JP2006186953
    • 2006-07-06
    • Applied Materials Incアプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated
    • LUBOMIRSKY DMITRYSHANMUGASUNDRAM ARULKUMARPANCHAM IAN A
    • C23C18/31C23C18/16H01L21/02
    • PROBLEM TO BE SOLVED: To provide an integrated electroless deposition apparatus that can deposit a uniform layer with minimum defects. SOLUTION: An electroless deposition system and an electroless deposition station are provided. The system includes a processing mainframe, at least one substrate cleaning station positioned on the mainframe, and an electroless deposition station positioned on the mainframe. The electroless deposition station includes an environmentally controlled processing enclosure, a first processing station configured to clean and activate the surface of the substrate, a second processing station configured to electrolessly deposit a layer onto the surface of the substrate, and a substrate shuttle positioned to transfer the substrate between the first and second processing stations. The electroless deposition station also includes various fluid delivery devices and substrate temperature controlling devices to perform a contamination-free and uniform electroless deposition process. COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:提供一种能够以最小缺陷沉积均匀层的集成无电沉积装置。 解决方案:提供无电沉积系统和无电沉积站。 该系统包括处理主机,位于主机上的至少一个基板清洗台和位于主机上的无电沉积站。 无电沉积站包括环境受控的处理外壳,第一处理站被配置为清洁和激活基板的表面;第二处理站,被配置为将层无电沉积到基板的表面上;以及基板梭, 第一和第二处理站之间的基板。 无电沉积站还包括各种流体输送装置和基板温度控制装置,以执行无污染和均匀的无电沉积工艺。 版权所有(C)2007,JPO&INPIT
    • 8. 发明专利
    • AT362127T
    • 2007-06-15
    • AT02746974
    • 2002-07-12
    • APPLIED MATERIALS INC
    • REISS TERRYSHANMUGASUNDRAM ARULKUMARSCHWARM ALEXANDER
    • G05B19/418H01L21/02G05B23/02G06F19/00H01L21/00H01L21/66
    • Semiconductor wafers are processed in conjunction with a manufacturing execution system using a run-to-run controller and a fault detection system. A recipe is received from the manufacturing execution system by the run-to-run controller for controlling a tool. The recipe includes a setpoint for obtaining one or more target wafer properties. Processing of the wafers is monitored by measuring processing attributes including fault conditions and wafer properties using the fault detection system and one or more sensors. Setpoints of the recipe may be modified at the run-to-run controller according to the processing attributes to maintain the target wafer properties, except in cases when a fault condition is detected by the fault detection system. Thus, data acquired in the presence of tool or wafer fault conditions are not used for feedback purposes. In addition, fault detection models may be used to define a range of conditions indicative of a fault condition. In these cases, the fault detection models may be modified to incorporate, as parameters, setpoints of a recipe modified by a run-to-run controller.