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1. 发明授权

US11211036B2 Timestamp based display update mechanism 有权
公开(公告)号：US11211036B2
公开(公告)日：2021-12-28
申请号：US16919495
申请日：2020-07-02
申请人： Apple Inc.
发明人： Brijesh Tripathi , Arthur L. Spence , Joshua P. de Cesare , Ilie Garbacea , Guy Cote , Mahesh B. Chappalli , Malcolm D. Gray , Christopher P. Tann
IPC分类号： G09G5/39 , G09G5/395 , G06F3/14 , G06F3/147
摘要： Systems, apparatuses, and methods for implementing a timestamp based display update mechanism. A display control unit includes a timestamp queue for storing timestamps, wherein each timestamp indicates when a corresponding frame configuration set should be fetched from memory. At pre-defined intervals, the display control unit may compare the timestamp of the topmost entry of the timestamp queue to a global timer value. If the timestamp is earlier than the global timer value, the display control unit may pop the timestamp entry and fetch the frame next configuration set from memory. The display control unit may then apply the updates of the frame configuration set to its pixel processing elements. After applying the updates, the display control unit may fetch and process the source pixel data and then drive the pixels of the next frame to the display.

2. 发明申请

US20210341317A1 System on a Chip with Always-On Processor 有权
公开(公告)号：US20210341317A1
公开(公告)日：2021-11-04
申请号：US17372764
申请日：2021-07-12
申请人： Apple Inc.
发明人： Brijesh Tripathi , Shane J. Keil , Manu Gulati , Jung Wook Cho , Erik P. Machnicki , Gilbert H. Herbeck , Timothy J. Millet , Joshua P. de Cesare , Anand Dalal
IPC分类号： G01D9/00 , G06F13/16 , G06F1/3293 , G06F1/3206 , G06F1/3287
摘要： In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

3. 发明授权

US10261894B2 System on a chip with always-on processor which reconfigures SOC and supports memory-only communication mode 有权
公开(公告)号：US10261894B2
公开(公告)日：2019-04-16
申请号：US15447328
申请日：2017-03-02
申请人： Apple Inc.
发明人： Brijesh Tripathi , Shane J. Keil , Manu Gulati , Jung Wook Cho , Erik P. Machnicki , Gilbert H. Herbeck , Timothy J. Millet , Joshua P. de Cesare , Anand Dalal
IPC分类号： G06F12/02 , G06F12/06 , G06F1/32 , G06F3/06 , G06F9/44 , G06F13/16 , G06F13/40 , G11C11/406 , G06F1/3206 , G06F1/3287 , G06F1/3293 , G06F9/4401 , G06F13/42
摘要： In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

4. 发明申请

US20180366078A1 Electronic Device Display With Charge Accumulation Tracker 审中-公开
公开(公告)号：US20180366078A1
公开(公告)日：2018-12-20
申请号：US16113132
申请日：2018-08-27
申请人： Apple Inc.
发明人： Chaohao Wang , Brijesh Tripathi , Christopher Philip Alan Tann , David S. Zalatimo , Guy Cote , Hao Nan , Marc Albrecht , Paolo Sacchetto , Sandro H. Pintz
IPC分类号： G09G3/36
摘要： An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

5. 发明授权

US10102815B2 Electronic device display with charge accumulation tracker 有权
公开(公告)号：US10102815B2
公开(公告)日：2018-10-16
申请号：US15890517
申请日：2018-02-07
申请人： Apple Inc.
发明人： Chaohao Wang , Brijesh Tripathi , Christopher Philip Alan Tann , David S. Zalatimo , Guy Cote , Hao Nan , Marc Albrecht , Paolo Sacchetto , Sandro H. Pintz
IPC分类号： G09G3/36
摘要： An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

6. 发明授权

US10031000B2 System on a chip with always-on processor 有权
公开(公告)号：US10031000B2
公开(公告)日：2018-07-24
申请号：US14458885
申请日：2014-08-13
申请人： Apple Inc.
发明人： Brijesh Tripathi , Shane J. Keil , Manu Gulati , Jung Wook Cho , Erik P. Machnicki , Gilbert H. Herbeck , Timothy J. Millet , Joshua P. de Cesare , Anand Dalal
IPC分类号： G06F1/32 , G01D9/00 , G06F13/16
CPC分类号： G01D9/00 , G06F1/3206 , G06F1/3287 , G06F1/3293 , G06F13/1689 , Y02D10/122 , Y02D10/171 , Y02D50/20
摘要： In an embodiment, a system on a chip (SOC) includes a component that remains powered when the remainder of the SOC is powered off. The component may include a sensor capture unit to capture data from various device sensors, and may filter the captured sensor data. Responsive to the filtering, the component may wake up the remainder of the SOC to permit the processing. The component may store programmable configuration data, matching the state at the time the SOC was most recently powered down, for the other components of the SOC, in order to reprogram them after wakeup. In some embodiments, the component may be configured to wake up the memory controller within the SOC and the path to the memory controller, in order to write the data to memory. The remainder of the SOC may remain powered down.

7. 发明授权

US09658634B2 Under voltage detection and performance throttling 有权
公开(公告)号：US09658634B2
公开(公告)日：2017-05-23
申请号：US14673326
申请日：2015-03-30
申请人： Apple Inc.
发明人： Brijesh Tripathi , Eric G. Smith , Erik P. Machnicki , Jung Wook Cho , Khaled M. Alashmouny , Kiran B. Kattel , Vijay M. Bettada , Bo Yang , Wenlong Wei
IPC分类号： G06F1/00 , G05F3/02 , G06F1/32
CPC分类号： G05F3/02 , G06F1/324 , G06F1/3296
摘要： An under voltage detection circuit and method of operating an IC including the same is disclosed. In one embodiment, an IC includes an under voltage protection circuit having first and second comparators configured to compare a supply voltage to first and second voltage thresholds, respectively, with the second voltage threshold being greater than the first. A logic circuit is coupled to receive signals from the first and second comparators. During operation in a high performance state by a corresponding functional circuit, the logic circuit is configured to cause assertion of a throttling signal responsive to an indication that the supply voltage has fallen below the first threshold. A clock signal provided to the functional circuit may be throttled responsive to the indication. If the supply voltage subsequently rises to a level above the second threshold, the throttling signal may be de-asserted.

8. 发明授权

US09620081B2 Hardware auxiliary channel for synchronous backlight update 有权
公开(公告)号：US09620081B2
公开(公告)日：2017-04-11
申请号：US14477454
申请日：2014-09-04
申请人： Apple Inc.
发明人： Brijesh Tripathi , Peter F. Holland , Marc Albrecht , Christopher P. Tann
IPC分类号： G09G5/10 , G09G5/36 , G09G3/20 , G09G3/34 , G09G5/12
CPC分类号： G09G5/10 , G09G3/2044 , G09G3/3406 , G09G5/12 , G09G5/36 , G09G2320/0646 , G09G2330/021 , G09G2340/10 , G09G2360/144 , G09G2370/04
摘要： Systems, apparatuses, and methods for synchronizing backlight adjustments to frame updates in a display pipeline. A change in the ambient light is detected and as a result, backlight settings are adjusted. To offset a reduction in the backlight, the color intensity in the frames is increased. While the change in ambient light is detected asynchronously, the adjustment to the backlight settings and color intensity is synchronized to a frame update via a virtual channel for the auxiliary channel of the display interface.

9. 发明授权

US09336563B2 Buffer underrun handling 有权
标题翻译：缓冲区欠载处理
公开(公告)号：US09336563B2
公开(公告)日：2016-05-10
申请号：US14163326
申请日：2014-01-24
申请人： Apple Inc.
发明人： Joseph P. Bratt , Peter F. Holland , Shing Horng Choo , Timothy J. Millet , Brijesh Tripathi
IPC分类号： G09G5/39 , G06T1/60
CPC分类号： G06T1/60 , G09G5/39
摘要： A graphics system may include a display pipe with a buffer configured to store pixels to be processed by a display controller for displaying on a display device, with a buffer control circuit coupled to the buffer to supply pixels to the display controller. When the buffer control circuit detects an underrun of the buffer responsive to the display controller attempting to read pixels from the buffer that have not yet been written to the buffer, the buffer control circuit may supply an underrun pixel to the display. The underrun pixel may be selected from a set of previously stored set of underrun pixels, which may include a most recent valid pixel read by the display controller. A read pointer representative of the location in the buffer from where the display controller is currently attempting to read may be advanced even when an underrun condition occurs. The underrun pixel may be supplied to the display controller until the underrun has been resolved, at which point the most recent valid pixel read from the buffer may be supplied to the display controller.
摘要翻译：图形系统可以包括具有缓冲器的显示管道，缓冲器被配置为存储要由显示控制器处理的像素，用于在显示设备上显示，缓冲器控制电路耦合到缓冲器以向显示控制器提供像素。当缓冲器控制电路响应于显示控制器尝试读取尚未写入缓冲器的缓冲器的像素时，缓冲器控制电路检测到欠载，缓冲器控制电路可以向显示器提供欠载像素。欠载像素可以从先前存储的欠载像素组中选择，其可以包括由显示控制器读取的最新有效像素。即使在出现欠载条件的情况下，代表显示控制器当前尝试读取的缓冲器中的位置的读取指针也可以被提前。欠载像素可以被提供给显示控制器，直到欠载已被解析为止，此时从缓冲器读取的最新的有效像素可以被提供给显示控制器。

10. 发明申请

US20160092010A1 TOUCH, PEN AND FORCE SENSOR OPERATION WITH VARIABLE REFRESH DISPLAYS 有权
标题翻译：触摸屏，笔和传感器操作与可变的刷新显示
公开(公告)号：US20160092010A1
公开(公告)日：2016-03-31
申请号：US14500653
申请日：2014-09-29
申请人： Apple Inc.
发明人： Manu AGARWAL , Christopher Tann , Brijesh Tripathi , Martin Paul Grunthaner
IPC分类号： G06F3/041 , G09G5/18
CPC分类号： G06F3/0412 , G06F3/0416 , G06F2203/04105 , G09G5/12 , G09G2310/04 , G09G2330/022 , G09G2340/0435 , G09G2354/00
摘要： Synchronization of display functions and various touch, stylus and/or force sensing functions for devices including a variable refresh rate (VRR) display is disclosed. In some examples, touch, stylus and/or force sensing functions can be synchronized with display frames and a display refresh rate can be adjusted by extended blanking of the display for one or more display frames. In other examples, touch, stylus and/or force sensing functions can be synchronized with display sub-frames and a display refresh rate can be adjusted by extended blanking of the display for one or more display sub-frames. Pre-warning synchronization signals can be generated to prepare one or more scan controllers to implement the appropriate scan events during and after extended blanking periods. Latency between the scan results and the corresponding image on the display can be corrected in software and/or firmware by time-stamping scan results or by dropping scan results from uncompleted scans.
摘要翻译：公开了显示功能与用于包括可变刷新率（VRR）显示的设备的各种触摸，触笔和/或力感测功能的同步。在一些示例中，触摸，触笔和/或力感测功能可以与显示帧同步，并且可以通过对一个或多个显示帧的显示器的扩展消隐来调整显示刷新率。在其他示例中，触摸，触笔和/或力感测功能可以与显示子帧同步，并且可以通过对一个或多个显示子帧的显示器的扩展消隐来调整显示刷新率。可以生成预警同步信号以准备一个或多个扫描控制器以在延长的消隐期间和之后实施适当的扫描事件。扫描结果与显示器上的相应图像之间的延迟可以通过软件和/或固件通过时间戳扫描结果或通过从未完成的扫描中删除扫描结果进行校正。

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