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1. 发明授权

US08078849B2 Fast execution of branch instruction with multiple conditional expressions using programmable branch offset table 有权
标题翻译：使用可编程分支偏移表快速执行具有多个条件表达式的分支指令
公开(公告)号：US08078849B2
公开(公告)日：2011-12-13
申请号：US12342851
申请日：2008-12-23
申请人： Jeffrey G. Libby , Jean-Marc Frailong , Anurag P. Gupta , John Keen , Avanindra Godbole , Sharada Yeluri
发明人： Jeffrey G. Libby , Jean-Marc Frailong , Anurag P. Gupta , John Keen , Avanindra Godbole , Sharada Yeluri
IPC分类号： G06F9/32
CPC分类号： G06F9/30058 , G06F9/262 , G06F9/3885
摘要： Methods and systems consistent with the present invention provide a programmable table which allows software to define a plurality of branching functions, each of which maps a vector of condition codes to a branch offset. This technique allows for a flexible multi-way branching functionality, using a conditional branch outcome table that can be specified by a programmer. Any instruction can specify the evaluation of arbitrary conditional expressions to compute the values for the condition codes, and can choose a particular branching function. When the processor executes the instruction, the processor's arithmetic/logical functional units evaluate the conditional expressions and then the processor performs the branch operation, according to the specified branching function.
摘要翻译：与本发明一致的方法和系统提供了可编程表，其允许软件定义多个分支功能，每个分支功能将条件代码的向量映射到分支偏移。该技术允许灵活的多路分支功能，使用可由程序员指定的条件分支结果表。任何指令都可以指定任意条件表达式的计算，以计算条件代码的值，并可以选择特定的分支函数。当处理器执行指令时，处理器的算术/逻辑功能单元评估条件表达式，然后处理器根据指定的分支函数执行分支操作。

2. 发明授权

US08520675B1 System and method for efficient packet replication 有权
标题翻译：高效的数据包复制的系统和方法
公开(公告)号：US08520675B1
公开(公告)日：2013-08-27
申请号：US12343276
申请日：2008-12-23
申请人： Jean-Marc Frailong , Jeffrey G. Libby , Anurag P. Gupta , John Keen , Rajesh Nair , Avanindra Godbole , Sharada Yeluri
发明人： Jean-Marc Frailong , Jeffrey G. Libby , Anurag P. Gupta , John Keen , Rajesh Nair , Avanindra Godbole , Sharada Yeluri
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L45/56 , H04L45/16 , H04L49/10 , H04L49/90
摘要： Methods and systems consistent with the present invention provide efficient packet replication in a router in order to multicast a stream of data. Packets are replicated and processed in a multithreaded environment. Embodiments consistent with the present invention implement a two-stage process for packet replication. The first stage thread will recirculate the packet to multiple second-stage threads. These second-stage threads will then create one or more outgoing copies of the packet. In this way, the copies are handled by multiple threads running in parallel.
摘要翻译：与本发明一致的方法和系统在路由器中提供有效的分组复制以便多播数据流。数据包在多线程环境中进行复制和处理。与本发明一致的实施例实现了用于分组复制的两阶段过程。第一级线程将数据包循环到多个第二级线程。这些第二级线程将会创建一个或多个数据包的输出副本。以这种方式，副本由并行运行的多个线程处理。

3. 发明授权

US08799909B1 System and method for independent synchronous and asynchronous transaction requests 有权
标题翻译：用于独立同步和异步事务请求的系统和方法
公开(公告)号：US08799909B1
公开(公告)日：2014-08-05
申请号：US12342985
申请日：2008-12-23
申请人： Jeffrey G. Libby , Jean-Marc Frailong , Avanindra Godbole , Sharada Yeluri , Anurag P. Gupta , John Keen
发明人： Jeffrey G. Libby , Jean-Marc Frailong , Avanindra Godbole , Sharada Yeluri , Anurag P. Gupta , John Keen
IPC分类号： G06F9/00 , G06F9/46
CPC分类号： G06F9/466 , G06F9/3004 , G06F9/30087 , G06F9/3009
摘要： Systems and methods of various embodiments provide mechanisms to support synchronous and asynchronous transactions. Distinct encodings allow an instruction to choose whether to perform any operation synchronously or asynchronously. Separate synchronous and asynchronous result registers hold the data returned in the most recent replies received for synchronous and asynchronous transaction requests, respectively. A status bit indicates whether an asynchronous transaction request is currently outstanding.
摘要翻译：各种实施例的系统和方法提供了支持同步和异步事务的机制。不同的编码允许指令选择是同步还是异步执行任何操作。单独的同步和异步结果寄存器分别保存在同步和异步事务请求中接收的最近的回复中返回的数据。状态位指示异步事务请求当前是否未完成。

4. 发明申请

US20100161949A1 SYSTEM AND METHOD FOR FAST BRANCHING USING A PROGRAMMABLE BRANCH TABLE 有权
标题翻译：使用可编程分支表快速分支的系统和方法
公开(公告)号：US20100161949A1
公开(公告)日：2010-06-24
申请号：US12342851
申请日：2008-12-23
申请人： Anurag P. Gupta , John Keen , Jeffrey G. Libby , Jean-Marc Frailong , Avanindra Godbole , Sharada Yeluri
发明人： Anurag P. Gupta , John Keen , Jeffrey G. Libby , Jean-Marc Frailong , Avanindra Godbole , Sharada Yeluri
IPC分类号： G06F9/38
CPC分类号： G06F9/30058 , G06F9/262 , G06F9/3885
摘要： Methods and systems consistent with the present invention provide a programmable table which allows software to define a plurality of branching functions, each of which maps a vector of condition codes to a branch offset. This technique allows for a flexible multi-way branching functionality, using a conditional branch outcome table that can be specified by a programmer. Any instruction can specify the evaluation of arbitrary conditional expressions to compute the values for the condition codes, and can choose a particular branching function. When the processor executes the instruction, the processor's arithmetic/logical functional units evaluate the conditional expressions and then the processor performs the branch operation, according to the specified branching function.
摘要翻译：与本发明一致的方法和系统提供了可编程表，其允许软件定义多个分支功能，每个分支功能将条件代码的向量映射到分支偏移。该技术允许灵活的多路分支功能，使用可由程序员指定的条件分支结果表。任何指令都可以指定任意条件表达式的计算，以计算条件代码的值，并可以选择特定的分支函数。当处理器执行指令时，处理器的算术/逻辑功能单元评估条件表达式，然后处理器根据指定的分支函数执行分支操作。

5. 发明申请

US20120084534A1 SYSTEM AND METHOD FOR FAST BRANCHING USING A PROGRAMMABLE BRANCH TABLE 有权
标题翻译：使用可编程分支表快速分支的系统和方法
公开(公告)号：US20120084534A1
公开(公告)日：2012-04-05
申请号：US13323358
申请日：2011-12-12
申请人： Anurag P. GUPTA , John Keen , Jeffrey G. Libby , Jean-Marc Frailong , Avanindra Godbole , Sharida Yeluri
发明人： Anurag P. GUPTA , John Keen , Jeffrey G. Libby , Jean-Marc Frailong , Avanindra Godbole , Sharida Yeluri
IPC分类号： G06F9/38 , G06F9/32 , G06F9/312
CPC分类号： G06F9/30058 , G06F9/262 , G06F9/3885
摘要： Methods and systems consistent with the present invention provide a programmable table which allows software to define a plurality of branching functions, each of which maps a vector of condition codes to a branch offset. This technique allows for a flexible multi-way branching functionality, using a conditional branch outcome table that can be specified by a programmer. Any instruction can specify the evaluation of arbitrary conditional expressions to compute the values for the condition codes, and can choose a particular branching function. When the processor executes the instruction, the processor's arithmetic/logical functional units evaluate the conditional expressions and then the processor performs the branch operation, according to the specified branching function.
摘要翻译：与本发明一致的方法和系统提供了可编程表，其允许软件定义多个分支功能，每个分支功能将条件代码的向量映射到分支偏移。该技术允许灵活的多路分支功能，使用可由程序员指定的条件分支结果表。任何指令都可以指定任意条件表达式的计算，以计算条件代码的值，并可以选择特定的分支函数。当处理器执行指令时，处理器的算术/逻辑功能单元评估条件表达式，然后处理器根据指定的分支函数执行分支操作。

6. 发明申请

US20110158124A1 MAINTAINING DATA UNIT ORDER IN A NETWORK SWITCHING DEVICE 有权
标题翻译：维护网络切换设备中的数据单元订单
公开(公告)号：US20110158124A1
公开(公告)日：2011-06-30
申请号：US13045312
申请日：2011-03-10
申请人： Jean-Marc FRAILONG , Sharada Yeluri , Anurag P. Gupta , Jeffrey G. Libby , Edwin Su
发明人： Jean-Marc FRAILONG , Sharada Yeluri , Anurag P. Gupta , Jeffrey G. Libby , Edwin Su
IPC分类号： H04L12/26
CPC分类号： H04L49/552 , H04L49/90 , H04L49/9047 , H04L49/9094
摘要： Data units received by a network device may be classified into traffic flow classes in which the determined traffic flow class for a data unit may be dynamically refined as the data unit is processed by the network device. A dispatch component of the network device may receive data units associated with traffic flow classes. Parallel processing engines of the network device may receive the data units from the dispatch component and may generate, for a least one of the data units, a plurality of dynamically refined indications of the traffic flow class to which the data unit belongs. Additionally, an ordering component of the network device may include a plurality of re-order queues, where the at least one data unit successively progresses through at least two of the re-order queues in an order defined by the plurality of dynamically refined indications of the traffic flow class.
摘要翻译：由网络设备接收的数据单元可以被分类为业务流类别，其中所确定的数据单元的业务流类别可以由网络设备处理数据单元时动态地改进。网络设备的调度组件可以接收与业务流类别相关联的数据单元。网络设备的并行处理引擎可以从调度组件接收数据单元，并且可以为数据单元中的至少一个数据单元生成数据单元所属的业务流类别的多个动态精确的指示。另外，网络设备的排序组件可以包括多个重新排序队列，其中至少一个数据单元以由多个动态精简指示定义的顺序连续地进行至少两个重排队列交通流量类。

7. 发明授权

US08627007B1 Use of cache to reduce memory bandwidth pressure with processing pipeline 有权
标题翻译：使用缓存来减少内存带宽压力与处理流水线
公开(公告)号：US08627007B1
公开(公告)日：2014-01-07
申请号：US12607510
申请日：2009-10-28
申请人： Jianhui Huang , Sharada Yeluri , Jean-Marc Frailong , Jeffrey G. Libby , Anurag P. Gupta , Paul Coelho
发明人： Jianhui Huang , Sharada Yeluri , Jean-Marc Frailong , Jeffrey G. Libby , Anurag P. Gupta , Paul Coelho
IPC分类号： G06F12/00
CPC分类号： G06F12/0855 , G06F12/0815 , G06F12/0868 , G06F12/0891 , G06F12/12 , Y02D10/13
摘要： A data read/write system includes a system clock, a single port memory, a cache memory that is separate from the single port memory, and a controller coupled to an instruction pipeline. The controller receives, via the instruction pipeline, first data to write to an address of the single port memory, and further receives, via the instruction pipeline, a request to read second data from the single port memory. The controller stores the first data in the cache memory, and retrieves the second data from either the cache memory or the single port memory during one or more first clock cycles of the system clock. The controller copies the first data from the cache memory and stores the first data at the address in the single port memory during a second clock cycle of the system clock that is different than the one or more first clock cycles.
摘要翻译：数据读/写系统包括系统时钟，单端口存储器，与单端口存储器分开的高速缓存存储器，以及耦合到指令流水线的控制器。控制器经由指令流水线接收第一数据以写入单端口存储器的地址，并且经由指令流水线接收从单端口存储器读取第二数据的请求。控制器将第一数据存储在高速缓冲存储器中，并且在系统时钟的一个或多个第一时钟周期期间从高速缓冲存储器或单端口存储器检索第二数据。控制器从高速缓冲存储器复制第一数据，并且在系统时钟的不同于一个或多个第一时钟周期的第二时钟周期期间将第一数据存储在单端口存储器中的地址处。

8. 发明授权

US07924860B1 Maintaining data unit order in a network switching device 有权
标题翻译：维护网络交换设备中的数据单元顺序
公开(公告)号：US07924860B1
公开(公告)日：2011-04-12
申请号：US12343318
申请日：2008-12-23
申请人： Jean-Marc Frailong , Sharada Yeluri , Anurag P. Gupta , Jeffrey G. Libby , Edwin Su
发明人： Jean-Marc Frailong , Sharada Yeluri , Anurag P. Gupta , Jeffrey G. Libby , Edwin Su
IPC分类号： H04L12/56
CPC分类号： H04L49/552 , H04L49/90 , H04L49/9047 , H04L49/9094
摘要： Data units received by a network device may be classified into traffic flow classes in which the determined traffic flow class for a data unit may be dynamically refined as the data unit is processed by the network device. A dispatch component of the network device may receive data units associated with traffic flow classes. Parallel processing engines of the network device may receive the data units from the dispatch component and may generate, for a least one of the data units, a plurality of dynamically refined indications of the traffic flow class to which the data unit belongs. Additionally, an ordering component of the network device may include a plurality of re-order queues, where the at least one data unit successively progresses through at least two of the re-order queues in an order defined by the plurality of dynamically refined indications of the traffic flow class.
摘要翻译：由网络设备接收的数据单元可以被分类为业务流类别，其中所确定的数据单元的业务流类别可以由网络设备处理数据单元时动态地改进。网络设备的调度组件可以接收与业务流类别相关联的数据单元。网络设备的并行处理引擎可以从调度组件接收数据单元，并且可以为数据单元中的至少一个数据单元生成数据单元所属的业务流类别的多个动态精确的指示。另外，网络设备的排序组件可以包括多个重新排序队列，其中至少一个数据单元以由多个动态精简指示定义的顺序连续地进行至少两个重排队列交通流量类。

9. 发明授权

US09026424B1 Emulation of multiple instruction sets 有权
标题翻译：仿真多个指令集
公开(公告)号：US09026424B1
公开(公告)日：2015-05-05
申请号：US12258487
申请日：2008-10-27
申请人： Jeffrey G. Libby , Jean-Marc Frailong , Sharada Yeluri , Jianhui Huang , John Keen , Rajesh Nair
发明人： Jeffrey G. Libby , Jean-Marc Frailong , Sharada Yeluri , Jianhui Huang , John Keen , Rajesh Nair
IPC分类号： G06F9/455 , G06F12/00 , G06F17/50
CPC分类号： G06F9/455 , G06F9/45504 , G06F12/00 , G06F17/50
摘要： A device may emulate target instructions by executing a first set of microinstructions, and may store a base address of a table that includes a microinstruction provided in a second set of microinstructions for emulating the target instructions. The device may also locate the microinstruction based on the stored base address, and emulate one of the target instructions by executing the microinstruction.
摘要翻译：设备可以通过执行第一组微指令来模拟目标指令，并且可以存储包括在第二组微指令中提供的用于模拟目标指令的微指令的表的基地址。设备还可以基于存储的基地址定位微指令，并且通过执行微指令来模拟目标指令之一。

10. 发明授权

US08069023B1 Hardware support for instruction set emulation 有权
标题翻译：硬件支持指令集仿真
公开(公告)号：US08069023B1
公开(公告)日：2011-11-29
申请号：US12202742
申请日：2008-09-02
申请人： Jean-Marc Frailong , Jeffrey G. Libby , Jianhui Huang , Sharada Yeluri , Rajesh Nair , John Keen
发明人： Jean-Marc Frailong , Jeffrey G. Libby , Jianhui Huang , Sharada Yeluri , Rajesh Nair , John Keen
IPC分类号： G06F17/50
CPC分类号： G06F9/3004 , G06F9/30145 , G06F9/30174 , G06F9/32 , H04L45/745
摘要： A method for emulating a nexthop instruction in microcode with the assistance of dedicated hardware to extract read and write addressing from the nexthop instruction instead of performing this operation in microcode. A method for emulating a nexthop instruction in microcode with the assistance of dedicated hardware to compare a nexthop read address to a special value and to indicate whether the nexthop read address matches the special value, instead of performing this operation in microcode. A method for determining a network address by performing a single extraction of bit fields of a tree instruction to allow multiple tree search processes to be performed.
摘要翻译：一种在专用硬件协助下仿真微代码中的下一跳指令的方法，用于从下一跳指令中提取读取和写入寻址，而不是在微码中执行该操作。一种在专用硬件的协助下仿真微代码中的下一跳指令的方法，用于将下一跳读取地址与特殊值进行比较，并指示下一跳读取地址是否匹配特殊值，而不是以微码执行该操作。一种通过执行树指令的位字段的单次提取来确定网络地址以允许执行多个树搜索处理的方法。

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