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    • 1. 发明申请
    • Method for Manufacturing Multiple Layers of Waveguides
    • 制造多层波导的方法
    • US20100025364A1
    • 2010-02-04
    • US12517692
    • 2008-08-29
    • Andrew T.S. PomereneTimothy J. ConwayCraig M. HillMark Jaso
    • Andrew T.S. PomereneTimothy J. ConwayCraig M. HillMark Jaso
    • B29D11/00
    • G02B6/12002B82Y20/00G02B6/1223G02B6/132G02B6/136
    • A method for manufacturing multiple layers of waveguides is disclosed. Initially, a first cladding layer is deposited on a substrate, a first inner cladding layer is then deposited on the first cladding layer, and a first waveguide material is deposited on the first inner cladding layer. The first inner cladding layer and the first waveguide material are then selectively etched to form a first waveguide layer. Next, a second inner cladding layer followed by a second cladding layer are deposited on the first waveguide layer. The second inner cladding layer and the second cladding layer are removed by using a chemical-mechanical polishing process selective to the first waveguide material. A third inner cladding layer followed by a second waveguide material are deposited on the first waveguide material. The third inner cladding layer and the second waveguide material are then selectively etched to form a second waveguide layer. Finally, a fourth inner cladding layer followed by a third cladding layer are deposited on the second waveguide layer.
    • 公开了制造多层波导的方法。 首先,在基板上沉积第一包层,然后在第一包层上沉积第一内包层,在第一内包层上沉积第一波导材料。 然后选择性地蚀刻第一内包层和第一波导材料以形成第一波导层。 接下来,在第一波导层上沉积第二内包层和第二覆层。 通过使用对第一波导材料选择性的化学机械抛光工艺来除去第二内包层和第二包覆层。 在第一波导材料上沉积第三内包层和第二波导材料。 然后选择性地蚀刻第三内包层和第二波导材料以形成第二波导层。 最后,在第二波导层上沉积第四内包层和第三覆层。
    • 6. 发明申请
    • Method for Fabricating Butt-Coupled Electro-Absorptive Modulators
    • 制造对接耦合电吸收调制器的方法
    • US20100330727A1
    • 2010-12-30
    • US12523801
    • 2008-08-29
    • Craig M. HillAndrew T.S. Pomerene
    • Craig M. HillAndrew T.S. Pomerene
    • H01L31/0232H01L31/18
    • G02F1/025
    • A method for fabricating butt-coupled electro-absorptive modulators is disclosed. A butt-coupled electro-absorptive modulator with minimal dislocations in the electro-absorptive material is produced by adding a dielectric spacer for lining the coupling region before epitaxially growing the SiGe or other electro-absorptive material. It has been determined that during the SiGe growth, the current process has exposed single crystal silicon at the bottom of the hole and exposed amorphous silicon on the sides. SiGe growth on the amorphous silicon is expected to have more dislocations than single crystal silicon. There should also be dislocations or fissures where the SiGe growth from the each nucleation source finally join. Thus, a dielectric sidewall can protect an exposed waveguide face from any etching from an aggressive surface preparation prior to epi growth.
    • 公开了一种制造对接耦合的电吸收调制器的方法。 通过在外延生长SiGe或其他电吸收材料之前添加用于衬垫耦合区域的电介质间隔物来产生电吸收材料中具有最小位错的对接耦合电吸收调制器。 已经确定,在SiGe生长期间,目前的工艺已经在孔的底部露出单晶硅并在侧面露出非晶硅。 SiGe在非晶硅上的生长预期具有比单晶硅更多的位错。 也应该存在来自每个成核源的SiGe生长最终加入的位错或裂缝。 因此,电介质侧壁可以在外延生长之前保护暴露的波导面不受腐蚀性表面处理的任何蚀刻。