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1. 发明授权

US08218602B2 Method and apparatus for selectively applying interference cancellation in spread spectrum systems 有权
标题翻译：用于在扩频系统中选择性地应用干扰消除的方法和装置
公开(公告)号：US08218602B2
公开(公告)日：2012-07-10
申请号：US12871748
申请日：2010-08-30
申请人： Anand Narayan , Eric S. Olson , Prashant Jain
发明人： Anand Narayan , Eric S. Olson , Prashant Jain
IPC分类号： H04B1/00
CPC分类号： H04B1/7117 , H04B1/7107 , H04B1/71072 , H04B1/7115 , H04B2001/71077
摘要： The present invention is directed to the selective provision of interference canceled signal streams to demodulating fingers in a communication receiver. According to the present invention, potential interferer signal paths are identified. Signal streams having one or more potential interferer signals removed or canceled are created, and a correlation is performed to determine whether the strength of a desired signal path increased as a result. If the correlation indicates that the strength of a desired signal path was increased by the signal cancellation, the interference canceled signal stream is provided to the demodulation finger assigned to track the desired signal path. If the correlation determines that the strength of the desired signal path did not increase as a result of performing interference cancellation, the raw or a different interference canceled signal stream is provided to the demodulation finger.
摘要翻译：本发明涉及在通信接收机中选择性地提供干扰消除信号流来解调手指。根据本发明，识别潜在的干扰信号路径。产生具有去除或取消的一个或多个潜在干扰信号的信号流，并且执行相关性以确定所需信号路径的强度是否随之增加。如果相关性指示所需信号路径的强度通过信号消除而增加，则将干扰消除信号流提供给被分配用于跟踪期望信号路径的解调手指。如果相关性确定期望信号路径的强度作为执行干扰消除的结果没有增加，则原始或不同的干扰消除信号流被提供给解调手指。

2. 发明授权

US08121177B2 Method and apparatus for interference suppression with efficient matrix inversion in a DS-CDMA system 有权
标题翻译：用于DS-CDMA系统中有效矩阵求逆的干扰抑制方法和装置
公开(公告)号：US08121177B2
公开(公告)日：2012-02-21
申请号：US12948749
申请日：2010-11-17
申请人： Anand P. Narayan , Eric S. Olson , Prashant Jain , John K. Thomas
发明人： Anand P. Narayan , Eric S. Olson , Prashant Jain , John K. Thomas
IPC分类号： H04B1/00
CPC分类号： H04B1/71072 , H04B1/7097 , H04B1/7107 , H04B1/71075 , H04B1/7115 , H04B1/7117 , H04B15/00 , H04B2001/71077 , H04B2201/709718 , H04J13/00 , H04J13/0048 , H04L43/08 , H04W24/08
摘要： A receiver in a CDMA system comprises a front end processor that generates a combined signal per source. A symbol estimator processes the combined signal to produce symbol estimates. An S-Matrix Generation module refines these symbol estimates based on the sub channel symbol estimates. An interference canceller is configured for cancelling interference from at least one of the plurality of received signals for producing at least one interference-cancelled signal.
摘要翻译： CDMA系统中的接收机包括每个源产生组合信号的前端处理器。符号估计器处理组合信号以产生符号估计。 S矩阵生成模块基于子信道符号估计来优化这些符号估计。一个干扰消除器被配置为消除来自多个接收信号中的至少一个的干扰，用于产生至少一个干扰消除信号。

3. 发明申请

US20100323624A1 METHOD AND APPARATUS FOR SELECTIVELY APPLYING INTERFERENCE CANCELLATION IN SPREAD SPECTRUM SYSTEMS 有权
标题翻译：选择性地在传播频谱系统中应用干扰消除的方法和装置
公开(公告)号：US20100323624A1
公开(公告)日：2010-12-23
申请号：US12871748
申请日：2010-08-30
申请人： Anand P. Narayan , Eric S. Olson , Prashant Jain
发明人： Anand P. Narayan , Eric S. Olson , Prashant Jain
IPC分类号： H04B15/00
CPC分类号： H04B1/7117 , H04B1/7107 , H04B1/71072 , H04B1/7115 , H04B2001/71077
摘要： The present invention is directed to the selective provision of interference canceled signal streams to demodulating fingers in a communication receiver. According to the present invention, potential interferer signal paths are identified. Signal streams having one or more potential interferer signals removed or canceled are created, and a correlation is performed to determine whether the strength of a desired signal path increased as a result. If the correlation indicates that the strength of a desired signal path was increased by the signal cancellation, the interference canceled signal stream is provided to the demodulation finger assigned to track the desired signal path. If the correlation determines that the strength of the desired signal path did not increase as a result of performing interference cancellation, the raw or a different interference canceled signal stream is provided to the demodulation finger.
摘要翻译：本发明涉及在通信接收机中选择性地提供干扰消除信号流来解调手指。根据本发明，识别潜在的干扰信号路径。产生具有去除或取消的一个或多个潜在干扰信号的信号流，并且执行相关性以确定所需信号路径的强度是否随之增加。如果相关性指示所需信号路径的强度通过信号消除而增加，则将干扰消除信号流提供给被分配用于跟踪期望信号路径的解调手指。如果相关性确定期望信号路径的强度作为执行干扰消除的结果没有增加，则原始或不同的干扰消除信号流被提供给解调手指。

4. 发明授权

US07430253B2 Method and apparatus for interference suppression with efficient matrix inversion in a DS-CDMA system 有权
标题翻译：用于DS-CDMA系统中有效矩阵求逆的干扰抑制方法和装置
公开(公告)号：US07430253B2
公开(公告)日：2008-09-30
申请号：US10686828
申请日：2003-10-15
申请人： Eric S. Olson , Anand P. Narayan , Prashant Jain , John K. Thomas
发明人： Eric S. Olson , Anand P. Narayan , Prashant Jain , John K. Thomas
IPC分类号： H04L27/00
CPC分类号： H04B1/71052 , H04B1/7107 , H04B1/7117 , H04B1/712
摘要： The present invention is directed to signal cancellation in spread spectrum communication systems. In particular, the present invention provides method and apparatus for selectively canceling interfering signals, even where symbols to be canceled do not align with symbols associated with a desired signal path. Furthermore, the interference cancellation provided by embodiments of the present invention is capable of functioning to remove interference associated with channels utilizing a symbol length that is different than the symbol length of a desired signal path. In accordance with a further embodiment of the present invention, method and apparatus for efficiently calculating projections to enable signal cancellation are provided.
摘要翻译：本发明涉及扩频通信系统中的信号消除。特别地，本发明提供了用于选择性地消除干扰信号的方法和装置，即使要被取消的符号不与符合期望信号路径的符号对齐。此外，由本发明的实施例提供的干扰消除能够利用不同于期望信号路径的符号长度的符号长度去除与信道相关的干扰。根据本发明的另一实施例，提供了用于有效地计算投影以启用信号消除的方法和装置。

5. 发明授权

US07787518B2 Method and apparatus for selectively applying interference cancellation in spread spectrum systems 有权
标题翻译：用于在扩频系统中选择性地应用干扰消除的方法和装置
公开(公告)号：US07787518B2
公开(公告)日：2010-08-31
申请号：US10669954
申请日：2003-09-23
申请人： Anand P. Narayan , Eric S. Olson , Prashant Jain
发明人： Anand P. Narayan , Eric S. Olson , Prashant Jain
IPC分类号： H04B1/69
CPC分类号： H04B1/7117 , H04B1/7107 , H04B1/71072 , H04B1/7115 , H04B2001/71077
摘要： The present invention is directed to the selective provision of interference canceled signal streams to demodulating fingers in a communication receiver. According to the present invention, potential interferer signal paths are identified. Signal streams having one or more potential interferer signals removed or canceled are created, and a correlation is performed to determine whether the strength of a desired signal path increased as a result. If the correlation indicates that the strength of a desired signal path was increased by the signal cancellation, the interference canceled signal stream is provided to the demodulation finger assigned to track the desired signal path. If the correlation determines that the strength of the desired signal path did not increase as a result of performing interference cancellation, the raw or a different interference canceled signal stream is provided to the demodulation finger.
摘要翻译：本发明涉及在通信接收机中选择性地提供干扰消除信号流来解调手指。根据本发明，识别潜在的干扰信号路径。产生具有去除或取消的一个或多个潜在干扰信号的信号流，并且执行相关性以确定所需信号路径的强度是否随之增加。如果相关性指示所需信号路径的强度通过信号消除而增加，则将干扰消除信号流提供给被分配用于跟踪期望信号路径的解调手指。如果相关性确定期望信号路径的强度作为执行干扰消除的结果没有增加，则原始或不同的干扰消除信号流被提供给解调手指。

6. 发明申请

US20110069742A1 Method and Apparatus for Interference Suppression with Efficient Matrix Inversion in a DS-CDMA System 有权
标题翻译：用于DS-CDMA系统中有效矩阵反演的干扰抑制方法和装置
公开(公告)号：US20110069742A1
公开(公告)日：2011-03-24
申请号：US12948749
申请日：2010-11-17
申请人： Anand P. Narayan , Eric S. Olson , Prashant Jain , John K. Thomas
发明人： Anand P. Narayan , Eric S. Olson , Prashant Jain , John K. Thomas
IPC分类号： H04B1/10 , H04L1/02 , H04B1/7115
CPC分类号： H04B1/71072 , H04B1/7097 , H04B1/7107 , H04B1/71075 , H04B1/7115 , H04B1/7117 , H04B15/00 , H04B2001/71077 , H04B2201/709718 , H04J13/00 , H04J13/0048 , H04L43/08 , H04W24/08
摘要： A receiver in a CDMA system comprises a front end processor that generates a combined signal per source. A symbol estimator processes the combined signal to produce symbol estimates. An S-Matrix Generation module refines these symbol estimates based on the sub channel symbol estimates. An interference canceller is configured for cancelling interference from at least one of the plurality of received signals for producing at least one interference-cancelled signal.
摘要翻译： CDMA系统中的接收机包括每个源产生组合信号的前端处理器。符号估计器处理组合信号以产生符号估计。 S矩阵生成模块基于子信道符号估计来优化这些符号估计。一个干扰消除器被配置为消除来自多个接收信号中的至少一个的干扰，用于产生至少一个干扰消除信号。

7. 发明授权

US07068706B2 System and method for adjusting phase 有权
标题翻译：调整相位的系统和方法
公开(公告)号：US07068706B2
公开(公告)日：2006-06-27
申请号：US10686359
申请日：2003-10-15
申请人： Anand P. Narayan , Prashant Jain , Eric S. Olson
发明人： Anand P. Narayan , Prashant Jain , Eric S. Olson
IPC分类号： H04B1/69
CPC分类号： H04J13/0048 , H04L2027/0046
摘要： Systems and methods for adjusting phase of a signal are provided. In one embodiment, the system includes a phase compensator configured for adjusting phase of the signal based on filtered and unfiltered representations of a first component of the signal and based on filtered and unfiltered representations of a second component of the signal. For example, the phase compensator may provide phase adjusted I and Q components of a complex signal through a plurality of multiplications of filtered and unfiltered I and Q components. The system also includes a detector that is communicatively coupled to the phase compensator. The detector is configured for combining the first and the second components with a code sequence to determine a complex amplitude of a channel.
摘要翻译：提供了一种调整信号相位的系统和方法。在一个实施例中，系统包括相位补偿器，该相位补偿器被配置为基于信号的第一分量的滤波和未滤波表示并且基于信号的第二分量的滤波和未滤波表示来调整信号的相位。例如，相位补偿器可以通过滤波和未滤波的I和Q分量的多次乘法来提供复信号的相位调整的I和Q分量。该系统还包括通信地耦合到相位补偿器的检测器。检测器被配置用于组合第一和第二分量与码序列以确定信道的复振幅。

8. 发明申请

US20070183483A1 Method and apparatus for selectively applying interference cancellation in spread spectrum systems 有权
标题翻译：用于在扩频系统中选择性地应用干扰消除的方法和装置
公开(公告)号：US20070183483A1
公开(公告)日：2007-08-09
申请号：US10669954
申请日：2003-09-23
申请人： Anand Narayan , Eric Olson , Prashant Jain
发明人： Anand Narayan , Eric Olson , Prashant Jain
IPC分类号： H04B1/00 , H03D1/04
CPC分类号： H04B1/7117 , H04B1/7107 , H04B1/71072 , H04B1/7115 , H04B2001/71077
摘要： The present invention is directed to the selective provision of interference canceled signal streams to demodulating fingers in a communication receiver. According to the present invention, potential interferer signal paths are identified. Signal streams having one or more potential interferer signals removed or canceled are created, and a correlation is performed to determine whether the strength of a desired signal path increased as a result. If the correlation indicates that the strength of a desired signal path was increased by the signal cancellation, the interference canceled signal stream is provided to the demodulation finger assigned to track the desired signal path. If the correlation determines that the strength of the desired signal path did not increase as a result of performing interference cancellation, the raw or a different interference canceled signal stream is provided to the demodulation finger.
摘要翻译：本发明涉及在通信接收机中选择性地提供干扰消除信号流来解调手指。根据本发明，识别潜在的干扰信号路径。产生具有去除或取消的一个或多个潜在干扰信号的信号流，并且执行相关性以确定所需信号路径的强度是否随之增加。如果相关性指示所需信号路径的强度通过信号消除而增加，则将干扰消除信号流提供给被分配用于跟踪期望信号路径的解调手指。如果相关性确定期望信号路径的强度作为执行干扰消除的结果没有增加，则原始或不同的干扰消除信号流被提供给解调手指。

9. 发明授权

US08639885B2 Reducing implementation costs of communicating cache invalidation information in a multicore processor 有权
标题翻译：降低在多核处理器中传送缓存无效信息的实施成本
公开(公告)号：US08639885B2
公开(公告)日：2014-01-28
申请号：US12643238
申请日：2009-12-21
申请人： Prashant Jain , Sandip Das , Sanjay Patel
发明人： Prashant Jain , Sandip Das , Sanjay Patel
IPC分类号： G06F12/00
CPC分类号： G06F12/0897 , Y02D10/13
摘要： A processor may include several processor cores, each including a respective higher-level cache, wherein each higher-level cache includes higher-level cache lines; and a lower-level cache including lower-level cache lines, where each of the lower-level cache lines may be configured to store data that corresponds to multiple higher-level cache lines. In response to invalidating a given lower-level cache line, the lower-level cache may be configured to convey a sequence including several invalidation packets to the processor cores via an interface, where each member of the sequence of invalidation packets corresponds to a respective higher-level cache line to be invalidated, and where the interface is narrower than an interface capable of concurrently conveying all invalidation information corresponding to the given lower-level cache line. Each invalidation packet may include invalidation information indicative of a location of the respective higher-level cache line within different ones of the processor cores.
摘要翻译：处理器可以包括几个处理器核心，每个处理器核心包括相应的更高级别的高速缓存，其中每个更高级别的高速缓存包括更高级别的高速缓存行; 以及包括较低级别高速缓存行的下级缓存，其中每个下级高速缓存行可以被配置为存储对应于多个更高级别的高速缓存行的数据。响应于使给定的低级高速缓存行无效，低级缓存可以被配置为经由接口将包括若干无效分组的序列传送到处理器核，其中无效分组序列中的每个成员对应于相应较高的高级缓存行将被无效，并且其中接口比能够同时传送对应于给定下级高速缓存行的所有无效信息的接口更窄。每个无效分组可以包括指示相应的较高级别高速缓存行在不同处理器核心内的位置的无效信息。

10. 发明申请

US20110131379A1 PROCESSOR AND METHOD FOR WRITEBACK BUFFER REUSE 有权
标题翻译：用于写缓冲区重用的处理器和方法
公开(公告)号：US20110131379A1
公开(公告)日：2011-06-02
申请号：US12627354
申请日：2009-11-30
申请人： Prashant Jain , Srinivasan R. Iyengar , Jeffrey Thomas Oplinger
发明人： Prashant Jain , Srinivasan R. Iyengar , Jeffrey Thomas Oplinger
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0804 , G06F12/0811
摘要： A processor may include a writeback configured to perform a first writeback operation to store corresponding writeback data back to a lower-level memory upon eviction of the writeback data, and a writeback buffer configured to store the writeback data after the writeback data has been evicted from the writeback cache and before the writeback data has been sent to the lower-level memory. After the writeback data has been sent from the writeback buffer to the lower-level memory, and before the lower-level memory has acknowledged completion of the first writeback operation, the writeback cache may perform a second writeback operation to store different writeback data in the writeback buffer in response to eviction of the different writeback data, such that a total size of the writeback data for the concurrently outstanding writeback operations exceeds a total size of writeback data that the writeback buffer is capable of concurrently storing.
摘要翻译：处理器可以包括写回，其被配置为执行第一回写操作以在驱逐回写数据时将相应的回写数据存储回低级存储器;以及写回缓冲器，其被配置为在写回数据已被逐出之后存储回写数据回写高速缓存和写回数据已经发送到低级内存之前。在回写数据已经从写回缓冲器发送到下级存储器之后，并且在低级存储器已经确认完成第一写回操作之前，回写高速缓存可以执行第二写回操作以将不同的写回数据存储在回写缓冲器响应于不同的回写数据的消除，使得用于同时未完成的回写操作的回写数据的总大小超过回写缓冲器能够同时存储的回写数据的总大小。

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