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1. 发明授权

US06204074B1 Chip design process for wire bond and flip-chip package 失效
标题翻译：引线键合和倒装芯片封装的芯片设计过程
公开(公告)号：US06204074B1
公开(公告)日：2001-03-20
申请号：US08895542
申请日：1997-07-17
申请人： Allan Bertolet , James Fiore , Eberhard Gramatzki
发明人： Allan Bertolet , James Fiore , Eberhard Gramatzki
IPC分类号： H01L2166
CPC分类号： H01L22/32 , G01R3/00 , G01R31/2886 , H01L23/528 , H01L2224/0392 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05024 , H01L2224/05569 , H01L2224/05572 , H01L2224/05573 , H01L2224/13
摘要： A method of fabrication are provided in which permanent external electrical connection to active circuitry in a semiconductor structure can be made through either a wire bond pad or metal bump formed thereon. A final metallization including a wire bond pad is disposed over and electrically connected with the active circuitry. An insulating material film is disposed over the final metallization leaving the wire bond pad and a portion of the final metallization laterally displaced from the pad exposed. A metal bump contacts the laterally displayed exposed portion of the final metallization. The wire bond pad is electrically coupled with and laterally displaced from the metal bump through the final metallization. The metal bump and wire bond pad are configured to facilitate electrical connection of the semiconductor structure with an external connector, such as a modular packaging substrate. The structure may also be used for testing and burning in a semiconductor die without direct physical contact of the external testing device to the wire bond pad.
摘要翻译：提供了一种制造方法，其中可以通过形成在其上的引线接合焊盘或金属凸块来制造半导体结构中的有源电路的永久外部电连接。包括引线接合焊盘的最终金属化被布置在有源电路上并与有源电路电连接。绝缘材料膜设置在离开引线接合焊盘的最终金属化物上，并且最终金属化的一部分从暴露的焊盘横向移位。金属凸块接触最终金属化的横向显示的暴露部分。引线接合焊盘与金属凸块通过最后的金属化电耦合并且横向移位。金属凸块和引线接合焊盘被构造成便于半导体结构与诸如模块化封装基板的外部连接器的电连接。该结构也可用于在半导体管芯中进行测试和燃烧，而不将外部测试装置与引线接合焊盘直接物理接触。

2. 发明申请

US20050224973A1 Extension of fatigue life for C4 solder ball to chip connection 失效
标题翻译：延长C4焊球的疲劳寿命到芯片连接
公开(公告)号：US20050224973A1
公开(公告)日：2005-10-13
申请号：US11148923
申请日：2005-06-08
申请人： William Bernier , Charles Carey , Eberhard Gramatzki , Thomas Homa , Eric Johnson , Pierre Langevin , Irving Memis , Son Tran , Robert White
发明人： William Bernier , Charles Carey , Eberhard Gramatzki , Thomas Homa , Eric Johnson , Pierre Langevin , Irving Memis , Son Tran , Robert White
IPC分类号： H01L21/60 , H01L23/485 , H05K3/34 , H01L23/48 , H01L21/44
CPC分类号： H01L24/10 , H01L24/13 , H01L24/81 , H01L2224/13 , H01L2224/13099 , H01L2224/13111 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01058 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/351 , H05K3/3436 , H01L2924/00
摘要： A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.
摘要翻译：用于将半导体衬底（例如，半导体芯片）耦合到有机衬底（例如，芯片载体）的方法和结构。耦合器将焊接部件（例如，焊球）与半导体衬底上的导电焊盘和有机衬底上的导电焊盘接合。可以通过使半导体衬底上的焊盘的表面积超过有机衬底上焊盘的表面积来减少热循环期间焊料部件上的热应变。在热循环期间焊料构件上的热应变也可以通过从焊料构件的中心线到半导体衬底的最近侧边缘的距离超过约0.25mm来减小。

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