专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120161290A1 Black GE Based on Crystalline/Amorphous Core/Shell Nanoneedle Arrays 有权
标题翻译：黑色GE基于晶体/非晶核/壳纳米线阵列
公开(公告)号：US20120161290A1
公开(公告)日：2012-06-28
申请号：US13332743
申请日：2011-12-21
申请人： Ali Javey , Yu-Lun Chueh , Zhiyong Fan
发明人： Ali Javey , Yu-Lun Chueh , Zhiyong Fan
IPC分类号： H01L29/16 , H01L21/20 , B82Y99/00 , B82Y40/00
CPC分类号： H01L29/16 , B82Y10/00 , B82Y30/00 , B82Y40/00 , H01L21/02422 , H01L21/02532 , H01L21/02603 , H01L21/0262 , H01L21/02645 , H01L21/02653 , H01L29/0676 , H01L31/035227 , H01L31/03921 , H01L31/1808 , Y02E10/50
摘要： Direct growth of black Ge on low-temperature substrates, including plastics and rubber is reported. The material is based on highly dense, crystalline/amorphous core/shell Ge nanoneedle arrays with ultrasharp tips (˜4 nm) enabled by the Ni catalyzed vapor-solid-solid growth process. Ge nanoneedle arrays exhibit remarkable optical properties. Specifically, minimal optical reflectance (
摘要翻译：据报道，黑Ge在低温基材上的直接生长，包括塑料和橡胶。该材料基于高密度，结晶/无定形核/壳Ge纳米针阵列，其具有通过Ni催化的气固固体生长过程实现的超锋利尖端（〜4nm）。锗纳米针阵列表现出显着的光学性能。具体地，即使对于高入射角（〜75°）和相对较短的纳米针长度（〜1μm），也观察到最小光学反射率（<1％）。此外，该材料具有高的光吸收效率，有效带隙为〜1eV。报道的黑Ge可以对非常规基板上的高效光伏和光电检测器应用具有重要的实际意义。

2. 发明授权

US08664095B2 Black GE based on crystalline/amorphous core/shell nanoneedle arrays 有权
标题翻译：黑色GE基于晶体/非晶核/壳纳米针阵列
公开(公告)号：US08664095B2
公开(公告)日：2014-03-04
申请号：US13332743
申请日：2011-12-21
申请人： Ali Javey , Yu-Lun Chueh , Zhiyong Fan
发明人： Ali Javey , Yu-Lun Chueh , Zhiyong Fan
IPC分类号： H01L21/20
CPC分类号： H01L29/16 , B82Y10/00 , B82Y30/00 , B82Y40/00 , H01L21/02422 , H01L21/02532 , H01L21/02603 , H01L21/0262 , H01L21/02645 , H01L21/02653 , H01L29/0676 , H01L31/035227 , H01L31/03921 , H01L31/1808 , Y02E10/50
摘要： Direct growth of black Ge on low-temperature substrates, including plastics and rubber is reported. The material is based on highly dense, crystalline/amorphous core/shell Ge nanoneedle arrays with ultrasharp tips (˜4 nm) enabled by the Ni catalyzed vapor-solid-solid growth process. Ge nanoneedle arrays exhibit remarkable optical properties. Specifically, minimal optical reflectance (
摘要翻译：据报道，黑Ge在低温基材上的直接生长，包括塑料和橡胶。该材料基于高密度，结晶/无定形核/壳Ge纳米针阵列，其具有通过Ni催化的气固固体生长过程实现的超锋利尖端（〜4nm）。锗纳米针阵列表现出显着的光学性能。具体地，即使对于高入射角（〜75°）和相对短的纳米针长度（〜1um），也观察到最小光学反射率（<1％）。此外，该材料具有高的光吸收效率，有效带隙为〜1eV。报道的黑Ge可以对非常规基板上的高效光伏和光电检测器应用具有重要的实际意义。

3. 发明申请

US20120192934A1 Nanostructure, Photovoltaic Device, and Method of Fabrication Thereof 审中-公开
标题翻译：纳米结构，光伏器件及其制造方法
公开(公告)号：US20120192934A1
公开(公告)日：2012-08-02
申请号：US13379455
申请日：2010-06-18
申请人： Zhiyong Fan , Ali Javey
发明人： Zhiyong Fan , Ali Javey
IPC分类号： H01L31/0352 , H01L31/18 , H01L29/06
CPC分类号： H01L31/035281 , H01L31/0296 , H01L31/035227 , H01L31/073 , H01L31/1836 , Y02E10/543
摘要： An embodiment of nanostructure includes a conductive substrate; an insulating layer on the conductive substrate, metal nanoparticles, and elongated single crystal nanostructures. The insulating layer includes an array of pore channels. The metal nanoparticles are located at bottoms of the pore channels. The elongated single crystal nanostructures contact the metal nanoparticles and extend out of the pore channels. An embodiment of a photovoltaic device includes the nanostructure and a photoabsorption layer. An embodiment of a method of fabricating a nanostructure includes forming an insulating layer on a conductive substrate. The insulating layer has pore channels arranged in an array. Metal nanoparticles are formed in the pore channels. The metal nanoparticles conductively couple to the conductive layer. Elongated single crystal nanostructures are formed in the pore channels. A portion of the insulating layer is etched away, which leaves the elongated single crystal nanostructures extending out of the insulating layer.
摘要翻译：纳米结构的一个实施例包括导电基底; 导电基板上的绝缘层，金属纳米颗粒和细长单晶纳米结构。绝缘层包括孔通道阵列。金属纳米粒子位于细孔通道的底部。细长的单晶纳米结构与金属纳米粒子接触并延伸出孔隙通道。光伏器件的一个实施例包括纳米结构和光吸收层。纳米结构的制造方法的一个实施例包括在导电基底上形成绝缘层。绝缘层具有排列成阵列的孔道。在孔道中形成金属纳米颗粒。金属纳米粒子导电地耦合到导电层。在孔道中形成细长的单晶纳米结构。绝缘层的一部分被蚀刻掉，其离开延伸出绝缘层的细长单晶纳米结构。

4. 发明申请

US20140290737A1 THIN FILM VLS SEMICONDUCTOR GROWTH PROCESS 审中-公开
标题翻译：薄膜半导体生长过程
公开(公告)号：US20140290737A1
公开(公告)日：2014-10-02
申请号：US14243586
申请日：2014-04-02
申请人： Ali Javey , Zhibin Yu , Rehan Kapadia
发明人： Ali Javey , Zhibin Yu , Rehan Kapadia
IPC分类号： H01L31/0368 , H01L31/0304 , H01L31/18
CPC分类号： H01L31/0368 , H01L31/0304 , H01L31/1852 , Y02E10/544 , Y02P70/521
摘要： A composition comprising a substrate, a polycrystalline III-V semiconductor layer, and an oxide layer disposed above the polycrystalline III-V semiconductor layer is described. A growth method that enables fabrication of continuous thin films of polycrystalline indium phosphide (InP) directly on metal foils is described. The method describes the deposition of an indium (In) thin film (up to 20 microns thick) directly on molybedenum (Mo) foil, followed by the deposition of a thin oxide capping layer (up to 1 micron thick). This capping layer prevents dewetting of the In from the substrate during subsequent high temperature processing steps. The Mo/In/Capping Layer stack is then heated in the presence of phosphorous precursors, causing supersaturation of the liquid indium with phosphorous, followed by precipitation of InP. These polycrystalline III-V films have grain sizes 100-200 microns, minority carrier lifetimes >2 ns and hall mobilities of 500 cm̂2/V-s.
摘要翻译：描述了包括基板，多晶III-V半导体层和设置在多晶III-V半导体层上方的氧化物层的组合物。描述了能够直接在金属箔上制造多晶磷化铟（InP）的连续薄膜的生长方法。该方法描述了直接在钼（Mo）箔上沉积铟（In）薄膜（直到20微米厚），然后沉积薄氧化物覆盖层（高达1微米厚）。该封盖层防止在随后的高温处理步骤期间将In从衬底中去湿。然后在磷前体的存在下加热Mo / In / Capping层堆叠，引起液体铟与磷过饱和，然后沉淀InP。这些多晶III-V膜的晶粒尺寸为100-200微米，少数载流子寿命> 2ns，霍尔迁移率为500 cm2 / V-s。

5. 发明授权

US08525228B2 Semiconductor on insulator (XOI) for high performance field effect transistors 有权
标题翻译：绝缘体半导体（XOI）用于高性能场效应晶体管
公开(公告)号：US08525228B2
公开(公告)日：2013-09-03
申请号：US13175281
申请日：2011-07-01
申请人： Ali Javey , Hyunhyub Ko , Kuniharu Takei
发明人： Ali Javey , Hyunhyub Ko , Kuniharu Takei
IPC分类号： H01L29/772 , H01L29/205 , H01L21/20
CPC分类号： H01L29/78681 , H01L21/2007 , H01L21/8252 , H01L27/0605
摘要： Semiconductor-on-insulator (XOI) structures and methods of fabricating XOI structures are provided. Single-crystalline semiconductor is grown on a source substrate, patterned, and transferred onto a target substrate, such as a Si/SiO2 substrate, thereby assembling an XOI substrate. The transfer process can be conducted through a stamping method or a bonding method. Multiple transfers can be carried out to form heterogenous compound semiconductor devices. The single-crystalline semiconductor can be II-IV or III-V compound semiconductor, such as InAs. A thermal oxide layer can be grown on the patterned single crystalline semiconductor, providing improved electrical characteristics and interface properties. In addition, strain tuning is accomplished via a capping layer formed on the single-crystalline semiconductor before transferring the single-crystalline semiconductor to the target substrate.
摘要翻译：提供绝缘体上半导体（XOI）结构和制造XOI结构的方法。单源半导体在源极衬底上生长，图案化并转移到诸如Si / SiO 2衬底的目标衬底上，从而组装XOI衬底。转印过程可以通过冲压法或粘合法进行。可以进行多次转移以形成异质化合物半导体器件。单晶半导体可以是II-IV或III-V化合物半导体，例如InAs。可以在图案化单晶半导体上生长热氧化物层，从而提供改善的电特性和界面性质。此外，在将单晶半导体转移到目标衬底之前，通过在单晶半导体上形成的覆盖层来实现应变调谐。

6. 发明授权

US08697467B2 Surface and gas phase doping of III-V semiconductors 有权
标题翻译： III-V半导体的表面和气相掺杂
公开(公告)号：US08697467B2
公开(公告)日：2014-04-15
申请号：US12843271
申请日：2010-07-26
申请人： Ali Javey , Alexandra C. Ford , Johnny C. Ho
发明人： Ali Javey , Alexandra C. Ford , Johnny C. Ho
IPC分类号： H01L29/00
CPC分类号： H01L21/2233 , H01L21/228 , H01L29/0673 , H01L29/068 , H01L29/207 , H01L29/78681
摘要： Compound semiconductor devices and methods of doping compound semiconductors are provided. Embodiments of the invention provide post-deposition (or post-growth) doping of compound semiconductors, enabling nanoscale compound semiconductor devices including diodes and transistors. In one method, a self-limiting monolayer technique with an annealing step is used to form shallow junctions. By forming a sulfur monolayer on a surface of an InAs substrate and performing a thermal annealing to drive the sulfur into the InAs substrate, n-type doping for InAs-based devices can be achieved. The monolayer can be formed by surface chemistry reactions or a gas phase deposition of the dopant. In another method, a gas-phase technique with surface diffusion is used to form doped regions. By performing gas-phase surface diffusion of Zn into InAs, p-type doping for InAs-based devices can be achieved. Both bulk and nanowire devices using compound semiconductors can be fabricated using these surface and gas-phase doping processes.
摘要翻译：提供了化合物半导体器件和掺杂化合物半导体的方法。本发明的实施方案提供化合物半导体的后沉积（或后生长）掺杂，使纳米尺度的化合物半导体器件包括二极管和晶体管。在一种方法中，使用具有退火步骤的自限制单层技术形成浅结。通过在InAs衬底的表面上形成硫单层并执行热退火以将硫驱动到InAs衬底中，可以实现基于InAs的器件的n型掺杂。单层可以通过表面化学反应或掺杂剂的气相沉积形成。在另一种方法中，使用具有表面扩散的气相技术来形成掺杂区域。通过使Zn进入InAs的气相表面扩散，可以实现基于InAs的器件的p型掺杂。可以使用这些表面和气相掺杂工艺制造使用化合物半导体的体和纳米线器件。

7. 发明申请

US20140069499A1 MORPHOLOGICAL AND SPATIAL CONTROL OF InP CRYSTAL GROWTH USING CLOSED-SPACED SUBLIMATION 审中-公开
标题翻译：使用闭合分层的InP晶体生长的形态和空间控制
公开(公告)号：US20140069499A1
公开(公告)日：2014-03-13
申请号：US14014000
申请日：2013-08-29
申请人： Daisuke Kiriya , Maxwell Zheng , Ali Javey
发明人： Daisuke Kiriya , Maxwell Zheng , Ali Javey
IPC分类号： H01L31/0368 , H01L31/0304 , H01L31/18
CPC分类号： H01L31/0368 , H01L21/02425 , H01L21/02491 , H01L21/02543 , H01L21/02546 , H01L21/02603 , H01L21/02631 , H01L21/02653 , H01L31/0304 , H01L31/035227 , H01L31/1852 , Y02E10/544 , Y02P70/521
摘要： A new solar cell comprising a substrate, a VIB metal thin film deposited on the substrate, and a polycrystalline III-V semiconductor thin film deposited on the VIB metal thin film.A method of making a solar cell comprising providing a substrate, depositing a VIB metal thin film on the substrate, and depositing a polycrystalline III-V semiconductor thin film on the VIB metal thin film.In one embodiment, a polycrystalline III-V semiconductor thin film comprising Indium Phosphide (InP) is deposited on a VIB metal thin film comprising Molybdenum (Mo) by Metal Organic Chemical Vapor Deposition (MOCVD). In another embodiment, growth of Indium phosphide (InP) crystals directly on metal foils is described using a method comprising a closed-spaced sublimation (CSS). In another embodiment, both InP nanowires and polycrystalline films were obtained by tuning growth conditions. In another embodiment, utilizing a silicon dioxide mask, selective nucleation of InP on metal substrates was obtained.
摘要翻译：一种新的太阳能电池，包括基板，沉积在基板上的VIB金属薄膜和沉积在VIB金属薄膜上的多晶III-V半导体薄膜。一种制造太阳能电池的方法，包括提供衬底，在衬底上沉积VIB金属薄膜，以及在VIB金属薄膜上沉积多晶III-V半导体薄膜。在一个实施例中，包含磷化铟（InP）的多晶III-V半导体薄膜通过金属有机化学气相沉积（MOCVD）沉积在包含钼（Mo）的VIB金属薄膜上。在另一个实施方案中，使用包括闭合间隔升华（CSS）的方法来描述直接在金属箔上生长磷化铟（InP）晶体。在另一个实施方案中，通过调整生长条件获得InP纳米线和多晶膜。在另一个实施方案中，利用二氧化硅掩模，获得InP在金属基底上的选择性成核。

8. 发明授权

US07655272B1 Nanoparticles with controlled growth 失效
标题翻译：具有受控生长的纳米颗粒
公开(公告)号：US07655272B1
公开(公告)日：2010-02-02
申请号：US11437278
申请日：2006-05-19
申请人： Ali Javey , Hongjie Dai
发明人： Ali Javey , Hongjie Dai
IPC分类号： B05D1/32
CPC分类号： C23C14/225 , B01J23/42 , B01J23/52 , B01J23/745 , B01J23/75 , B01J35/006 , B01J37/0238 , C23C14/042 , G03F7/40 , Y10S977/81
摘要： Nanostructures are implemented in a manner that facilitates controlled, nano-scale dimensional manufacture and implementation. According to an example embodiment of the present invention, a nanostructure is formed from a layer of deposited metallic material, sized using a mask and, in some applications, metal deposition angle. The deposited metallic material is heated to form a metallic nanocluster having a cross-section (e.g., diameter-type or width-type dimensional characteristics) that is less than a width of the layer of deposited metal material. In one application, the metallic material is deposited on a substrate and in wells defined by a mask formed on the substrate. The metallic material is annealed to form metallic nanoclusters having a diameter that is on an order of magnitude less than a width and/or diameter of the wells.
摘要翻译：纳米结构以促进受控的纳米级尺寸制造和实施的方式实现。根据本发明的示例性实施例，纳米结构由沉积的金属材料层形成，其尺寸使用掩模，并且在一些应用中，金属沉积角度。将沉积的金属材料加热以形成具有小于所沉积的金属材料层的宽度的横截面（例如，直径型或宽度尺寸特性）的金属纳米簇。在一个应用中，金属材料沉积在基底上并在由形成在基底上的掩模限定的孔中。将金属材料退火以形成直径小于孔的宽度和/或直径一个数量级的金属纳米团簇。

9. 发明申请

US20170175290A1 GROWTH OF SINGLE CRYSTAL III-V SEMICONDUCTORS ON AMORPHOUS SUBSTRATES 审中-公开
公开(公告)号：US20170175290A1
公开(公告)日：2017-06-22
申请号：US15354063
申请日：2016-11-17
申请人： Kevin Chen , Rehan Kapadia , Ali Javey
发明人： Kevin Chen , Rehan Kapadia , Ali Javey
IPC分类号： C30B1/10 , C30B1/02 , C30B29/40 , H01L21/02
CPC分类号： C30B1/10 , C30B1/02 , C30B25/02 , C30B25/04 , C30B29/40 , C30B29/403 , H01L21/02422 , H01L21/02428 , H01L21/02488 , H01L21/02494 , H01L21/02505 , H01L21/02538 , H01L21/02543
摘要： This disclosure provides systems, methods, and apparatus related to the growth of single crystal III-V semiconductors on amorphous substrates. In one aspect, a shape of a semiconductor structure to be formed on an amorphous substrate is defined in a resist disposed on the amorphous substrate. A boron group element is deposited over the amorphous substrate. A ceramic material is deposited on the boron group element. The resist is removed from the amorphous substrate. The ceramic material is deposited to cover the boron group element. The amorphous substrate and materials deposited thereon are heated in the presence of a gas including a nitrogen group element to grow a single crystal semiconductor structure comprising the boron group element and the nitrogen group element.

10. 发明授权

US09299940B2 Carbon nanotube network thin-film transistors on flexible/stretchable substrates 有权
标题翻译：碳纳米管网络薄膜晶体管在柔性/可拉伸基板上
公开(公告)号：US09299940B2
公开(公告)日：2016-03-29
申请号：US14065218
申请日：2013-10-28
申请人： Kuniharu Takei , Toshitake Takahashi , Ali Javey
发明人： Kuniharu Takei , Toshitake Takahashi , Ali Javey
IPC分类号： H01L51/05 , B82Y30/00 , H01L51/00
CPC分类号： H01L51/0558 , B82Y30/00 , H01L51/0048 , H01L51/0097 , H01L51/0545
摘要： This disclosure provides systems, methods, and apparatus for flexible thin-film transistors. In one aspect, a device includes a polymer substrate, a gate electrode disposed on the polymer substrate, a dielectric layer disposed on the gate electrode and on exposed portions of the polymer substrate, a carbon nanotube network disposed on the dielectric layer, and a source electrode and a drain electrode disposed on the carbon nanotube network.
摘要翻译：本公开提供了用于柔性薄膜晶体管的系统，方法和装置。一方面，一种器件包括聚合物衬底，设置在聚合物衬底上的栅电极，设置在栅电极上的电介质层和聚合物衬底的暴露部分，设置在电介质层上的碳纳米管网络，以及源极电极和设置在碳纳米管网络上的漏电极。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式