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1. 发明授权

US07327166B2 Reference buffer with improved drift 有权
标题翻译：参考缓冲区具有改善的漂移
公开(公告)号：US07327166B2
公开(公告)日：2008-02-05
申请号：US11206406
申请日：2005-08-18
申请人： Alfio Zanchi , Marco Corsi
发明人： Alfio Zanchi , Marco Corsi
IPC分类号： H03K19/0175 , G05F1/10
CPC分类号： G05F3/222 , H03F1/26 , H03F1/34 , H03F3/005 , H03F3/45475 , H03F2200/372 , H03F2200/453 , H03F2203/45134 , H03F2203/45136 , H03F2203/45512 , H03F2203/45628 , H03F2203/45722
摘要： A reference voltage circuit having an open-loop buffer driven by a matching buffer included within a closed-loop, generates a stable differential or single-ended voltage while minimizing signal-dependent short-term and long-term drift. The open-loop buffer may be a replica of the closed-loop buffer, reducing the effect of a signal coupled on the voltage reference lines. The reference voltage circuit may be adapted for a switched capacitor ADC.
摘要翻译：具有由包含在闭环中的匹配缓冲器驱动的开环缓冲器的参考电压电路产生稳定的差分或单端电压，同时最小化信号相关的短期和长期漂移。开环缓冲器可以是闭环缓冲器的复制品，减少耦合在电压参考线上的信号的影响。参考电压电路可以适用于开关电容器ADC。

2. 发明授权

US07345528B2 Method and apparatus for improved clock preamplifier with low jitter 有权
标题翻译：具有低抖动的改进型时钟前置放大器的方法和装置
公开(公告)号：US07345528B2
公开(公告)日：2008-03-18
申请号：US11125960
申请日：2005-05-10
申请人： Alfio Zanchi , Marco Corsi
发明人： Alfio Zanchi , Marco Corsi
IPC分类号： G06G7/12 , H03F3/16
CPC分类号： H03F3/4517 , H03F3/42 , H03F3/4508
摘要： A clock signal preamplifier comprises complementary pairs of differentially coupled transistors, with an output signal coupled to an inverter further comprising a totem-pole arrangement of complementary MOSFET transistors. The input signal to the preamplifier is typically sinusoidal, and the output signal is rectangular. Preferably, the differentially coupled transistors are bipolar, and a pair of diode clamper circuits with bipolar transistors is preferably coupled to the complementary pairs of differentially coupled transistors. A reference voltage source is coupled to the control terminals of the clamper transistors. A reference voltage source, which preferably comprises a totem-pole arrangement of complementary MOSFET transistors with its output node is coupled to its input node, provides a reference voltage for the diode clamper circuits. Preferably, MOSFET transistors of the reference voltage source and MOSFET transistors of like kind of the inverter are configured to have substantially identical threshold voltages.
摘要翻译：时钟信号前置放大器包括互补的差分耦合晶体管对，其中耦合到反相器的输出信号还包括互补MOSFET晶体管的图腾柱布置。前置放大器的输入信号通常是正弦波，输出信号是矩形的。优选地，差分耦合的晶体管是双极的，并且具有双极晶体管的一对二极管钳位电路优选地耦合到互补的差分耦合晶体管对。参考电压源耦合到钳位晶体管的控制端。优选地包括具有其输出节点的互补MOSFET晶体管的图腾柱布置的参考电压源耦合到其输入节点，为二极管钳位电路提供参考电压。优选地，参考电压源的MOSFET晶体管和类似类型的反相器的MOSFET晶体管被配置为具有基本相同的阈值电压。

3. 发明申请

US20070040580A1 Reference buffer with improved drift 有权
标题翻译：参考缓冲区具有改善的漂移
公开(公告)号：US20070040580A1
公开(公告)日：2007-02-22
申请号：US11206406
申请日：2005-08-18
申请人： Alfio Zanchi , Marco Corsi
发明人： Alfio Zanchi , Marco Corsi
IPC分类号： H03K19/094
CPC分类号： G05F3/222 , H03F1/26 , H03F1/34 , H03F3/005 , H03F3/45475 , H03F2200/372 , H03F2200/453 , H03F2203/45134 , H03F2203/45136 , H03F2203/45512 , H03F2203/45628 , H03F2203/45722
摘要： A reference voltage circuit having an open-loop buffer driven by a matching buffer included within a closed-loop, generates a stable differential or single-ended voltage while minimizing signal-dependent short-term and long-term drift. The open-loop buffer may be a replica of the closed-loop buffer, reducing the effect of a signal coupled on the voltage reference lines. The reference voltage circuit may be adapted for a switched capacitor ADC.
摘要翻译：具有由包含在闭环中的匹配缓冲器驱动的开环缓冲器的参考电压电路产生稳定的差分或单端电压，同时最小化信号相关的短期和长期漂移。开环缓冲器可以是闭环缓冲器的复制品，减少耦合在电压参考线上的信号的影响。参考电压电路可以适用于开关电容器ADC。

4. 发明申请

US20070046359A1 Apparatus and method for effecting switching of an input signal by a switching transistor 审中-公开
标题翻译：用于通过开关晶体管切换输入信号的装置和方法
公开(公告)号：US20070046359A1
公开(公告)日：2007-03-01
申请号：US11513651
申请日：2006-08-29
申请人： Alfio Zanchi , Marco Corsi
发明人： Alfio Zanchi , Marco Corsi
IPC分类号： H03K17/16
CPC分类号： H03K17/16 , G11C27/026
摘要： An apparatus switching an input signal by a switching transistor in response to a clock includes: (a) A capacitor. (b) A charging circuit coupled for charging the capacitor with a supply voltage in response to the clock. (c) A switching circuit coupled with the capacitor and configured for coupling the switching transistor with the capacitor in response to the clock. (d) A grounding circuit coupled with the switching transistor and a ground locus. The grounding circuit includes a first grounding transistor coupled with the switching transistor and a second grounding transistor. The first grounding transistor has connection loci permitting electrical coupling with the gate, the source, the drain and the bulk portion of the first grounding transistor. The source connection locus and the bulk connection locus are coupled in common. The second grounding transistor couples the first grounding transistor with the ground locus in response to the clock.
摘要翻译：响应时钟由开关晶体管切换输入信号的装置包括：（a）电容器。（b）充电电路，其耦合用于响应时钟对电容器充电并具有电源电压。（c）与电容器耦合的开关电路，其被配置为响应于时钟将开关晶体管与电容器耦合。（d）与开关晶体管耦合的接地电路和地线轨迹。接地电路包括与开关晶体管耦合的第一接地晶体管和第二接地晶体管。第一接地晶体管具有允许与第一接地晶体管的栅极，源极，漏极和主体部分电耦合的连接轨道。源连接轨迹和体连接轨迹共同耦合。第二接地晶体管响应于时钟将第一接地晶体管与地线轨迹耦合。

5. 发明申请

US20060255859A1 Method and apparatus for improved clock preamplifier with low jitter 有权
标题翻译：具有低抖动的改进型时钟前置放大器的方法和装置
公开(公告)号：US20060255859A1
公开(公告)日：2006-11-16
申请号：US11125960
申请日：2005-05-10
申请人： Alfio Zanchi , Marco Corsi
发明人： Alfio Zanchi , Marco Corsi
IPC分类号： H03F3/16
CPC分类号： H03F3/4517 , H03F3/42 , H03F3/4508
摘要： A clock signal preamplifier comprises complementary pairs of differentially coupled transistors, with an output signal coupled to an inverter further comprising a totem-pole arrangement of complementary MOSFET transistors. The input signal to the preamplifier is typically sinusoidal, and the output signal is rectangular. Preferably, the differentially coupled transistors are bipolar, and a pair of diode damper circuits with bipolar transistors is preferably coupled to the complementary pairs of differentially coupled transistors. A reference voltage source is coupled to the control terminals of the damper transistors. A reference voltage source, which preferably comprises a totem-pole arrangement of complementary MOSFET transistors with its output node is coupled to its input node, provides a reference voltage for the diode damper circuits. Preferably, MOSFET transistors of the reference voltage source and MOSFET transistors of like kind of the inverter are configured to have substantially identical threshold voltages.
摘要翻译：时钟信号前置放大器包括互补的差分耦合晶体管对，其中耦合到反相器的输出信号还包括互补MOSFET晶体管的图腾柱布置。前置放大器的输入信号通常是正弦波，输出信号是矩形的。优选地，差分耦合晶体管是双极性的，并且具有双极晶体管的一对二极管阻尼电路优选地耦合到互补的差分耦合晶体管对。参考电压源耦合到阻尼晶体管的控制端。优选地包括具有其输出节点的互补MOSFET晶体管的图腾柱布置的参考电压源耦合到其输入节点，为二极管阻尼电路提供参考电压。优选地，参考电压源的MOSFET晶体管和类似类型的反相器的MOSFET晶体管被配置为具有基本相同的阈值电压。

6. 发明授权

US09405064B2 Microstrip line of different widths, ground planes of different distances 有权
标题翻译：不同宽度的微带线，不同距离的接地层
公开(公告)号：US09405064B2
公开(公告)日：2016-08-02
申请号：US13439557
申请日：2012-04-04
申请人： Juan A. Herbsommer , Robert F. Payne , Marco Corsi , Baher S. Haroun , Hassan Ali
发明人： Juan A. Herbsommer , Robert F. Payne , Marco Corsi , Baher S. Haroun , Hassan Ali
IPC分类号： G02B6/12 , H05K1/02 , G02B6/122 , H01P3/12
CPC分类号： H05K1/0239 , G02B6/12004 , G02B6/1228 , H01L2223/6627 , H01L2224/16227 , H01L2924/15311 , H01P3/121 , H01P3/16 , H05K1/0243 , H05K1/025 , H05K1/0274 , H05K1/115 , H05K1/18 , H05K2201/0187 , H05K2201/037 , H05K2201/09618 , H05K2201/10098
摘要： An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.
摘要翻译：提供了一种装置。存在具有封装基板和集成电路（IC）的电路组件。封装衬底具有微带线，并且IC被固定到封装衬底并且电耦合到微带线。电路板也固定到封装衬底。介质波导固定在电路板上。电介质波导具有延伸到位于电介质波导和微带线之间的过渡区域的介质芯，并且微带线被配置为与介质波导形成通信链路。

7. 发明申请

US20130265734A1 INTERCHIP COMMUNICATION USING EMBEDDED DIELECTRIC AND METAL WAVEGUIDES 审中-公开
标题翻译：使用嵌入式电介质和金属波导的交互通信
公开(公告)号：US20130265734A1
公开(公告)日：2013-10-10
申请号：US13439646
申请日：2012-04-04
申请人： Juan A. Herbsommer , Robert F. Payne , Marco Corsi , Baher S. Haroun , Hassan Ali
发明人： Juan A. Herbsommer , Robert F. Payne , Marco Corsi , Baher S. Haroun , Hassan Ali
IPC分类号： H05K1/14 , H05K1/11
CPC分类号： G02B6/12004 , G02B6/1228 , G02B6/43 , H01L2223/6627 , H01L2224/16227 , H01L2924/15311 , H01P3/121 , H01P3/122 , H01P5/107 , H05K1/0239 , H05K1/0243 , H05K1/025 , H05K1/0274 , H05K2201/0187 , H05K2201/037 , H05K2201/09618 , H05K2201/10098
摘要： An apparatus is provided. There is a circuit assembly with a package substrate and an integrated circuit (IC). The package substrate has a microstrip line, and the IC is secured to the package substrate and is electrically coupled to the microstrip line. A circuit board is also secured to the package substrate. A dielectric waveguide is secured to the circuit board. The dielectric waveguide has a dielectric core that extends into a transition region located between the dielectric waveguide and the microstrip line, and the microstrip line is configured to form a communication link with the dielectric waveguide.
摘要翻译：提供了一种装置。存在具有封装基板和集成电路（IC）的电路组件。封装衬底具有微带线，并且IC被固定到封装衬底并且电耦合到微带线。电路板也固定到封装衬底。介质波导固定在电路板上。电介质波导具有延伸到位于电介质波导和微带线之间的过渡区域的介质芯，并且微带线被配置为与介质波导形成通信链路。

8. 发明授权

US08305114B2 Track-and-hold circuit with low distortion 有权
标题翻译：具有低失真的跟踪保持电路
公开(公告)号：US08305114B2
公开(公告)日：2012-11-06
申请号：US12862455
申请日：2010-08-24
申请人： Marco Corsi , Robert F. Payne
发明人： Marco Corsi , Robert F. Payne
IPC分类号： H03K5/00
CPC分类号： G11C27/026 , H03M1/0624 , H03M1/1245
摘要： A track-and-hold circuit is provided. This track-and-hold circuit is adapted to track an analog input signal and hold a sampled voltage of the analog input signal at a sampling instant for processing by other circuitry, in response to a track signal that alternates with a hold signal. Preferably, the track-and-hold circuit includes a bi-directional current source that sources and sinks current through a first output node and a second output node, a unity gain amplifier that is coupled to first and second output nodes of the bi-directional current source and that receives the analog input signal, a resistor coupled to an output of the unity gain amplifier, and a capacitor coupled between the resistor and ground. Of interest, however, is the bi-directional current source, which includes a differential input circuit that is adapted to receive the track signal and the hold signal and that is coupled to the first and second output nodes and an RC network that is coupled to the differential input circuit. The RC network receives the analog input signal and is scaled to change the location of a zero to reduce the signal-dependence of the sampling instant.
摘要翻译：提供跟踪和保持电路。该跟踪和保持电路适于跟踪模拟输入信号并且在采样时刻保持模拟输入信号的采样电压，以响应于与保持信号交替的轨道信号由其它电路进行处理。优选地，跟踪和保持电路包括双向电流源，其通过第一输出节点和第二输出节点来源和吸收电流，单位增益放大器耦合到双向的第一和第二输出节点电流源，并且接收模拟输入信号，耦合到单位增益放大器的输出的电阻器和耦合在电阻器和地之间的电容器。然而，感兴趣的是双向电流源，其包括适于接收轨道信号和保持信号并且耦合到第一和第二输出节点的差分输入电路以及耦合到差分输入电路。 RC网络接收模拟输入信号，并被缩放以改变零点的位置以减小采样时刻的信号依赖性。

9. 发明授权

US08258774B2 System and method for implementing low-cost electronic gyroscopes and accelerometer 有权
标题翻译：实现低成本电子陀螺仪和加速度计的系统和方法
公开(公告)号：US08258774B2
公开(公告)日：2012-09-04
申请号：US12613049
申请日：2009-11-05
申请人： Chih-Ming Hung , Marco Corsi
发明人： Chih-Ming Hung , Marco Corsi
IPC分类号： G01R23/12 , G01P15/00
CPC分类号： G01C19/64 , G01R25/00
摘要： Accelerometers have a number of wide-ranging uses, and it is desirable to both increase their accuracy while decreasing size. Here, millimeter or sub-millimeter wavelength accelerometers are provided which has the advantage of having the high accuracy of an optical accelerometer, while being compact. Additionally, because millimeter or sub-millimeter wavelength signals are employed, cumbersome and awkward on-chip optical devices and bulky optical mediums can be avoided.
摘要翻译：加速度计有许多广泛的用途，并且希望在减小尺寸的同时提高精度。这里，提供毫米波或亚毫米波长的加速度计，其具有在紧凑的同时具有光学加速度计的高精度的优点。此外，由于采用了毫米波或亚毫米波长的信号，因此可以避免繁琐笨重的片上光学器件和庞大的光学介质。

10. 发明申请

US20120086589A1 PIPELINED CONTINUOUS-TIME SIGMA DELTA MODULATOR 有权
公开(公告)号：US20120086589A1
公开(公告)日：2012-04-12
申请号：US12899205
申请日：2010-10-06
申请人： Baher S. Haroun , Venkatesh Srinivasan , Patrick Satarzadeh , Marco Corsi
发明人： Baher S. Haroun , Venkatesh Srinivasan , Patrick Satarzadeh , Marco Corsi
IPC分类号： H03M1/06 , H03M3/00
CPC分类号： H03M3/344 , H03M3/458
摘要： Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating the pipeline. Here, however, a pipelined CT SDM is provided that has an architecture that is conducing to being calibrated. Namely, the system includes a digital filter and other features that can be adjusted to account for input imbalance errors and well as quantization leakage noise.

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