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1. 发明授权

US09163941B2 System and method for implementing low-cost electronic gyroscopes and accelerometer 有权
标题翻译：实现低成本电子陀螺仪和加速度计的系统和方法
公开(公告)号：US09163941B2
公开(公告)日：2015-10-20
申请号：US13566595
申请日：2012-08-03
申请人： Chih-Ming Hung , Marco Corsi
发明人： Chih-Ming Hung , Marco Corsi
IPC分类号： G01R23/12 , G01P3/00 , G01P15/14 , G01C19/64 , G01R25/00
CPC分类号： G01C19/64 , G01R25/00
摘要： Accelerometers have a number of wide-ranging uses, and it is desirable to both increase their accuracy while decreasing size. Here, millimeter or sub-millimeter wavelength accelerometers are provided which has the advantage of having the high accuracy of an optical accelerometer, while being compact. Additionally, because millimeter or sub-millimeter wavelength signals are employed, cumbersome and awkward on-chip optical devices and bulky optical mediums can be avoided.
摘要翻译：加速度计有许多广泛的用途，并且希望在减小尺寸的同时提高精度。这里，提供毫米波或亚毫米波长的加速度计，其具有在紧凑的同时具有光学加速度计的高精度的优点。此外，由于采用了毫米波或亚毫米波长的信号，因此可以避免繁琐笨重的片上光学器件和庞大的光学介质。

2. 发明授权

US07864494B2 Methodology to guard ESD protection circuits against precharge effects 有权
标题翻译：保护ESD保护电路免受预充电影响的方法
公开(公告)号：US07864494B2
公开(公告)日：2011-01-04
申请号：US12783240
申请日：2010-05-19
申请人： Chih-Ming Hung , Charvaka Duvvury
发明人： Chih-Ming Hung , Charvaka Duvvury
IPC分类号： H02H9/00
CPC分类号： H02H9/046
摘要： An ESD protection circuit (710) is guarded by a parallel first precharge elimination circuit (720) relative to an I/O pad (721) and a parallel second precharge elimination circuit (730) relative to a VDD pad (731). The precharge elimination circuits are synchronized with the ESD protection circuit to eliminate any precharge voltage to ground before an ESD pulse affects the I/O pad or VDD pad. A diode (722) is connected between I/O pad and VDD. Circuit (720) is between I/O pad and ground (740) and is powered by the same VDD. Circuit (720) includes a first resistor (723), a first nMOS transistor (724), and a first RC timer including a second resistor (725) and a first capacitor (726). Circuit (730) includes a third resistor (733), a second nMOS transistor (734), and a second RC timer including a fourth resistor (735) and a second capacitor (736).
摘要翻译： ESD保护电路（710）相对于VDD焊盘（731）相对于I / O焊盘（721）和并行的第二预充电消除电路（730）由并行的第一预充电消除电路（720）保护。预充电消除电路与ESD保护电路同步，以在ESD脉冲影响I / O焊盘或VDD焊盘之前消除任何对地的预充电电压。二极管（722）连接在I / O焊盘和VDD之间。电路（720）位于I / O焊盘和接地（740）之间，由相同的VDD供电。电路（720）包括第一电阻器（723），第一nMOS晶体管（724）和包括第二电阻器（725）和第一电容器（726）的第一RC定时器。电路（730）包括第三电阻器（733），第二nMOS晶体管（734）和包括第四电阻器（735）和第二电容器（736）的第二RC定时器。

3. 发明授权

US07808327B2 Method and apparatus to provide digitally controlled crystal oscillators 有权
标题翻译：提供数字控制晶体振荡器的方法和装置
公开(公告)号：US07808327B2
公开(公告)日：2010-10-05
申请号：US11500083
申请日：2006-08-07
申请人： Gennady Feygin , Khurram Muhammad , Chih-Ming Hung , Meng-Chang Lee
发明人： Gennady Feygin , Khurram Muhammad , Chih-Ming Hung , Meng-Chang Lee
IPC分类号： H03B27/00
CPC分类号： H03L7/24 , H03L1/026 , H03L3/00 , H03L7/0995
摘要： Methods and systems to provide digitally controlled crystal oscillators are disclosed. One example method includes determining a state of an oscillator system and selecting a first output of a digitally controlled crystal oscillator or a second output of a second oscillator based on the determination. In an example implementation, the second oscillator is a ring oscillator.
摘要翻译：公开了提供数字控制晶体振荡器的方法和系统。一个示例性方法包括基于该确定来确定振荡器系统的状态并选择数字控制的晶体振荡器的第一输出或第二振荡器的第二输出。在示例实现中，第二振荡器是环形振荡器。

4. 发明申请

US20090175378A1 System and Method for Impedance Mismatch Compensation in Digital Communications Systems 审中-公开
标题翻译：数字通信系统中阻抗不匹配补偿的系统与方法
公开(公告)号：US20090175378A1
公开(公告)日：2009-07-09
申请号：US12185920
申请日：2008-08-05
申请人： Robert Bogdan Staszewski , Daquan Huang , Chih-Ming Hung
发明人： Robert Bogdan Staszewski , Daquan Huang , Chih-Ming Hung
IPC分类号： H04L27/00
CPC分类号： H03H7/40 , H01P3/026 , H01P5/04 , H03F1/56 , H03F3/245 , H03F3/601 , H03F2200/387 , H03F2200/423
摘要： A system and method for digitally providing impedance mismatch compensation for a communications medium in a communications device. A method comprises producing a power amplifier (PA) output signal, providing the PA output signal to a digitally-controlled transmission line (DCTL), transforming a first load impedance to a second load impedance producing a DCTL output, and coupling the DCTL output to an antenna. The PA having the first load impedance and the transforming is controlled by a digital control word provided to the DCTL.
摘要翻译：一种用于数字地为通信设备中的通信介质提供阻抗失配补偿的系统和方法。一种方法包括产生功率放大器（PA）输出信号，将PA输出信号提供给数字控制传输线（DCTL），将第一负载阻抗变换到产生DCTL输出的第二负载阻抗，以及将DCTL输出耦合到天线。具有第一负载阻抗和变换的PA由提供给DCTL的数字控制字来控制。

5. 发明申请

US20090058789A1 Digital play system, LCD display module and display control method 审中-公开
标题翻译：数字播放系统，LCD显示模块及显示控制方式
公开(公告)号：US20090058789A1
公开(公告)日：2009-03-05
申请号：US12230271
申请日：2008-08-27
申请人： Chih-Ming Hung , Tsu-Huai Chan
发明人： Chih-Ming Hung , Tsu-Huai Chan
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/2096 , G09G2310/0229 , G09G2340/0407
摘要： The present invention provides a digital play system, comprising a signal conversion unit to receive a video signal and convert it into image data; and a LCD display module consisting of a timing controller to receive said image data and output row control signals and pixel data, a row driver to receive row control signals and output row driving signals, and a display panel to receive the row driving signals and pixel data, wherein the timing controller controls the row driver to output odd row driving signals and even row driving signals to display alternately odd-row array and even-row array of the display panel.
摘要翻译：本发明提供了一种数字播放系统，包括：信号转换单元，用于接收视频信号并将其转换为图像数据; 以及LCD显示模块，其由定时控制器组成，用于接收所述图像数据并输出行控制信号和像素数据，用于接收行控制信号和输出行驱动信号的行驱动器，以及用于接收行驱动信号和像素的显示面板数据，其中定时控制器控制行驱动器以输出奇数行驱动信号以及甚至行驱动信号以交替显示显示面板的奇数行阵列和偶数行阵列。

6. 发明申请

US20080278250A1 System and method for increasing frequency tuning range 有权
标题翻译：增加频率调谐范围的系统和方法
公开(公告)号：US20080278250A1
公开(公告)日：2008-11-13
申请号：US11801716
申请日：2007-05-10
申请人： Chih-Ming Hung , Nathen Barton
发明人： Chih-Ming Hung , Nathen Barton
IPC分类号： H03B7/14 , G06F17/50 , H04M1/00
CPC分类号： G06F17/5063 , H03B5/1215 , H03B5/1225 , H03B5/1228 , H03B5/1231 , H03B5/124 , H03B5/1265 , H03B5/1268 , H03B5/1296 , H03B2201/0216
摘要： System and method for increasing the frequency tuning range of a RF/microwave LC oscillator. An electronic communications device includes a controller to regulate the operation of the electronic communications device, a modem coupled to the controller, a radio frequency unit coupled to the controller and to the modem, an oscillator coupled to the controller and to the radio frequency unit, and an amplifier coupled to the radio frequency unit. The oscillator produces a timing and reference signal for the radio frequency unit based on control information from the controller. The oscillator includes a multi-tap inductor that may controllably alter its effective inductance to change the timing and reference signal provided to the radio frequency unit.
摘要翻译：用于增加RF /微波LC振荡器的频率调谐范围的系统和方法。电子通信设备包括：控制器，用于调节电子通信设备的操作;耦合到控制器的调制解调器，耦合到控制器和调制解调器的射频单元，耦合到控制器和射频单元的振荡器，以及耦合到射频单元的放大器。振荡器基于来自控制器的控制信息产生用于射频单元的定时和参考信号。振荡器包括可以可控地改变其有效电感以改变提供给射频单元的定时和参考信号的多抽头电感器。

7. 发明授权

US07405685B2 Negative contributive offset compensation in a transmit buffer utilizing inverse clocking 有权
标题翻译：使用反向时钟的发送缓冲器中的负贡献偏移补偿
公开(公告)号：US07405685B2
公开(公告)日：2008-07-29
申请号：US11178993
申请日：2005-07-11
申请人： Sameh S. Rezeq , Dirk Leipold , Robert B. Staszewski , Chih-Ming Hung
发明人： Sameh S. Rezeq , Dirk Leipold , Robert B. Staszewski , Chih-Ming Hung
IPC分类号： H03M3/00
CPC分类号： H03F1/0205 , H03F1/3241 , H03F2200/331 , H03F2200/375 , H03M3/356 , H03M3/50 , H03M7/3026 , H03M7/3037 , H04L27/368
摘要： A novel method and apparatus for a negative contributive offset compensation mechanism for a transmit buffer adapted to compensate for the positive offset generated by higher order sigma-delta modulators used to amplitude modulate the transmit buffer. The positive outputs from the sigma-delta modulator are processed differently than the negative outputs. The inverters associated with the negative outputs in the sigma-delta modulator are removed and the clock signal used to drive the transistors corresponding to the negative outputs is negated or shifted 180 degrees from the clock used to drive the transistors corresponding to the positive outputs. A non-inverted version of the clock is used with the positive outputs and an inverse clock is used with the negative outputs. Use of the inverse clock causes a negative contributive offset to be generated that is added on the second half cycle of each clock. The result is an offset compensated RF output signal having zero offset.
摘要翻译：一种用于发射缓冲器的负贡献偏移补偿机制的新颖方法和装置，适用于补偿由用于幅度调制发射缓冲器的高阶Σ-Δ调制器产生的正偏移。来自Σ-Δ调制器的正输出的处理方式与负输出不同。与Σ-Δ调制器中的负输出相关联的反相器被去除，并且用于驱动对应于负输出的晶体管的时钟信号与用于驱动对应于正输出的晶体管的时钟相反或偏移180度。时钟的非反相版本与正输出一起使用，反向时钟与负输出一起使用。使用逆时钟将产生在每个时钟的第二个半周期上添加的负贡献偏移。结果是具有零偏移的偏移补偿RF输出信号。

8. 发明授权

US07330082B2 Oscillator system, method of providing a resonating signal and a communications system employing the same 有权
标题翻译：振荡器系统，提供谐振信号的方法和采用该谐振信号的通信系统
公开(公告)号：US07330082B2
公开(公告)日：2008-02-12
申请号：US10924220
申请日：2004-08-23
申请人： Chih-Ming Hung , Robert B. Staszewski , Dirk Leipol
发明人： Chih-Ming Hung , Robert B. Staszewski , Dirk Leipol
IPC分类号： H03B5/18
CPC分类号： H03B5/08
摘要： An nth-order oscillator system for providing a resonating signal, a method of generating a resonating signal and a communications system. In one embodiment, the nth-order oscillator system, n being greater than two, includes (1) an amplifier configured to provide an intermediate signal and (2) a feedback loop including an nth-order complex LC tank and configured to generate the resonating signal by feeding back a complex-filtered form of the intermediate signal to the amplifier.
摘要翻译：一种用于提供谐振信号的第n / O级振荡器系统，产生谐振信号的方法和通信系统。在一个实施例中，n大于2的n阶振荡器系统包括（1）被配置为提供中间信号的放大器和（2）包括n + 并且被配置为通过将中间信号的复数滤波形式反馈到放大器来产生谐振信号。

9. 发明申请

US20070262446A1 STACKED BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：堆叠式结构及其制造方法
公开(公告)号：US20070262446A1
公开(公告)日：2007-11-15
申请号：US11535498
申请日：2006-09-27
申请人： Chih-Ming Hung
发明人： Chih-Ming Hung
IPC分类号： H01L23/48
CPC分类号： H01L24/85 , H01L23/52 , H01L24/03 , H01L24/11 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/78 , H01L24/81 , H01L2224/03 , H01L2224/0401 , H01L2224/04042 , H01L2224/05624 , H01L2224/1134 , H01L2224/13144 , H01L2224/1613 , H01L2224/45144 , H01L2224/4809 , H01L2224/48091 , H01L2224/4813 , H01L2224/48464 , H01L2224/48482 , H01L2224/48624 , H01L2224/78301 , H01L2224/81194 , H01L2224/81801 , H01L2224/85051 , H01L2224/85399 , H01L2924/01005 , H01L2924/01013 , H01L2924/01033 , H01L2924/01079 , H01L2924/01322 , H01L2924/14 , H01L2924/00014 , H01L2924/00
摘要： A method for manufacturing a stacked bump structure including the following steps is provided. First, a substrate having multiple bonding pads disposed on a surface thereof is provided. Next, a first bump and a second bump are respectively formed on any two adjacent bonding pads of the substrate. Then, a third bump is formed between the first bump and the second bump by wire bonding technology, so as to make the two adjacent bonding pads electrically connected to each other through the third bump.
摘要翻译：提供一种用于制造包括以下步骤的堆叠凸块结构的方法。首先，提供具有设置在其表面上的多个接合焊盘的基板。接下来，在衬底的任何两个相邻的焊盘上分别形成第一凸块和第二凸块。然后，通过引线接合技术在第一凸块和第二凸块之间形成第三凸块，以使两个相邻的焊盘通过第三凸块彼此电连接。

10. 发明授权

US07280330B2 ESD protection for RF power amplifier circuits 有权
标题翻译： RF功率放大器电路的ESD保护
公开(公告)号：US07280330B2
公开(公告)日：2007-10-09
申请号：US10936308
申请日：2004-09-08
申请人： Ismail H. Oguzman , Charvaka Duvvury , Chih-Ming Hung
发明人： Ismail H. Oguzman , Charvaka Duvvury , Chih-Ming Hung
IPC分类号： H02H9/00
CPC分类号： H01L27/0251 , H03F1/52 , H03F2200/294 , H03F2200/372
摘要： An electrostatic discharge (ESD) device for protecting a power amplifier circuit is disclosed. The ESD device comprises a first ESD protection circuit coupled between a positive terminal of a supply voltage and a negative terminal of the supply voltage, and a second ESD protection circuit coupled between the negative terminal of the supply voltage and an output terminal of the power amplifier circuit, wherein a first current path is formed from the positive terminal to the output terminal through the first and second ESD protection circuits. A circuit device operative to increase impedance of a second current path from the positive terminal to the output terminal through the power amplifier circuit to divert current from the second current path to the first current path in the course of an ESD event.
摘要翻译：公开了一种用于保护功率放大器电路的静电放电（ESD）装置。 ESD器件包括耦合在电源电压的正极端子和电源电压的负极端子之间的第一ESD保护电路和耦合在电源电压的负极端子和功率放大器的输出端子之间的第二ESD保护电路电路，其中通过所述第一和第二ESD保护电路从所述正极端子到所述输出端子形成第一电流路径。电路装置，其可操作以通过功率放大器电路增加从正端子到输出端子的第二电流路径的阻抗，以在ESD事件的过程中将电流从第二电流路径转移到第一电流路径。

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