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1. 发明申请

US20070105302A1 Integrated circuit formed on a semiconductor substrate 审中-公开
标题翻译：集成电路形成在半导体衬底上
公开(公告)号：US20070105302A1
公开(公告)日：2007-05-10
申请号：US11269897
申请日：2005-11-09
申请人： Albert Birner , Andreas Weber , Frank Ludwig , Jorg Radecker , Kimberly Wilson , Kerstin Mothes
发明人： Albert Birner , Andreas Weber , Frank Ludwig , Jorg Radecker , Kimberly Wilson , Kerstin Mothes
IPC分类号： H01L21/76 , H01L21/8242
CPC分类号： H01L27/10861 , H01L27/10844 , H01L27/1087
摘要： An integrated circuit is provided, which is formed on a semiconductor substrate. The integrated circuit comprises electronic elements and isolation elements, wherein the electronic elements and the isolation elements are arranged at a top surface of the semiconductor substrate. The isolation elements each are arranged between electronic elements and electrically isolate the electronic elements from each other. Furthermore, the isolation elements comprise an upper part and a lower part, wherein the upper part is broader than the lower part.
摘要翻译：提供了形成在半导体衬底上的集成电路。集成电路包括电子元件和隔离元件，其中电子元件和隔离元件布置在半导体衬底的顶表面。隔离元件各自布置在电子元件之间并将电子元件彼此电隔离。此外，隔离元件包括上部和下部，其中上部比下部更宽。

2. 发明授权

US08853051B2 Methods of recessing an active region and STI structures in a common etch process 有权
标题翻译：在普通蚀刻工艺中凹陷有源区和STI结构的方法
公开(公告)号：US08853051B2
公开(公告)日：2014-10-07
申请号：US13445596
申请日：2012-04-12
申请人： Frank Jakubowski , Jorg Radecker , Frank Ludwig
发明人： Frank Jakubowski , Jorg Radecker , Frank Ludwig
IPC分类号： H01L21/76
CPC分类号： H01L21/76232 , H01L21/76283
摘要： Generally, the present disclosure is directed to various methods of recessing an active region and an adjacent isolation structure in a common etch process. One illustrative method disclosed includes forming an isolation structure in a semiconducting substrate, wherein the isolation structure defines an active area in the substrate, forming a patterned masking layer above the substrate, wherein the patterned masking layer exposes the active area and at least a portion of the isolation structure for further processing, and performing a non-selective dry etching process on the exposed active area and the exposed portion of the isolation structure to define a recess in the substrate and to remove at least some of the exposed portions of the isolation structure.
摘要翻译：通常，本公开涉及在公共蚀刻工艺中凹陷有源区和相邻隔离结构的各种方法。所公开的一种示例性方法包括在半导体衬底中形成隔离结构，其中隔离结构限定衬底中的有源区，在衬底上形成图案化掩蔽层，其中图案化掩蔽层暴露有源区和至少部分用于进一步处理的隔离结构，以及在暴露的有源区域和隔离结构的暴露部分上执行非选择性干蚀刻工艺，以限定衬底中的凹部并且去除隔离结构的至少一些暴露部分。

3. 发明申请

US20130273709A1 METHODS OF RECESSING AN ACTIVE REGION AND STI STRUCTURES IN A COMMON ETCH PROCESS 有权
标题翻译：在常见蚀刻过程中记录活动区域和STI结构的方法
公开(公告)号：US20130273709A1
公开(公告)日：2013-10-17
申请号：US13445596
申请日：2012-04-12
申请人： Frank Jakubowski , Jorg Radecker , Frank Ludwig
发明人： Frank Jakubowski , Jorg Radecker , Frank Ludwig
IPC分类号： H01L21/76
CPC分类号： H01L21/76232 , H01L21/76283
摘要： Generally, the present disclosure is directed to various methods of recessing an active region and an adjacent isolation structure in a common etch process. One illustrative method disclosed includes forming an isolation structure in a semiconducting substrate, wherein the isolation structure defines an active area in the substrate, forming a patterned masking layer above the substrate, wherein the patterned masking layer exposes the active area and at least a portion of the isolation structure for further processing, and performing a non-selective dry etching process on the exposed active area and the exposed portion of the isolation structure to define a recess in the substrate and to remove at least some of the exposed portions of the isolation structure.
摘要翻译：通常，本公开涉及在公共蚀刻工艺中凹陷有源区和相邻隔离结构的各种方法。所公开的一种示例性方法包括在半导体衬底中形成隔离结构，其中隔离结构限定衬底中的有源区，在衬底上形成图案化掩模层，其中图案化掩蔽层暴露有源区和至少部分用于进一步处理的隔离结构，以及在暴露的有源区域和隔离结构的暴露部分上执行非选择性干蚀刻工艺，以限定衬底中的凹部并且去除隔离结构的至少一些暴露部分。

4. 发明申请

US20080044980A1 Method of forming a semiconductor device 失效
标题翻译：形成半导体器件的方法
公开(公告)号：US20080044980A1
公开(公告)日：2008-02-21
申请号：US11507647
申请日：2006-08-21
申请人： Kimberly Wilson , Hans-Peter Moll , Rolf Weis , Phillip Stopford , Frank Ludwig
发明人： Kimberly Wilson , Hans-Peter Moll , Rolf Weis , Phillip Stopford , Frank Ludwig
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , Y10S438/942 , Y10S438/952
摘要： A method of forming a semiconductor device includes depositing a fill material (4) on a substrate portion (2) and on a dielectric layer (3) being disposed on the substrate (1) and having an opening (10) located above the substrate portion (2), removing the fill material (4) disposed above the dielectric layer (3), thereby leaving an exposed top surface (6) of the dielectric layer (3) and residual fill material (15) within the opening (10), forming a hard mask material (5) on the exposed top surface (6) of the dielectric layer (3) and on the residual fill material (15), patterning the hard mask material (5) for forming a hard mask (25) having trenches (8a, 8b) extending along a lateral direction (X) and exposing portions of the residual fill material (15) adjacent to the dielectric layer (3) and portions of the dielectric layer (3) adjacent to the residual fill material (15), anisotropically etching the dielectric layer (3), the residual fill material (15) and the substrate (1) selectively to the hard mask (5), thereby forming at least a first and a second isolation trench (11a, 11b) extending along the lateral direction (X).
摘要翻译：一种形成半导体器件的方法包括在衬底部分（2）上沉积填充材料（4）和设置在衬底（1）上并具有位于衬底部分上方的开口（10）的介电层（3）（2），去除设置在电介质层（3）上方的填充材料（4），从而在开口（10）内留下介电层（3）的暴露的顶表面（6）和残余填充材料（15）在所述介电层（3）的暴露的顶表面（6）和所述残留填充材料（15）上形成硬掩模材料（5），对所述硬掩模材料（5）进行图案化以形成硬掩模（25），所述硬掩模材料（25）沿着横向方向（X）延伸的沟槽（8a，8b）和暴露邻近电介质层（3）的残余填充材料（15）的部分和与残余填充材料相邻的介电层（3）的部分（15），各向异性地蚀刻介电层（3），残留填充材料（15）和基板（1）选择性地连接到硬掩模（5），从而形成沿着横向（X）延伸的至少第一和第二隔离沟槽（11a，11b）。

5. 发明授权

US07754579B2 Method of forming a semiconductor device 失效
标题翻译：形成半导体器件的方法
公开(公告)号：US07754579B2
公开(公告)日：2010-07-13
申请号：US11507647
申请日：2006-08-21
申请人： Kimberly Wilson , Hans-Peter Moll , Rolf Weis , Phillip Stopford , Frank Ludwig
发明人： Kimberly Wilson , Hans-Peter Moll , Rolf Weis , Phillip Stopford , Frank Ludwig
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , Y10S438/942 , Y10S438/952
摘要： A method of forming a semiconductor device includes depositing a fill material (4) on a substrate portion (2) and on a dielectric layer (3) being disposed on the substrate (1) and having an opening (10) located above the substrate portion (2), removing the fill material (4) disposed above the dielectric layer (3), thereby leaving an exposed top surface (6) of the dielectric layer (3) and residual fill material (15) within the opening (10), forming a hard mask material (5) on the exposed top surface (6) of the dielectric layer (3) and on the residual fill material (15), patterning the hard mask material (5) for forming a hard mask (25) having trenches (8a, 8b) extending along a lateral direction (X) and exposing portions of the residual fill material (15) adjacent to the dielectric layer (3) and portions of the dielectric layer (3) adjacent to the residual fill material (15), anisotropically etching the dielectric layer (3), the residual fill material (15) and the substrate (1) selectively to the hard mask (5), thereby forming at least a first and a second isolation trench (11a, 11b) extending along the lateral direction (X).
摘要翻译：一种形成半导体器件的方法包括在衬底部分（2）上沉积填充材料（4）和设置在衬底（1）上并具有位于衬底部分上方的开口（10）的介电层（3）（2），去除设置在电介质层（3）上方的填充材料（4），从而在开口（10）内留下介电层（3）的暴露的顶表面（6）和残余填充材料（15）在所述介电层（3）的暴露的顶表面（6）和所述残留填充材料（15）上形成硬掩模材料（5），对所述硬掩模材料（5）进行图案化以形成硬掩模（25），所述硬掩模材料（25）沿着横向方向（X）延伸的沟槽（8a，8b）和暴露与电介质层（3）相邻的残余填充材料（15）的部分和与残余填充材料（15）相邻的介电层（3）的部分），各向异性蚀刻介电层（3），残留填充材料（15）和基板（1）从而形成至少沿横向（X）延伸的第一和第二隔离沟槽（11a，11b）。

6. 发明申请

US20070212849A1 Method of fabricating a groove-like structure in a semiconductor device 审中-公开
标题翻译：在半导体器件中制造凹槽状结构的方法
公开(公告)号：US20070212849A1
公开(公告)日：2007-09-13
申请号：US11373064
申请日：2006-03-10
申请人： Frank Ludwig , Kimberly Wilson , Arabinda Das , Hans-Peter Sperlich , Andreas Klipp , Kristin Schupke
发明人： Frank Ludwig , Kimberly Wilson , Arabinda Das , Hans-Peter Sperlich , Andreas Klipp , Kristin Schupke
IPC分类号： H01L21/76
CPC分类号： H01L21/76229
摘要： The present invention relates to a method of fabricating a groove-like structure in a semiconductor device including etching a trench in a substrate, filling the trench with a spin-on-glass liquid forming a spin-on-glass liquid layer containing a solvent, baking the spin-on-glass liquid layer in order to remove the solvent and forming a baked layer, etching the baked layer to a predetermined depth using an etchant that provides a larger etch rate with regard to silicon than with regard to silicon nitride or silicon oxide, and, after etching the baked layer, annealing the remaining baked layer and forming a spin-on-glass oxide layer inside the trench.
摘要翻译：本发明涉及一种在半导体器件中制造凹槽状结构的方法，包括蚀刻衬底中的沟槽，用形成包含溶剂的旋涂玻璃液体层的旋涂玻璃液填充沟槽，烘烤旋涂玻璃液体层以除去溶剂并形成烘烤层，使用提供相对于硅的蚀刻速率比硅相对于氮化硅或硅的蚀刻剂将烘焙层蚀刻到预定深度并且在蚀刻所述烘烤层之后，对所述剩余的烘烤层进行退火并在所述沟槽内形成旋涂玻璃氧化物层。

7. 发明申请

US20110122977A1 SELF-COMPENSATING DRIFT-FREE HIGH-FREQUENCY PHASE DETECTOR CIRCUIT 有权
标题翻译：自补偿无高速高频相位检测电路
公开(公告)号：US20110122977A1
公开(公告)日：2011-05-26
申请号：US12301950
申请日：2007-05-21
申请人： Frank Ludwig
发明人： Frank Ludwig
IPC分类号： H04L1/00
CPC分类号： H03D13/007
摘要： The present invention relates to a phase detector circuit (10) having an RF distribution device (20) which is intended to receive two sinusoidal high-frequency signals (RF, LO) with an input phase difference (φRF(t)−φLO(t)) and comprises two power splitters (21, 22) in order to split the two high-frequency signals (RF, LO) into two respective parts, a self-calibrating phase detector module (30) which is configured to receive one respective part of the two high-frequency signals which have been split, a low-noise phase detector module (40) which is configured to receive the respective other part of the high-frequency signals which have been split, and a complementary filter device (50) which is configured to receive the output signals from the self-calibrating phase detector module (30) and the low-noise phase detector module (40) and to output a signal which indicates the time-dependent input phase difference between the two high-frequency signals (RF, LO).
摘要翻译：本发明涉及一种具有RF分配装置（20）的相位检测器电路（10），该RF分配装置旨在接收具有输入相位差的两个正弦高频信号（RF，LO）（＆phgr; RF（t） - ＆phgr ; LO（t）），并且包括两个功率分配器（21,22），以便将两个高频信号（RF，LO）分成两个相应部分;自校准相位检测器模块（30），其被配置为接收已经被分离的两个高频信号的相应部分;低噪声相位检测器模块（40），被配置为接收已经被分离的高频信号的相应的另一部分;以及互补滤波器设备（50），其被配置为从所述自校准相位检测器模块（30）和所述低噪声相位检测器模块（40）接收所述输出信号，并且输出指示所述自校准相位检测器模块两个高频信号（RF，LO）。

8. 发明授权

US09472124B2 Safety label covering an individual packaging 有权
标题翻译：安全标签覆盖单个包装
公开(公告)号：US09472124B2
公开(公告)日：2016-10-18
申请号：US13394480
申请日：2010-08-31
申请人： Frank Ludwig , Reinhard Kuge , Marco Dieling
发明人： Frank Ludwig , Reinhard Kuge , Marco Dieling
IPC分类号： B42D15/00 , G09F3/00 , A61J1/03 , B65D75/36
CPC分类号： G09F3/0292 , A61J1/035 , B65D75/367 , B65D2215/00 , B65D2575/367
摘要： The invention relates to a security label for protecting medicaments contained in an individual packaging, comprising a security layer (10, 110, 210) that can be stuck on the individual packaging. Removable elements (16, 216) are formed in the security layer (10, 110, 210), in the region of the medicaments (15) to be inserted, in such a way that cuts (17) are made in the security layer (10, 110, 210), on the edge of the removable elements (16, 216), said cuts (17) following a virtual cut strip. In order to produce such a security label that can be easily opened, but still provides protection against unauthorized opening by children or inadvertent opening, and can be produced cost-effectively, obstacle points are provided on the cut strip, forming a resistance when the removal element is removed.
摘要翻译：本发明涉及一种用于保护包含在单个包装中的药物的安全标签，其包括可粘贴在单个包装上的安全层（10,110,210）。可拆卸元件（16,216）形成在安全层（10,110,210）中，在待插入的药物（15）的区域中，以这样的方式，在安全层中形成切口（17） 10,110,210），在所述可拆卸元件（16,216）的边缘上，所述切口（17）跟随虚拟切割条。为了生产易于打开的这种安全标签，但仍然提供防止儿童未经授权打开或无意打开的保护标签，并且可以成本有效地制造，在切割条上提供障碍点，当移除时形成阻力元素被删除。

9. 发明授权

US08978890B2 Security label for protecting medicaments contained in an individual packaging 有权
标题翻译：用于保护包装在个人包装中的药物的安全标签
公开(公告)号：US08978890B2
公开(公告)日：2015-03-17
申请号：US13394497
申请日：2010-08-31
申请人： Frank Ludwig , Reinhard Kuge , Marco Dieling
发明人： Frank Ludwig , Reinhard Kuge , Marco Dieling
IPC分类号： B65D83/04 , G09F3/00 , A61J1/03 , B65D75/36
CPC分类号： G09F3/0292 , A61J1/03 , A61J1/035 , B65D75/367 , B65D2215/00 , B65D2575/367
摘要： The invention relates to a security label for protecting medicaments contained in an individual packaging, comprising a base layer (11, 111, 211) that can be stuck to the individual packaging (10, 110), at least one opening cut (26, 226) being formed in the base layer (11, 111, 211), in the region of the medicament (16). A security layer (10, 110) is stuck to the base layer (11, 111, 211), and removable elements (19) are formed in the security layer (10, 11) in the region of the medicaments (16), in such a way that cuts (18) are made in the security layer (10, 110) on the edge of the removable elements (19), said cuts (18) following a virtual cut strip. Furthermore, a release material which reduces or eliminates the adhesive force of the adhesive of the security layer (10, 110) is applied to the base layer (11, 111, 211) in the region of the removable elements (19).
摘要翻译：本发明涉及一种用于保护包含在单个包装中的药物的安全标签，包括可粘附到单个包装（10,110）的基层（11,111,211），至少一个开口（26,226））形成在所述基底层（11,111,211）中，在所述药物（16）的区域中。安全层（10,110）粘附到基层（11,111,211）上，并且可拆卸元件（19）在药物（16）的区域中形成在安全层（10,11）中，这样一种方式，在可拆卸元件（19）的边缘上的安全层（10,110）中形成切口（18），所述切口（18）跟随虚拟切割条。此外，减少或消除安全层（10,110）的粘合剂的粘合力的释放材料在可移除元件（19）的区域中被施加到基底层（11,111,211）。

10. 发明授权

US08865283B2 Security label for securing medications retained in an individual packaging 有权
标题翻译：用于固定保存在单独包装中的药物的安全标签
公开(公告)号：US08865283B2
公开(公告)日：2014-10-21
申请号：US13394479
申请日：2010-08-31
申请人： Frank Ludwig , Reinhard Kuge , Marco Dieling
发明人： Frank Ludwig , Reinhard Kuge , Marco Dieling
IPC分类号： B65D83/04 , G09F3/03 , B65D75/36 , G09F3/00 , A61J1/03
CPC分类号： G09F3/0341 , A61J1/035 , B65D75/367 , B65D2215/00 , B65D2575/3236 , B65D2575/367 , G09F3/0292 , Y10T428/15
摘要： The present invention relates to a security label for securing medications retained in an individual packaging, comprising a base layer (10, 20, 30) that can be adhesively bonded to the individual packaging (12, 22, 32), wherein at least one opening cut (17, 37, 47, 57, 67, 77, 87, 97, 107, 117, 127, 137, 147, 157) per medication (16) is provided in the base layer (10, 20, 30) in the area of the expected medications (16), wherein the opening cut (17, 37, 47, 57, 67, 77, 87, 97, 107, 117, 127, 137, 147, 157) has at least one first and one second partial cut, and wherein the first partial cut and the second partial cut meet or cross, wherein two, three, four, or five opening cuts (17, 37, 47, 57, 67, 77, 87, 97, 107, 117, 127, 137, 147, 157) are provided in the area of the expected medication (16), and the opening cuts (17, 37, 47, 57, 67, 77, 87, 97, 107, 117, 127, 137, 147, 157); are arranged exclusively along a segment of the contour of the medication (16) or along a segment of the contour of the medication trough, wherein the segment makes up approximately one half to one sixth, preferably one fourth, of the contour.
摘要翻译：本发明涉及一种用于固定保存在单个包装中的药物的安全标签，其包括可以粘合地结合到单个包装（12,22,32）的基层（10,20,30），其中至少一个开口在每个药物（16）中的切割（17,37,47,57,67,77,87,97,107,117,127,137,147,157）在基层（10,20,30）中设置预期药物（16）的面积，其中开口切口（17,37,47,57,67,77,87,97,107,117,127,137,147,157）具有至少一个第一和第二秒其中第一部分切割和第二部分切割相交或交叉，其中两个，三个，四个或五个开口切口（17,37,47,57,67,77,87,97,107,117,117， 127，137,147,157）设置在所述预期药物（16）的区域中，并且所述开口切口（17,37,47,57,67,77,87,97,107,117,127,137， 147，157）; 沿着药物（16）的轮廓的一部分排列或者沿着药物槽的轮廓的段布置，其中该段构成轮廓的大约一半到六分之一，优选地四分之一。

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