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    • 2. 发明申请
    • Capacitor with Three-Dimensional High Surface Area Electrode and Methods of Manufacture
    • 具有三维高表面积电极的电容器及其制造方法
    • US20110310528A1
    • 2011-12-22
    • US12969186
    • 2010-12-15
    • Liang ChaiAlan RaeJim Wilson
    • Liang ChaiAlan RaeJim Wilson
    • H01G4/06H01G7/00
    • H01G4/10H01G4/005H01G4/008H01G4/12H01G4/1209H01G4/30Y10T29/43Y10T29/435
    • A capacitor, and methods of its manufacture, having improved capacitance efficiency which results from increasing the effective area of an electrode surface are disclosed. An improved “three-dimensional” capacitor may be constructed with electrode layers having three-dimensional aspects at the point of interface with a dielectric such that portions of the electrode extend into the dielectric layer. Advantageously, embodiments of a three-dimensional capacitor drastically reduce the space footprint that is required in a circuit to accommodate the capacitor, when compared to current capacitor designs. Increased capacitance density may be realized without using high k (high constant) dielectric materials, additional “electrode-dielectric-electrode” arrangements in an ever increasing stack, or serially stringing together multiple capacitors.
    • 公开了一种电容器及其制造方法,其具有由于增加电极表面的有效面积而提高的电容效率。 可以在与电介质的界面点处具有三维方面的电极层来构造改进的“三维”电容器,使得电极的一部分延伸到电介质层中。 有利的是,与当前的电容器设计相比,三维电容器的实施例大大减少了电路中所需的容纳电容器的空间足迹。 可以在不使用高k(高常数)电介质材料的情况下实现增加的电容密度,而在不断增加的叠层中使用附加的“电极 - 电介质电极”布置,或者串联连接多个电容器。
    • 6. 发明授权
    • Methods for manufacture a capacitor with three-dimensional high surface area electrodes
    • 制造具有三维高表面积电极的电容器的方法
    • US08561271B2
    • 2013-10-22
    • US12969186
    • 2010-12-15
    • Liang ChaiAlan RaeJames M Wison
    • Liang ChaiAlan RaeJames M Wison
    • H01G4/10
    • H01G4/10H01G4/005H01G4/008H01G4/12H01G4/1209H01G4/30Y10T29/43Y10T29/435
    • A method for making a capacitor having improved capacitance efficiency which results from increasing the effective area of an electrode surface is disclosed. Specifically, an improved “three-dimensional” capacitor may be constructed with electrode layers having three-dimensional aspects at the point of interface with a dielectric such that portions of the electrode extend into the dielectric layer. Advantageously, embodiments of a three-dimensional capacitor drastically reduce the space footprint that is required in a circuit to accommodate the capacitor, when compared to current capacitor designs. Increased capacitance density may be realized without using high k (high constant) dielectric materials, additional “electrode-dielectric-electrode” arrangements in an ever increasing stack, or serially stringing together multiple capacitors.
    • 公开了一种通过增加电极表面的有效面积制造具有提高的电容效率的电容器的方法。 具体地说,改进的“三维”电容器可以由与电介质接合点的三维方面的电极层构成,使得电极的一部分延伸到电介质层中。 有利的是,与当前的电容器设计相比,三维电容器的实施例大大减少了电路中所需的容纳电容器的空间足迹。 可以在不使用高k(高常数)电介质材料的情况下实现增加的电容密度,而在不断增加的叠层中使用附加的“电极 - 电介质电极”布置,或者串联连接多个电容器。