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1. 发明授权

US07304831B2 Ceramic electronic component and multilayer capacitor 有权
标题翻译：陶瓷电子元器件和多层电容器
公开(公告)号：US07304831B2
公开(公告)日：2007-12-04
申请号：US11347296
申请日：2006-02-06
申请人： Akitoshi Yoshii , Taisuke Ahiko , Atsushi Takeda , Shirou Ootsuki , Shinya Onodera , Miki Kimura , Hiromi Kikuchi
发明人： Akitoshi Yoshii , Taisuke Ahiko , Atsushi Takeda , Shirou Ootsuki , Shinya Onodera , Miki Kimura , Hiromi Kikuchi
IPC分类号： H01G4/06
CPC分类号： H01G4/2325
摘要： A multilayer capacitor comprises a ceramic sintered body, an internal electrode disposed in the ceramic sintered body, and an external electrode disposed on an external surface of the ceramic sintered body. The external electrode has a first electrode layer formed on the external surface of the ceramic sintered body, a second electrode layer formed on the first electrode layer, and a conductive resin layer formed on the second electrode layer. The internal electrode and the first electrode layer consist primarily of a base metal. The second electrode layer consists primarily of a noble metal or a noble metal alloy. The conductive resin layer contains a noble metal or a noble metal alloy as a conductive material.
摘要翻译：多层电容器包括陶瓷烧结体，设置在陶瓷烧结体中的内部电极和设置在陶瓷烧结体的外表面上的外部电极。外部电极具有形成在陶瓷烧结体的外表面上的第一电极层，形成在第一电极层上的第二电极层和形成在第二电极层上的导电树脂层。内部电极和第一电极层主要由贱金属组成。第二电极层主要由贵金属或贵金属合金构成。导电性树脂层含有作为导电材料的贵金属或贵金属合金。

2. 发明申请

US20060187613A1 Ceramic electronic component and multilayer capacitor 有权
标题翻译：陶瓷电子元器件和多层电容器
公开(公告)号：US20060187613A1
公开(公告)日：2006-08-24
申请号：US11347296
申请日：2006-02-06
申请人： Akitoshi Yoshii , Taisuke Ahiko , Atsushi Takeda , Shirou Ootsuki , Shinya Onodera , Miki Kimura , Hiromi Kikuchi
发明人： Akitoshi Yoshii , Taisuke Ahiko , Atsushi Takeda , Shirou Ootsuki , Shinya Onodera , Miki Kimura , Hiromi Kikuchi
IPC分类号： H01G4/06
CPC分类号： H01G4/2325
摘要： A multilayer capacitor comprises a ceramic sintered body, an internal electrode disposed in the ceramic sintered body, and an external electrode disposed on an external surface of the ceramic sintered body. The external electrode has a first electrode layer formed on the external surface of the ceramic sintered body, a second electrode layer formed on the first electrode layer, and a conductive resin layer formed on the second electrode layer. The internal electrode and the first electrode layer consist primarily of a base metal. The second electrode layer consists primarily of a noble metal or a noble metal alloy. The conductive resin layer contains a noble metal or a noble metal alloy as a conductive material.
摘要翻译：多层电容器包括陶瓷烧结体，设置在陶瓷烧结体中的内部电极和设置在陶瓷烧结体的外表面上的外部电极。外部电极具有形成在陶瓷烧结体的外表面上的第一电极层，形成在第一电极层上的第二电极层和形成在第二电极层上的导电树脂层。内部电极和第一电极层主要由贱金属组成。第二电极层主要由贵金属或贵金属合金构成。导电性树脂层含有作为导电材料的贵金属或贵金属合金。

3. 发明授权

US5342219A Terminal-locking construction 失效
标题翻译：端子锁定结构
公开(公告)号：US5342219A
公开(公告)日：1994-08-30
申请号：US28195
申请日：1993-03-09
申请人： Shinya Onodera , Toshiharu Kawashima
发明人： Shinya Onodera , Toshiharu Kawashima
IPC分类号： H01R13/422 , H01R13/428 , H01R13/40
CPC分类号： H01R13/422 , H01R13/428
摘要： A housing has a groove-like terminal-receiving cavity. The terminal-receiving cavity receives a female terminal therein. The female terminal has a first engagement portion at a longitudinal end thereof and a second engagement portion at a longitudinally intermediate position thereof. The terminal-receiving cavity is formed with a third engagement portion therein at one longitudinal end thereof, the third engagement portion engaging the first engagement portion when the terminal is fully inserted into the terminal receiving cavity. The terminal-receiving cavity is formed with a fourth engagement portion at a longitudinally intermediate position thereof, the fourth engagement portion engaging the second locking portion when the terminal is fully inserted into the terminal receiving cavity. When assembling the terminal into the terminal-receiving cavity, the first engagement portion of the terminal is first engaged the third engagement portion and thereafter the terminal is pivotally rotated about an engagement between the first and third engagement portions into the terminal-receiving cavity unit the second engagement portion firmly engages the fourth engagement portion.
摘要翻译：壳体具有凹槽状的端子容纳腔。端子接收腔在其中容纳阴端子。阴端子在其纵向端部具有第一接合部分，在其纵向中间位置具有第二接合部分。端子容纳腔在其一个纵向端部处形成有第三接合部，当端子完全插入端子容纳腔时，第三接合部接合第一接合部。端子容纳腔在其纵向中间位置处形成有第四接合部，当端子完全插入端子容纳腔时，第四接合部接合第二锁定部。当将端子组装到端子容纳腔中时，端子的第一接合部分首先接合第三接合部分，然后端子围绕第一和第三接合部分之间的接合枢转旋转到端子接收腔单元中第二接合部牢固地接合第四接合部。

4. 发明申请

US20060028785A1 Multilayer capacitor 有权
标题翻译：多层电容器
公开(公告)号：US20060028785A1
公开(公告)日：2006-02-09
申请号：US11240835
申请日：2005-10-03
申请人： Masaaki Togashi , Shinya Onodera
发明人： Masaaki Togashi , Shinya Onodera
IPC分类号： H01G4/06
CPC分类号： H01G4/30 , H01G4/012
摘要： A dielectric body 12 has internal conductor layers 14 arranged in it. At the far sides of the internal conductor layers 14 separated by ceramic layers 12A, internal conductor layers 16 are arranged. A length W of a side of the dielectric body 12 running along a stacking direction Y of the ceramic layers is made longer than the lengths L and T of any other two sides running along directions (X- and Y-directions) intersecting the side running along the stacking direction (Y-direction). The internal conductor layers 14 and 16 are formed with cut parts 18a and 18b, the internal conductor layers 14 are divided into channel parts 20A and 20B across the cut part 18a, and the internal conductor layers 16 are divided into channel parts 22A and 22B across the cut part 18b. These channel parts are connected through uncut ends 19, whereby the current flows in reverse directions. It is therefore possible to greatly reduce the effective inductance of the multilayer capacitor and reduce the voltage fluctuations of the CPU power source.
摘要翻译：绝缘体12具有布置在其中的内部导体层14。在由陶瓷层12A分开的内部导体层14的远侧设置有内部导体层16。沿着陶瓷层的堆叠方向Y延伸的电介质体12的一侧的长度W比沿着与侧面行进方向（X方向和Y方向）相交的任何其他两侧的长度L和T长沿着层叠方向（Y方向）。内部导体层14和16形成有切割部分18a和18b，内部导体层14跨越切割部分18a被分成通道部分20A和20B，内部导体层16被分成通道部分22A和22B穿过切割部分18b。这些通道部分通过未切割端19连接，由此电流沿相反的方向流动。因此，可以大大降低层叠电容器的有效电感，并降低CPU电源的电压波动。

5. 发明授权

US07888182B2 Electronic component, production method of electronic component, mounted structure of electronic component, and evaluation method of electronic component 有权
标题翻译：电子部件，电子部件的制造方法，电子部件的安装结构以及电子部件的评价方法
公开(公告)号：US07888182B2
公开(公告)日：2011-02-15
申请号：US11715345
申请日：2007-03-08
申请人： Shinya Onodera , Mikio Tsuruoka
发明人： Shinya Onodera , Mikio Tsuruoka
IPC分类号： H01L21/00
CPC分类号： H05K3/323 , H01C1/01 , H01C1/148 , H01C7/18 , H01G2/06 , H01G4/228 , H01G4/30 , H01L2224/32225 , H05K2201/10727
摘要： An electronic component having an element body having at least one plane, and a terminal electrode to be electrically connected through an electroconductive particle to a circuit substrate. The terminal electrode is formed on the plane of the element body. When the plane of the element body is defined as a reference plane, a ratio of a projected area onto the reference plane of an external surface of the terminal electrode opposed to the circuit substrate in a region where a height of the terminal electrode from the reference plane is not less than a value resulting from subtraction of a diameter of the electroconductive particle from a maximum of the height, to a projected area onto the reference plane of the external surface of the terminal electrode opposed to the circuit substrate is set to be not less than 10%.
摘要翻译：具有至少一个平面的元件本体的电子部件和通过导电粒子与电路基板电连接的端子电极。端子电极形成在元件体的平面上。当元件体的平面被定义为参考平面时，在终端电极的高度与参考电极的区域中的投影面积与端子电极的与电路基板相对的外表面的参考平面的比率平面不小于从最大高度减去导电颗粒的直径到与电路基板相对的端子电极的外表面的参考平面上的投影面积的值不是小于10％。

6. 发明授权

US07180723B2 Multilayer capacitor 有权
标题翻译：多层电容器
公开(公告)号：US07180723B2
公开(公告)日：2007-02-20
申请号：US11240835
申请日：2005-10-03
申请人： Masaaki Togashi , Shinya Onodera
发明人： Masaaki Togashi , Shinya Onodera
IPC分类号： H01G4/05 , H01G4/228 , H01G4/20
CPC分类号： H01G4/30 , H01G4/012
摘要： A dielectric body 12 has internal conductor layers 14 arranged in it. At the far sides of the internal conductor layers 14 separated by ceramic layers 12A, internal conductor layers 16 are arranged. A length W of a side of the dielectric body 12 running along a stacking direction Y of the ceramic layers is made longer than the lengths L and T of any other two sides running along directions (X- and Y-directions) intersecting the side running along the stacking direction (Y-direction). The internal conductor layers 14 and 16 are formed with cut parts 18a and 18b, the internal conductor layers 14 are divided into channel parts 20A and 20B across the cut part 18a, and the internal conductor layers 16 are divided into channel parts 22A and 22B across the cut part 18b. These channel parts are connected through uncut ends 19, whereby the current flows in reverse directions. It is therefore possible to greatly reduce the effective inductance of the multilayer capacitor and reduce the voltage fluctuations of the CPU power source.
摘要翻译：绝缘体12具有布置在其中的内部导体层14。在由陶瓷层12A分开的内部导体层14的远侧设置有内部导体层16。沿着陶瓷层的堆叠方向Y延伸的电介质体12的一侧的长度W比沿着与侧面行进方向（X方向和Y方向）相交的任何其他两侧的长度L和T长沿着层叠方向（Y方向）。内部导体层14和16形成有切割部分18a和18b，内部导体层14跨越切割部分18a被分成通道部分20A和20B，内部导体层16被分成通道部分22A和22B穿过切割部分18b。这些通道部分通过未切割端19连接，由此电流沿相反的方向流动。因此，可以大大降低层叠电容器的有效电感，并降低CPU电源的电压波动。

7. 发明申请

US20070228557A1 Electronic component, production method of electronic component, mounted structure of electronic component, and evaluation method of electronic component 有权
标题翻译：电子部件，电子部件的制造方法，电子部件的安装结构以及电子部件的评价方法
公开(公告)号：US20070228557A1
公开(公告)日：2007-10-04
申请号：US11715345
申请日：2007-03-08
申请人： Shinya Onodera , Mikio Tsuruoka
发明人： Shinya Onodera , Mikio Tsuruoka
IPC分类号： H01L23/48
CPC分类号： H05K3/323 , H01C1/01 , H01C1/148 , H01C7/18 , H01G2/06 , H01G4/228 , H01G4/30 , H01L2224/32225 , H05K2201/10727
摘要： An electronic component is comprised of an element body having at least one plane, and a terminal electrode to be electrically connected through an electroconductive particle to a circuit substrate. The terminal electrode is formed on the plane of the element body. When the plane of the element body is defined as a reference plane, a ratio of a projected area onto the reference plane of an external surface of the terminal electrode opposed to the circuit substrate in a region where a height of the terminal electrode from the reference plane is not less than a value resulting from subtraction of a diameter of the electroconductive particle from a maximum of the height, to a projected area onto the reference plane of the external surface of the terminal electrode opposed to the circuit substrate is set to be not less than 10%.
摘要翻译：电子部件由具有至少一个平面的元件主体和通过导电粒子与电路基板电连接的端子电极构成。端子电极形成在元件体的平面上。当元件体的平面被定义为参考平面时，在终端电极的高度与参考电极的区域中的投影面积与端子电极的与电路基板相对的外表面的参考平面的比率平面不小于从最大高度减去导电颗粒的直径到与电路基板相对的端子电极的外表面的参考平面上的投影面积的值不是小于10％。

8. 发明授权

US06965507B2 Multilayer capacitor 有权
标题翻译：多层电容器
公开(公告)号：US06965507B2
公开(公告)日：2005-11-15
申请号：US10775250
申请日：2004-02-11
申请人： Masaaki Togashi , Shinya Onodera
发明人： Masaaki Togashi , Shinya Onodera
IPC分类号： H01G4/12 , H01G4/005 , H01G4/012 , H01G4/20 , H01G4/228 , H01G4/30 , H02H7/16
CPC分类号： H01G4/30 , H01G4/012
摘要： A dielectric body 12 has internal conductor layers 14 arranged in it. At the far sides of the internal conductor layers 14 separated by ceramic layers 12A, internal conductor layers 16 are arranged. A length W of a side of the dielectric body 12 running along a stacking direction Y of the ceramic layers is made longer than the lengths L and T of any other two sides running along directions (X- and Y-directions) intersecting the side running along the stacking direction (Y-direction). The internal conductor layers 14 and 16 are formed with cut parts 18a and 18b, the internal conductor layers 14 are divided into channel parts 20A and 20B across the cut part 18a, and the internal conductor layers 16 are divided into channel parts 22A and 22B across the cut part 18b. These channel parts are connected through uncut ends 19, whereby the current flows in reverse directions. It is therefore possible to greatly reduce the effective inductance of the multilayer capacitor and reduce the voltage fluctuations of the CPU power source.
摘要翻译：绝缘体12具有布置在其中的内部导体层14。在由陶瓷层12A分开的内部导体层14的远侧设置有内部导体层16。沿着陶瓷层的堆叠方向Y延伸的电介质体12的一侧的长度W比沿着与侧面行进方向（X方向和Y方向）相交的任何其他两侧的长度L和T长沿着层叠方向（Y方向）。内部导体层14和16形成有切割部分18a和18b，内部导体层14跨越切割部分18a被分成通道部分20A和20B，内部导体层16被分成通道部分22A和22B穿过切割部分18b。这些通道部分通过未切割端19连接，由此电流沿相反的方向流动。因此，可以大大降低层叠电容器的有效电感，并降低CPU电源的电压波动。

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