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1. 发明申请

US20120258606A1 E-Beam Enhanced Decoupled Source for Semiconductor Processing 有权
标题翻译：用于半导体处理的电子束增强去耦源
公开(公告)号：US20120258606A1
公开(公告)日：2012-10-11
申请号：US13356962
申请日：2012-01-24
申请人： John Patrick Holland , Peter L. G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
发明人： John Patrick Holland , Peter L. G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
IPC分类号： H01L21/26 , H01L21/3065
CPC分类号： H01J37/32357 , H01J37/32376 , H01J37/32449 , H01J37/32596
摘要： A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes an electron injection device for injecting electrons into the processing chamber to control an electron energy distribution within the processing chamber so as to in turn control an ion-to-radical density ratio within the processing chamber. In one embodiment, an electron beam source is defined to transmit an electron beam through the processing chamber above and across the substrate support.
摘要翻译：半导体基板处理系统包括处理室和限定为在处理室中支撑基板的基板支撑件。该系统还包括与处理室分开限定的等离子体室。等离子体室被定义为产生等离子体。该系统还包括将等离子体室流体连接到处理室的多个流体传输路径。多个流体传输路径被限定为将等离子体的反应性组分从等离子体室提供给处理室。该系统还包括用于将电子注入到处理室中以控制处理室内的电子能量分布的电子注入装置，从而控制处理室内的离子 - 自由基密度比。在一个实施例中，电子束源被定义为将电子束透过衬底支撑件上方并穿过衬底支撑件的处理室。

2. 发明授权

US09177756B2 E-beam enhanced decoupled source for semiconductor processing 有权
标题翻译：用于半导体处理的电子束增强去耦源
公开(公告)号：US09177756B2
公开(公告)日：2015-11-03
申请号：US13357003
申请日：2012-01-24
申请人： John Patrick Holland , Peter L. G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
发明人： John Patrick Holland , Peter L. G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
IPC分类号： H01L21/3065 , C23F1/00 , H01J37/04 , H01J37/32
CPC分类号： H01J37/04 , H01J37/32018 , H01J37/32357 , H01J37/32596
摘要： A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes an electrode disposed within the processing chamber separate from the substrate support. The system also includes a power supply electrically connected to the electrode. The power supply is defined to supply electrical power to the electrode so as to liberate electrons from the electrode into the processing chamber.
摘要翻译：半导体基板处理系统包括处理室和限定为在处理室中支撑基板的基板支撑件。该系统还包括与处理室分开限定的等离子体室。等离子体室被定义为产生等离子体。该系统还包括将等离子体室流体连接到处理室的多个流体传输路径。多个流体传输路径被限定为将等离子体的反应性组分从等离子体室提供给处理室。该系统还包括设置在与衬底支撑件分开的处理室内的电极。该系统还包括电连接到电极的电源。电源被定义为向电极提供电力，以便将电子从电极释放到处理室中。

3. 发明授权

US09111728B2 E-beam enhanced decoupled source for semiconductor processing 有权
标题翻译：用于半导体处理的电子束增强去耦源
公开(公告)号：US09111728B2
公开(公告)日：2015-08-18
申请号：US13356962
申请日：2012-01-24
申请人： John Patrick Holland , Peter L. G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
发明人： John Patrick Holland , Peter L. G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
IPC分类号： H01J37/077 , H01J37/065 , H01J37/32 , H01J37/16
CPC分类号： H01J37/32357 , H01J37/32376 , H01J37/32449 , H01J37/32596
摘要： A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes an electron injection device for injecting electrons into the processing chamber to control an electron energy distribution within the processing chamber so as to in turn control an ion-to-radical density ratio within the processing chamber. In one embodiment, an electron beam source is defined to transmit an electron beam through the processing chamber above and across the substrate support.
摘要翻译：半导体基板处理系统包括处理室和限定为在处理室中支撑基板的基板支撑件。该系统还包括与处理室分开限定的等离子体室。等离子体室被定义为产生等离子体。该系统还包括将等离子体室流体连接到处理室的多个流体传输路径。多个流体传输路径被限定为将等离子体的反应性组分从等离子体室提供给处理室。该系统还包括用于将电子注入到处理室中以控制处理室内的电子能量分布的电子注入装置，从而控制处理室内的离子 - 自由基密度比。在一个实施例中，电子束源被定义为将电子束透过衬底支撑件上方并穿过衬底支撑件的处理室。

4. 发明授权

US08980046B2 Semiconductor processing system with source for decoupled ion and radical control 有权
标题翻译：半导体处理系统，具有去耦离子和自由基控制的源
公开(公告)号：US08980046B2
公开(公告)日：2015-03-17
申请号：US13431836
申请日：2012-03-27
申请人： Akira Koshiishi , Peter L. G. Ventzek , Jun Shinagawa , John Patrick Holland
发明人： Akira Koshiishi , Peter L. G. Ventzek , Jun Shinagawa , John Patrick Holland
IPC分类号： C23F1/00
CPC分类号： C23C16/45565 , C23C16/45574 , C23C16/509 , H01J37/32422 , H05H1/46 , H05H1/48 , H05H2001/466
摘要： A top plate assembly is positioned above and spaced apart from the substrate support, such that a processing region exists between the top plate assembly and the substrate support. The top plate assembly includes a central plasma generation microchamber and a plurality of annular-shaped plasma generation microchambers positioned in a concentric manner about the central plasma generation microchamber. Adjacently positioned ones of the central and annular-shaped plasma generation microchambers are spaced apart from each other so as to form a number of axial exhaust vents therebetween. Each of the central and annular-shaped plasma generation microchambers is defined to generate a corresponding plasma therein and supply reactive constituents of its plasma to the processing region between the top plate assembly and the substrate support.
摘要翻译：顶板组件位于基板支撑件的上方并与其间隔开，使得在顶板组件和基板支撑件之间存在处理区域。顶板组件包括中心等离子体生成微型室和围绕中心等离子体产生微室以同心方式定位的多个环形等离子体产生微室。中心和环形等离子体产生微室中的相邻定位的等离子体生成微室彼此间隔开，以便在它们之间形成多个轴向排气孔。中心和环形等离子体产生微室中的每一个被定义为在其中产生相应的等离子体，并且将其等离子体的反应性组分提供给顶板组件和衬底支撑件之间的加工区域。

5. 发明申请

US20130157469A1 Semiconductor Processing System with Source for Decoupled Ion and Radical Control 有权
标题翻译：具有解耦离子和自由基控制源的半导体处理系统
公开(公告)号：US20130157469A1
公开(公告)日：2013-06-20
申请号：US13431836
申请日：2012-03-27
申请人： Akira Koshiishi , Peter L. G. Ventzek , Jun Shinagawa , John Patrick Holland
发明人： Akira Koshiishi , Peter L. G. Ventzek , Jun Shinagawa , John Patrick Holland
IPC分类号： H01L21/3065 , H05H1/24 , C23C16/50
CPC分类号： C23C16/45565 , C23C16/45574 , C23C16/509 , H01J37/32422 , H05H1/46 , H05H1/48 , H05H2001/466
摘要： A top plate assembly is positioned above and spaced apart from the substrate support, such that a processing region exists between the top plate assembly and the substrate support. The top plate assembly includes a central plasma generation microchamber and a plurality of annular-shaped plasma generation microchambers positioned in a concentric manner about the central plasma generation microchamber. Adjacently positioned ones of the central and annular-shaped plasma generation microchambers are spaced apart from each other so as to form a number of axial exhaust vents therebetween. Each of the central and annular-shaped plasma generation microchambers is defined to generate a corresponding plasma therein and supply reactive constituents of its plasma to the processing region between the top plate assembly and the substrate support.
摘要翻译：顶板组件位于基板支撑件的上方并与其间隔开，使得在顶板组件和基板支撑件之间存在处理区域。顶板组件包括中心等离子体生成微型室和围绕中心等离子体产生微室以同心方式定位的多个环形等离子体产生微室。中心和环形等离子体产生微室中的相邻定位的等离子体生成微室彼此间隔开，以便在它们之间形成多个轴向排气孔。中心和环形等离子体产生微室中的每一个被定义为在其中产生相应的等离子体，并且将其等离子体的反应性组分提供给顶板组件和衬底支撑件之间的加工区域。

6. 发明申请

US20120258607A1 E-Beam Enhanced Decoupled Source for Semiconductor Processing 审中-公开
标题翻译：用于半导体处理的电子束增强去耦源
公开(公告)号：US20120258607A1
公开(公告)日：2012-10-11
申请号：US13357044
申请日：2012-01-24
申请人： John Patrick Holland , Peter L.G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
发明人： John Patrick Holland , Peter L.G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
IPC分类号： H01L21/26 , H01L21/3065
CPC分类号： H01J37/32357
摘要： A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes a plurality of power delivery components defined to deliver power to the plurality of fluid transmission pathways, so as to generate supplemental plasma within the plurality of fluid transmission pathways. The plurality of fluid transmission pathways are defined to supply reactive constituents of the supplemental plasma to the processing chamber.
摘要翻译：半导体基板处理系统包括处理室和限定为在处理室中支撑基板的基板支撑件。该系统还包括与处理室分开限定的等离子体室。等离子体室被定义为产生等离子体。该系统还包括将等离子体室流体连接到处理室的多个流体传输路径。多个流体传输路径被限定为将等离子体的反应性组分从等离子体室提供给处理室。该系统还包括多个功率输送部件，其被定义成将功率输送到多个流体传输路径，以便在多个流体传输通路内产生补充等离子体。多个流体传输路径被限定为将补充等离子体的反应性成分提供给处理室。

7. 发明申请

US20120258601A1 E-Beam Enhanced Decoupled Source for Semiconductor Processing 有权
标题翻译：用于半导体处理的电子束增强去耦源
公开(公告)号：US20120258601A1
公开(公告)日：2012-10-11
申请号：US13357003
申请日：2012-01-24
申请人： John Patrick Holland , Peter L.G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
发明人： John Patrick Holland , Peter L.G. Ventzek , Harmeet Singh , Jun Shinagawa , Akira Koshiishi
IPC分类号： H01L21/3065
CPC分类号： H01J37/04 , H01J37/32018 , H01J37/32357 , H01J37/32596
摘要： A semiconductor substrate processing system includes a processing chamber and a substrate support defined to support a substrate in the processing chamber. The system also includes a plasma chamber defined separate from the processing chamber. The plasma chamber is defined to generate a plasma. The system also includes a plurality of fluid transmission pathways fluidly connecting the plasma chamber to the processing chamber. The plurality of fluid transmission pathways are defined to supply reactive constituents of the plasma from the plasma chamber to the processing chamber. The system further includes an electrode disposed within the processing chamber separate from the substrate support. The system also includes a power supply electrically connected to the electrode. The power supply is defined to supply electrical power to the electrode so as to liberate electrons from the electrode into the processing chamber.
摘要翻译：半导体基板处理系统包括处理室和限定为在处理室中支撑基板的基板支撑件。该系统还包括与处理室分开限定的等离子体室。等离子体室被定义为产生等离子体。该系统还包括将等离子体室流体连接到处理室的多个流体传输路径。多个流体传输路径被限定为将等离子体的反应性组分从等离子体室提供给处理室。该系统还包括设置在与衬底支撑件分开的处理室内的电极。该系统还包括电连接到电极的电源。电源被定义为向电极提供电力，以便将电子从电极释放到处理室中。

8. 发明申请

US20120052683A1 PITCH REDUCTION USING OXIDE SPACER 有权
标题翻译：使用氧化物间距减少PITCH
公开(公告)号：US20120052683A1
公开(公告)日：2012-03-01
申请号：US12742073
申请日：2008-11-07
申请人： Jisoo Kim , Conan Chiang , Jun Shinagawa , S.M. Reza Sadjadi
发明人： Jisoo Kim , Conan Chiang , Jun Shinagawa , S.M. Reza Sadjadi
IPC分类号： H01L21/302 , B23K10/00
CPC分类号： H01L21/31144 , H01L21/02126 , H01L21/02211 , H01L21/02274 , H01L21/0228 , H01L21/02337 , H01L21/0234 , H01L21/0337 , H01L21/0338 , H01L21/31612 , H01L21/31654 , H01L21/32139
摘要： A method for etching an etch layer disposed over a substrate and below an antireflective coating (ARC) layer and a patterned organic mask with mask features is provided. The substrate is placed in a process chamber. The ARC layer is opened. An oxide spacer deposition layer is formed. The oxide spacer deposition layer on the organic mask is partially removed, where at least the top portion of the oxide spacer deposition layer is removed. The organic mask and the ARC layer are removed by etching. The etch layer is etched through the sidewalls of the oxide spacer deposition layer. The substrate is removed from the process chamber.
摘要翻译：提供了一种用于蚀刻设置在基板上方并且在抗反射涂层（ARC）层下方的蚀刻层和具有掩模特征的图案化有机掩模的方法。将基板放置在处理室中。 ARC层打开。形成氧化物间隔物沉积层。部分去除有机掩模上的氧化物间隔物沉积层，其中氧化物间隔物沉积层的至少顶部被去除。通过蚀刻去除有机掩模和ARC层。通过氧化物隔离层沉积层的侧壁蚀刻蚀刻层。将衬底从处理室中取出。

9. 发明授权

US08592318B2 Pitch reduction using oxide spacer 有权
标题翻译：使用氧化物间隔物进行减径
公开(公告)号：US08592318B2
公开(公告)日：2013-11-26
申请号：US12742073
申请日：2008-11-07
申请人： Jisoo Kim , Conan Chiang , Jun Shinagawa , S. M. Reza Sadjadi
发明人： Jisoo Kim , Conan Chiang , Jun Shinagawa , S. M. Reza Sadjadi
IPC分类号： H01L21/302 , B44C1/22
CPC分类号： H01L21/31144 , H01L21/02126 , H01L21/02211 , H01L21/02274 , H01L21/0228 , H01L21/02337 , H01L21/0234 , H01L21/0337 , H01L21/0338 , H01L21/31612 , H01L21/31654 , H01L21/32139
摘要： A method for etching an etch layer disposed over a substrate and below an antireflective coating (ARC) layer and a patterned organic mask with mask features is provided. The substrate is placed in a process chamber. The ARC layer is opened. An oxide spacer deposition layer is formed. The oxide spacer deposition layer on the organic mask is partially removed, where at least the top portion of the oxide spacer deposition layer is removed. The organic mask and the ARC layer are removed by etching. The etch layer is etched through the sidewalls of the oxide spacer deposition layer. The substrate is removed from the process chamber.
摘要翻译：提供了一种用于蚀刻设置在基板上方并且在抗反射涂层（ARC）层下方的蚀刻层和具有掩模特征的图案化有机掩模的方法。将基板放置在处理室中。 ARC层打开。形成氧化物间隔物沉积层。部分去除有机掩模上的氧化物间隔物沉积层，其中氧化物间隔物沉积层的至少顶部被去除。通过蚀刻除去有机掩模和ARC层。通过氧化物隔离层沉积层的侧壁蚀刻蚀刻层。将衬底从处理室中取出。

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