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1. 发明授权

US08062489B2 Method for forming artificial lipid membrane 有权
标题翻译：人造脂膜形成方法
公开(公告)号：US08062489B2
公开(公告)日：2011-11-22
申请号：US12971885
申请日：2010-12-17
申请人： Akio Oki , Norihito Tsukahara , Masato Suzuki , Hiroaki Oka
发明人： Akio Oki , Norihito Tsukahara , Masato Suzuki , Hiroaki Oka
IPC分类号： G01N27/327 , G01N33/92 , B01L3/00
CPC分类号： G01N33/48728
摘要： An object of the present invention is to provide a method for stably forming an artificial lipid membrane while suppressing the leakage and evaporation of an electrolytic solution. The present invention is an artificial lipid membrane forming method for forming an artificial lipid membrane using an artificial lipid membrane forming apparatus. The artificial lipid membrane forming apparatus comprises a first chamber, a second chamber, a dividing wall, and an artificial lipid membrane forming portion. Each of the first chamber and the second chamber has a capacity of not smaller than 10 pl and not larger than 200 μl. The artificial lipid membrane forming method of the present invention comprises the steps of: preparing the artificial lipid membrane forming apparatus; adding to the first chamber a first electrolytic solution having a viscosity of not lower than 1.3 mPa·s and not higher than 200 mPa·s; adding a lipid solution to the artificial lipid membrane forming portion; adding to the second chamber a second electrolytic solution having a viscosity of not lower than 1.3 mPa·s and not higher than 200 mPa·s; and forming the artificial lipid membrane.
摘要翻译：本发明的目的是提供一种在抑制电解液的泄漏和蒸发的同时稳定地形成人造脂膜的方法。本发明是使用人造脂质膜形成装置形成人造脂质膜的人造脂质膜形成方法。人造脂膜形成装置包括第一室，第二室，分隔壁和人造脂膜形成部。第一室和第二室中的每一个具有不小于10pl且不大于200μl的容量。本发明的人造脂膜形成方法包括以下步骤：制备人造脂膜形成装置; 向第一室中加入粘度不低于1.3mPa·s且不高于200mPa·s的第一电解液; 向人造脂膜形成部分添加脂质溶液; 向第二室中加入粘度不低于1.3mPa·s且不高于200mPa·s的第二电解液; 并形成人造脂膜。

2. 发明申请

US20110083793A1 METHOD FOR FORMING ARTIFICIAL LIPID MEMBRANE 有权
标题翻译：形成人造脂膜的方法
公开(公告)号：US20110083793A1
公开(公告)日：2011-04-14
申请号：US12971885
申请日：2010-12-17
申请人： Akio OKI , Norihito Tsukahara , Masato Suzuki , Hiroaki Oka
发明人： Akio OKI , Norihito Tsukahara , Masato Suzuki , Hiroaki Oka
IPC分类号： B29C39/02 , C25F3/14 , B05D1/04 , B05D5/00 , B32B38/00
CPC分类号： G01N33/48728
摘要： An object of the present invention is to provide a method for stably forming an artificial lipid membrane while suppressing the leakage and evaporation of an electrolytic solution.The present invention is an artificial lipid membrane forming method for forming an artificial lipid membrane using an artificial lipid membrane forming apparatus. The artificial lipid membrane forming apparatus comprises a first chamber, a second chamber, a dividing wall, and an artificial lipid membrane forming portion. Each of the first chamber and the second chamber has a capacity of not smaller than 10 pl and not larger than 200 μl. The artificial lipid membrane forming method of the present invention comprises the steps of: preparing the artificial lipid membrane forming apparatus; adding to the first chamber a first electrolytic solution having a viscosity of not lower than 1.3 mPa·s and not higher than 200 mPa·s; adding a lipid solution to the artificial lipid membrane forming portion; adding to the second chamber a second electrolytic solution having a viscosity of not lower than 1.3 mPa·s and not higher than 200 mPa·s; and forming the artificial lipid membrane.
摘要翻译：本发明的目的是提供一种在抑制电解液的泄漏和蒸发的同时稳定地形成人造脂膜的方法。本发明是使用人造脂质膜形成装置形成人造脂质膜的人造脂质膜形成方法。人造脂膜形成装置包括第一室，第二室，分隔壁和人造脂膜形成部。第一室和第二室中的每一个具有不小于10pl且不大于200μl的容量。本发明的人造脂膜形成方法包括以下步骤：制备人造脂膜形成装置; 向第一室中加入粘度不低于1.3mPa·s且不高于200mPa·s的第一电解液; 向人造脂膜形成部分添加脂质溶液; 向第二室中加入粘度不低于1.3mPa·s且不高于200mPa·s的第二电解液; 并形成人造脂膜。

3. 发明申请

US20140054170A1 BIOSENSOR DEVICE 审中-公开
标题翻译：生物传感器设备
公开(公告)号：US20140054170A1
公开(公告)日：2014-02-27
申请号：US14113697
申请日：2012-02-17
申请人： Norihito Tsukahara , Keiko Ikuta , Akio Oki
发明人： Norihito Tsukahara , Keiko Ikuta , Akio Oki
IPC分类号： G01N27/327
CPC分类号： G01N27/327 , G01N27/40 , G01N33/5438 , G01N33/92
摘要： A biosensor device which is possible to be downsized and potable, is free of the problem of solution outflow, and enables detection accurately and stably is realized. A biosensor device (30) having an artificial lipid membrane is provided with an artificial lipid membrane (1) having first and second membrane surfaces (1a, 1b) which are located opposite each other, a first chamber (11a) for encapsulating a first electrolyte solution (2a) in contact with the first membrane surface (1a) of the artificial lipid membrane, a second chamber (11b) for encapsulating a second electrolyte solution (2b) in contact with the second membrane surface (1b) of the artificial lipid membrane, first electrodes (3a, 3a′) for contacting the first electrolyte solution (2a) in the first chamber (11a), and second electrodes (3b, 3b′) for contacting the second electrolyte solution (2b) in the second chamber (11b), wherein the second chamber (11b) has gas permeability at its wall portion (10) for encapsulating the second electrolyte solution (2b) in at least a wall thickness direction.
摘要翻译：可以小型化并且可饮用的生物传感器装置没有溶液流出的问题，能够准确，稳定地进行检测。具有人造脂膜的生物传感器装置（30）设置有具有彼此相对定位的第一和第二膜表面（1a，1b）的人造脂膜（1），用于封装第一电解质与人造脂膜的第一膜表面（1a）接触的溶液（2a），用于封装与人造脂膜的第二膜表面（1b）接触的第二电解质溶液（2b）的第二室（11b），用于与第一室（11a）中的第一电解液（2a）接触的第一电极（3a，3a'）和用于接触第二室（11b）中的第二电解液（2b）的第二电极），其中所述第二室（11b）在其壁部（10）处具有气体渗透性，用于将所述第二电解质溶液（2b）封装在至少壁厚方向上。

4. 发明申请

US20100052996A1 STORAGE MEDIUM WITH BUILT-IN ANTENNA 失效
标题翻译：存储天线与内置天线
公开(公告)号：US20100052996A1
公开(公告)日：2010-03-04
申请号：US11993734
申请日：2006-07-10
申请人： Shozo Ochi , Norihito Tsukahara , Kazuhiro Ikurumi
发明人： Shozo Ochi , Norihito Tsukahara , Kazuhiro Ikurumi
IPC分类号： H01Q7/06 , H01Q1/24
CPC分类号： H05K1/16 , G06K19/07732 , G06K19/07767 , H01Q1/2275 , H01Q1/2283 , H01Q1/38 , H01Q7/00 , H05K1/147 , H05K1/181 , H05K2201/056 , H05K2201/10674
摘要： A storage medium with built-in antenna includes circuit board on which semiconductor element is placed, first and second magnetic layers sandwiching semiconductor element and circuit board, and first and second antenna coils disposed on first and second magnetic layers. First and second antenna coils are connected in parallel on a flexible sheet. First and second antenna coils are folded at the sides of first and second magnetic layers, respectively, and electrically connected to semiconductor element.
摘要翻译：具有内置天线的存储介质包括其上放置有半导体元件的电路板，夹持半导体元件和电路板的第一和第二磁性层以及设置在第一和第二磁性层上的第一和第二天线线圈。第一和第二天线线圈并联连接在柔性片上。第一和第二天线线圈分别在第一和第二磁性层的侧面折叠并电连接到半导体元件。

5. 发明授权

US07381902B2 Wiring board and method of manufacturing the same 失效
标题翻译：接线板及其制造方法
公开(公告)号：US07381902B2
公开(公告)日：2008-06-03
申请号：US10951620
申请日：2004-09-29
申请人： Norihito Tsukahara , Kazuhiro Nishikawa
发明人： Norihito Tsukahara , Kazuhiro Nishikawa
IPC分类号： H05K1/09
CPC分类号： H05K3/249 , H05K1/095 , H05K3/207 , H05K2201/035
摘要： A wiring board comprises a patterned wiring formed of electrically conductive resin composed primarily of silver and embedded into a substrate in a manner that a surface thereof is exposed above the substrate, and a covering conductor formed primarily of carbon covering the surface of the patterned wiring. The wiring board of this structure is superior in resistance to moisture absorption and water, prevents silver migration attributable to the moisture, and reduces contact resistance in the connection between a terminal portion of the wiring board and an external apparatus.
摘要翻译：布线板包括由主要由银构成并以其表面暴露在基板上方的方式嵌入到基板中的导电树脂形成的图案布线，以及主要由覆盖图案化布线表面的碳形成的覆盖导体。该结构的布线基板具有优异的耐吸湿性和防水性，防止由于水分引起的银迁移，并且降低了布线板的端子部分与外部设备之间的连接中的接触电阻。

6. 发明授权

US07375421B2 High density multilayer circuit module 失效
标题翻译：高密度多层电路模块
公开(公告)号：US07375421B2
公开(公告)日：2008-05-20
申请号：US11147864
申请日：2005-06-08
申请人： Daisuke Sakurai , Kazuhiro Nishikawa , Norihito Tsukahara
发明人： Daisuke Sakurai , Kazuhiro Nishikawa , Norihito Tsukahara
IPC分类号： H01R4/58 , H01L23/48
CPC分类号： H01L25/50 , H01L23/5384 , H01L23/5387 , H01L23/5389 , H01L24/97 , H01L25/0652 , H01L2224/16 , H01L2224/16225 , H01L2224/48091 , H01L2224/48227 , H01L2225/0652 , H01L2225/06541 , H01L2225/06555 , H01L2225/06572 , H01L2225/06579 , H01L2225/06593 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3011 , H05K1/185 , H05K1/189 , H05K2201/055 , H01L2924/00014 , H01L2924/00
摘要： Thinning and stacking are essential for circuit modules used for mobile devices of various kinds, smart cards, memory cards and the like. These demands make the manufacture of the circuit modules more complicated or less reliable due to delamination. A circuit module of a multilayer structure is provided which is formed by embedding semiconductor chips and passive components in a sheet made from a thermoplastic resin; folding a module sheet, which is formed of circuit blocks provided with wiring patterns thereon, at the boundaries of the circuit blocks so as to be stacked into layers; and thermal-bonding and integrating the module sheet by applying heat and pressure. As a result, a highly reliable circuit module can be manufactured in a simple manner.
摘要翻译：变薄和堆叠对于用于各种移动设备，智能卡，存储卡等的电路模块是必不可少的。这些要求使得电路模块的制造由于分层而更复杂或更不可靠。提供了一种多层结构的电路模块，其通过将半导体芯片和无源部件嵌入由热塑性树脂制成的片材中而形成; 在电路块的边界处折叠由在其上设置有布线图案的电路块形成的模块片，以堆叠成层; 并通过施加热和压力进行热粘合和集成模块片。结果，可以以简单的方式制造高可靠性的电路模块。

7. 发明授权

US07071090B2 Semiconductor element having protruded bump electrodes 失效
标题翻译：具有凸起电极的半导体元件
公开(公告)号：US07071090B2
公开(公告)日：2006-07-04
申请号：US11073714
申请日：2005-03-08
申请人： Kazushi Higashi , Norihito Tsukahara , Takahiro Yonezawa , Yoshihiko Yagi , Yoshifumi Kitayama , Hiroyuki Otani
发明人： Kazushi Higashi , Norihito Tsukahara , Takahiro Yonezawa , Yoshihiko Yagi , Yoshifumi Kitayama , Hiroyuki Otani
IPC分类号： H01L21/44
CPC分类号： H01L24/78 , H01L24/11 , H01L24/13 , H01L2224/11003 , H01L2224/1134 , H01L2224/11822 , H01L2224/13017 , H01L2224/13018 , H01L2224/13019 , H01L2224/13082 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1329 , H01L2224/133 , H01L2224/16225 , H01L2224/45015 , H01L2224/451 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/78303 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , Y10T29/49179 , Y10T29/49181 , H01L2224/13099 , H01L2224/48 , H01L2924/00 , H01L2924/20752 , H01L2924/00015 , H01L2924/00012 , H01L2224/05599 , H01L2224/85399
摘要： A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
摘要翻译：在IC电极上形成突起电极的方法包括以下步骤：通过引线接合装置在IC电极上形成球接合，向上移动接合毛细管，向上移动接合毛细管然后向下移动接合毛细管，将Au线接合到球接合部分，并切割Au线。通过将接合毛细管的下降位置预设为高于形成球形接合位置的位置，可防止Au线与球接合部分以外的球接合部分周围接触。

8. 发明授权

US06971167B2 Multilayered circuit board forming method and multilayered circuit board 失效
标题翻译：多层电路板成型方法和多层电路板
公开(公告)号：US06971167B2
公开(公告)日：2005-12-06
申请号：US10611868
申请日：2003-07-03
申请人： Kazuhiro Nishikawa , Norihito Tsukahara , Hiroyuki Otani
发明人： Kazuhiro Nishikawa , Norihito Tsukahara , Hiroyuki Otani
IPC分类号： H05K3/46 , H05K3/00 , H01K3/10
CPC分类号： H05K3/0017 , H05K3/002 , H05K3/0041 , H05K3/4644 , H05K2201/0179 , H05K2201/0376 , H05K2203/0278 , H05K2203/0582 , Y10T29/49117 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165
摘要： A multilayered circuit board and a method of forming the multilayered circuit board are provided. In a first circuit forming process, a first circuit is formed on an insulating board with a conductor; in a circuit embedding process, the first circuit is embedded in the insulating board so as to have a predetermined surface flatness and a predetermined parallelism; in a masking process, a pilot hole for a via hole is masked at a part of a surface of the circuit; in an insulating layer forming process P5p, an insulating material is applied as a layer to the surface except that portion thereof covered by the mask; in an insulating material layer flattening process, the surface of the insulating material layer is flattened so as to have the predetermined surface flatness and the predetermined parallelism; and in a pilot hole forming process, the mask is removed.
摘要翻译：提供多层电路板和形成多层电路板的方法。在第一电路形成工艺中，在具有导体的绝缘板上形成第一电路; 在电路嵌入处理中，第一电路被嵌入绝缘板中以具有预定的表面平坦度和预定的平行度; 在掩模处理中，用于通孔的导向孔在电路的表面的一部分被掩蔽; 在绝缘层形成工艺P 5 p中，除了被掩模覆盖的部分之外，绝缘材料作为层施加到表面; 在绝缘材料层平坦化处理中，绝缘材料层的表面被平坦化以具有预定的表面平坦度和预定的平行度; 并且在导向孔形成处理中，去除掩模。

9. 发明授权

US6051093A Mounting method of semiconductor element 失效
标题翻译：半导体元件的安装方法
公开(公告)号：US6051093A
公开(公告)日：2000-04-18
申请号：US11603
申请日：1998-02-06
申请人： Norihito Tsukahara
发明人： Norihito Tsukahara
IPC分类号： H01L21/60 , H01L21/56 , H01L23/485 , H01L23/498 , H05K1/00 , H05K1/11 , H05K3/32 , H05K3/40 , B32B31/00 , H01L21/00
CPC分类号： H01L24/29 , H01L21/563 , H01L23/49827 , H01L24/11 , H01L24/13 , H01L24/743 , H01L24/75 , H01L24/83 , H05K1/113 , H05K3/321 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05572 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/29298 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/75251 , H01L2224/75252 , H01L2224/83101 , H01L2224/83102 , H01L2224/83192 , H01L2224/92125 , H01L2224/92225 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/3511 , H05K1/0393 , H05K2201/0367 , H05K2201/10674 , H05K2201/10977 , H05K2203/1189 , H05K3/4069 , Y10T156/1054 , Y10T156/1062 , Y10T156/107 , Y10T156/109 , Y10T156/1092 , Y10T29/4913 , Y10T29/49165
摘要： A mounting method of a semiconductor element capable of joining an electrode of a semiconductor element and a circuit board at high reliability. The method includes a step of forming an external electrode terminal by filling a hole formed in circuit board with a conductive paste, a step of positioning the external electrode terminal and a protruding bump formed on an electrode of a semiconductor, and a step of pressing the semiconductor element to contact between the conductive paste in the hole and the protruding bump thereby electrically connecting the electrode of the semiconductor element and the external electrode terminal of the circuit board. An adhesive sheet of a thermosetting resin, a thermoplastic resin, or a mixed thermosetting and thermoplastic resin may be disposed on the circuit board where the bump breaks through the sheet to contact the paste.
摘要翻译： PCT No.PCT / JP97 / 01971 Sec。 371日期1998年2月6日 102（e）日期1998年2月6日PCT提交1997年6月6日PCT公布。出版物WO97 / 47031 日期1997年12月11日能够以高可靠性接合半导体元件的电极和电路基板的半导体元件的安装方法。该方法包括通过用导电膏填充形成在电路板中的孔来形成外部电极端子的步骤，将外部电极端子定位的步骤和形成在半导体的电极上的突起凸起的步骤，以及按压半导体元件在孔中的导电膏与突出凸起之间接触，从而将半导体元件的电极和电路板的外部电极端子电连接。可以在电路板上设置热固性树脂，热塑性树脂或混合的热固性和热塑性树脂的粘合片，其中凸块突破片材以接触糊料。

10. 发明申请

US20080111756A1 Semiconductor Memory Module Having Built-In Antenna 失效
标题翻译：具有内置天线的半导体存储模块
公开(公告)号：US20080111756A1
公开(公告)日：2008-05-15
申请号：US11793301
申请日：2006-02-02
申请人： Shozo Ochi , Norihito Tsukahara , Kazuhiro Ikurumi , Hidenobu Nishikawa , Masato Hirano
发明人： Shozo Ochi , Norihito Tsukahara , Kazuhiro Ikurumi , Hidenobu Nishikawa , Masato Hirano
IPC分类号： H01Q7/00 , H01Q1/38 , H01Q1/00
CPC分类号： H01Q1/2275 , H01L23/49855 , H01L25/0652 , H01L25/162 , H01L2223/6677 , H01L2224/16225 , H01L2224/16227 , H01L2924/19105 , H01Q1/38 , H01Q7/00
摘要： A semiconductor memory module formed of a mounted module (12) having a semiconductor memory device (16) and a control semiconductor device (18), a circuit board (14) which contains connection terminal (20) coupled with the control semiconductor device (18) and disposed so that it is exposed from the surface of outer case (42), and an antenna connection terminal electrode (22) disposed in the inside of outer case (42); and an antenna module (24) having a sheet board (26) which includes an antenna (28) disposed on one of the surfaces in the neighborhood of the edge along the sides, a layer (30) of magnetic substance disposed on the other surface, and an antenna terminal electrode (38) disposed on the one or the other surface. The antenna module (24) is overlaid on the mounted module (12), and the antenna connection terminal electrode (22) is connected with the antenna terminal electrode (38).
摘要翻译：一种由具有半导体存储器件（16）和控制半导体器件（18）的安装模块（12）形成的半导体存储器模块，包含与控制半导体器件（18）耦合的连接端子（20）的电路板（14））并且被设置成从外壳（42）的表面露出，以及设置在外壳（42）内部的天线连接端子电极（22）。以及具有片材板（26）的天线模块（24），所述片材板（26）包括设置在沿着所述边缘的所述边缘附近的一个表面上的天线（28），设置在另一个表面上的磁性物质层，以及设置在一个或另一个表面上的天线端子电极（38）。天线模块（24）重叠在安装的模块（12）上，天线连接端子电极（22）与天线端子电极（38）连接。

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