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1. 发明授权

US07524427B2 Electrochemical fabrication methods incorporating dielectric materials and/or using dielectric substrates 有权
公开(公告)号：US07524427B2
公开(公告)日：2009-04-28
申请号：US11029218
申请日：2005-01-03
申请人： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
发明人： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
IPC分类号： B81C1/00
CPC分类号： C25D1/003 , B33Y10/00 , C23C18/1605 , C23C18/1608 , C23C18/1653 , C25D5/022 , C25D5/10
摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

2. 发明授权

US07517462B2 Electrochemical fabrication methods incorporating dielectric materials and/or using dielectric substrates 有权
标题翻译：电介质材料和/或使用电介质基片的电化学制造方法
公开(公告)号：US07517462B2
公开(公告)日：2009-04-14
申请号：US11029014
申请日：2005-01-03
申请人： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
发明人： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
IPC分类号： B81C1/00
CPC分类号： B44C1/22 , B33Y10/00 , B81C1/00492 , C03C15/00 , C03C25/68 , C23C18/1605 , C23C18/161 , C23C18/1651 , C23C18/1653 , C23C18/405 , C23F1/00 , C25D1/003 , C25D5/02 , C25D5/10 , H01L21/2885 , H01L21/44 , H01L21/4763 , H01L21/76885
摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
摘要翻译：本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。在一些实施方案中，电介质材料是可UV固化的光聚合物。

3. 发明申请

US20080121343A1 Electrochemical Fabrication Methods Incorporating Dielectric Materials and/or Using Dielectric Substrates 审中-公开
标题翻译：电介质材料和/或使用介质基片的电化学制造方法
公开(公告)号：US20080121343A1
公开(公告)日：2008-05-29
申请号：US12015374
申请日：2008-01-16
申请人： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
发明人： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
IPC分类号： B32B38/10
CPC分类号： C25D5/022 , B81C1/00126 , B81C2201/0109 , B81C2201/019 , C23C18/1605 , C23C18/1651 , C25D1/003 , Y10T156/11 , Y10T156/19
摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
摘要翻译：本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。在一些实施方案中，电介质材料是可UV固化的光聚合物。

4. 发明申请

US20100270165A1 Electrochemical Fabrication Methods Incorporating Dielectric Materials and/or Using Dielectric Substrates 审中-公开
标题翻译：电介质材料和/或使用介质基片的电化学制造方法
公开(公告)号：US20100270165A1
公开(公告)日：2010-10-28
申请号：US12770648
申请日：2010-04-29
申请人： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
发明人： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
IPC分类号： C25D5/02
CPC分类号： C25D5/022 , B81C1/00126 , B81C2201/0109 , B81C2201/019 , C23C18/1605 , C23C18/1651 , C25D1/003 , Y10T156/11 , Y10T156/19
摘要： Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
摘要翻译：本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。在一些实施方案中，电介质材料是可UV固化的光聚合物。

5. 发明授权

US08808800B2 Methods of forming three-dimensional structures having reduced stress and/or curvature 有权
标题翻译：形成具有减小的应力和/或曲率的三维结构的方法
公开(公告)号：US08808800B2
公开(公告)日：2014-08-19
申请号：US13409950
申请日：2012-03-01
申请人： Ananda H. Kumar , Jorge Sotelo Albarran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
发明人： Ananda H. Kumar , Jorge Sotelo Albarran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
IPC分类号： B05D3/00
CPC分类号： B81C1/00666 , C25D5/022
摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.
摘要翻译：用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。呈现了六个主要实施例的组，它们分为十一个主要实施例。一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。

6. 发明申请

US20120222960A1 Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature 有权
标题翻译：形成具有减小的应力和/或曲率的三维结构的方法
公开(公告)号：US20120222960A1
公开(公告)日：2012-09-06
申请号：US13409950
申请日：2012-03-01
申请人： Ananda H. Kumar , Jorge Sotelo Albarran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
发明人： Ananda H. Kumar , Jorge Sotelo Albarran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
IPC分类号： C25D5/02
CPC分类号： B81C1/00666 , C25D5/022
摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.
摘要翻译：用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。呈现了六个主要实施例的组，它们分为十一个主要实施例。一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。

7. 发明申请

US20110147223A1 Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature 审中-公开
标题翻译：形成具有减小的应力和/或曲率的三维结构的方法
公开(公告)号：US20110147223A1
公开(公告)日：2011-06-23
申请号：US13006814
申请日：2011-01-14
申请人： Ananda H. Kumar , Jorge Sotelo Alberran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
发明人： Ananda H. Kumar , Jorge Sotelo Alberran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
IPC分类号： C25D5/48 , C25D5/10
CPC分类号： B81C1/00666 , C25D5/022
摘要： Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.
摘要翻译：用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。呈现了六个主要实施例的组，它们分为十一个主要实施例。一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。

8. 发明授权

US07878385B2 Probe arrays and method for making 有权
标题翻译：探针阵列和制作方法
公开(公告)号：US07878385B2
公开(公告)日：2011-02-01
申请号：US11929539
申请日：2007-10-30
申请人： Ananda H. Kumar , Ezekiel J. J. Kruglick , Adam L. Cohen , Kieun Kim , Gang Zhang , Richard T. Chen , Christopher A. Bang , Vacit Arat , Michael S. Lockard , Uri Frodis , Pavel B. Lembrikov , Jeffrey A. Thompson
发明人： Ananda H. Kumar , Ezekiel J. J. Kruglick , Adam L. Cohen , Kieun Kim , Gang Zhang , Richard T. Chen , Christopher A. Bang , Vacit Arat , Michael S. Lockard , Uri Frodis , Pavel B. Lembrikov , Jeffrey A. Thompson
IPC分类号： B23K31/02
CPC分类号： B23K35/0222 , C23C18/1605 , C23C18/1651 , C25D1/003 , C25D1/12 , G01R1/06744 , G01R1/07307 , G01R1/07314 , G01R3/00 , H01L21/6835 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L24/95 , H01L2221/68313 , H01L2221/68354 , H01L2221/68363 , H01L2224/0401 , H01L2224/05568 , H01L2224/10126 , H01L2224/1147 , H01L2224/11831 , H01L2224/1184 , H01L2224/1191 , H01L2224/13017 , H01L2224/13018 , H01L2224/13076 , H01L2224/131 , H01L2224/1403 , H01L2224/81001 , H01L2224/81054 , H01L2224/81136 , H01L2224/8121 , H01L2224/8181 , H01L2224/81815 , H01L2924/00013 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/0102 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01045 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/1461 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01L2924/3651 , H01L2924/3841 , H01L2224/13099 , H01L2224/29099 , H01L2924/00 , H01L2224/05552 , H01L2924/00012
摘要： Embodiments of invention are directed to the formation of microprobes (i.e. compliant electrical or electronic contact elements) on a temporary substrate, dicing individual probe arrays, and then transferring the arrays to space transformers or other permanent substrates. Some embodiments of the invention transfer probes to permanent substrates prior to separating the probes from a temporary substrate on which the probes were formed while other embodiments do the opposite. Some embodiments, remove sacrificial material prior to transfer while other embodiments remove sacrificial material after transfer. Some embodiments are directed to the bonding of first and second electric components together using one or more solder bumps with enhanced aspect ratios (i.e. height to width ratios) obtained as a result of surrounding the bumps at least in part with rings of a retention material. The retention material may act be a solder mask material.
摘要翻译：本发明的实施例涉及在临时衬底上形成微探针（即柔性电气或电子接触元件），切割单独的探针阵列，然后将阵列转移到空间变压器或其它永久衬底。在将探针从其上形成探针的临时基底分离出来之前，本发明的一些实施方案将探针转移到永久性基底上，而其他实施方案相反。一些实施例，在转移之前去除牺牲材料，而其它实施例在转移后去除牺牲材料。一些实施例涉及使用一个或多个具有增强的纵横比（即，高度与宽度比）的焊料凸块来将第一和第二电气部件接合在一起，这是由于至少部分地由保持材料的环围绕凸块而得到的。保留材料可以用作焊接掩模材料。

9. 发明申请

US20110132767A1 Multi-Layer, Multi-Material Fabrication Methods for Producing Micro-Scale and Millimeter-Scale Devices with Enhanced Electrical and/or Mechanical Properties 有权
标题翻译：用于生产具有增强的电气和/或机械性能的微尺度和毫米级装置的多层，多材料制造方法
公开(公告)号：US20110132767A1
公开(公告)日：2011-06-09
申请号：US12906970
申请日：2010-10-18
申请人： Ming Ting Wu , Rulon Joseph Larsen, III , Young Kim , Kieun Kim , Adam L. Cohen , Ananda H. Kumar , Michael S. Lockard , Dennis R. Smalley
发明人： Ming Ting Wu , Rulon Joseph Larsen, III , Young Kim , Kieun Kim , Adam L. Cohen , Ananda H. Kumar , Michael S. Lockard , Dennis R. Smalley
IPC分类号： C25D5/02 , C25D5/48
CPC分类号： G01R1/06716 , B33Y10/00 , C23C18/1605 , C23C18/1651 , C25D1/003 , G01R1/06744 , G01R1/06755 , G01R3/00 , H01L21/4853
摘要： Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions. Each of these groups of embodiments incorporate both the core material and the coating material during the formation of each layer and each layer is also formed with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a genuine structural material while in others it may be only a functional structural material (i.e. a material that would be removed with sacrificial material if it were accessible by an etchant during removal of sacrificial material.
摘要翻译：本发明的一些实施方案涉及用于从芯材料和部分涂覆结构表面的壳或涂层材料形成结构或器件（例如用于半导体器件的晶片级测试的微探针）的电化学制造方法。其它实施方案涉及用于从芯材和壳或涂层材料制造结构或器件（例如微探针）的电化学制造方法，其完全涂覆形成探针的每个层的表面，包括中间层区域。本发明的另外的实施方案涉及用于从核心材料和壳或涂层材料形成结构或器件（例如微针）的电化学制造方法，其中涂层材料围绕结构的每一层定位，而不将涂层材料定位在相互之间，层区域。这些实施例组中的每一个在形成每个层期间都包括芯材料和涂层材料，并且每个层还形成有牺牲材料，该牺牲材料在形成所述结构的所有层之后被去除。在一些实施例中，芯材料可以是真正的结构材料，而在其它实施例中，其可以仅是功能性结构材料（即，如果在去除牺牲材料期间可通过蚀刻剂获得牺牲材料，则该材料将被除去。

10. 发明授权

US08613846B2 Multi-layer, multi-material fabrication methods for producing micro-scale and millimeter-scale devices with enhanced electrical and/or mechanical properties 有权
标题翻译：用于生产具有增强的电和/或机械性能的微尺度和毫米级装置的多层多材料制造方法
公开(公告)号：US08613846B2
公开(公告)日：2013-12-24
申请号：US12906970
申请日：2010-10-18
申请人： Ming Ting Wu , Rulon Joseph Larsen, III , Young Kim , Kieun Kim , Adam L. Cohen , Ananda H. Kumar , Michael S. Lockard , Dennis R. Smalley
发明人： Ming Ting Wu , Rulon Joseph Larsen, III , Young Kim , Kieun Kim , Adam L. Cohen , Ananda H. Kumar , Michael S. Lockard , Dennis R. Smalley
IPC分类号： C25D5/02 , C25D5/10
CPC分类号： G01R1/06716 , B33Y10/00 , C23C18/1605 , C23C18/1651 , C25D1/003 , G01R1/06744 , G01R1/06755 , G01R3/00 , H01L21/4853
摘要： Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that partially coats the surface of the structure. Other embodiments are directed to electrochemical fabrication methods for producing structures or devices (e.g. microprobes) from a core material and a shell or coating material that completely coats the surface of each layer from which the probe is formed including interlayer regions. Additional embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes) from a core material and a shell or coating material wherein the coating material is located around each layer of the structure without locating the coating material in inter-layer regions. Each of these groups of embodiments incorporate both the core material and the coating material during the formation of each layer and each layer is also formed with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a genuine structural material while in others it may be only a functional structural material (i.e. a material that would be removed with sacrificial material if it were accessible by an etchant during removal of sacrificial material.
摘要翻译：本发明的一些实施方案涉及用于从芯材料和部分涂覆结构表面的壳或涂层材料形成结构或器件（例如用于半导体器件的晶片级测试的微探针）的电化学制造方法。其它实施方案涉及用于从芯材和壳或涂层材料制造结构或器件（例如微探针）的电化学制造方法，其完全涂覆形成探针的每个层的表面，包括中间层区域。本发明的另外的实施方案涉及用于从核心材料和壳或涂层材料形成结构或器件（例如微针）的电化学制造方法，其中涂层材料围绕结构的每一层定位，而不将涂层材料定位在相互之间，层区域。这些实施例组中的每一个在形成每个层期间都包括芯材料和涂层材料，并且每个层还形成有牺牲材料，该牺牲材料在形成所述结构的所有层之后被去除。在一些实施例中，芯材料可以是真正的结构材料，而在其它实施例中，其可以仅是功能性结构材料（即，如果在去除牺牲材料期间可通过蚀刻剂获得牺牲材料，则该材料将被除去。

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