专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明公开

KR20200139840A 기계 학습에 의한 결함 또는 핫스폿의 식별 审中-公开
公开(公告)号：KR20200139840A
公开(公告)日：2020-12-14
申请号：KR20207034578
申请日：2017-04-20
申请人： ASML NETHERLANDS BV
发明人： SU JING , ZOU YI , LIN CHENXI , HUNSCHE STEFAN , JOCHEMSEN MARINUS , LU YEN WEN , CHEONG LIN LEE
IPC分类号： G03F7/20 , G06F30/398 , G06K9/62 , G06T7/00
摘要： 본명세서에서는, 기계학습모델을이용하여, 디자인레이아웃으로부터핫스폿을식별하거나, 디자인레이아웃내의패턴이결함있는지를예측하는다양한방법들이개시된다. 본명세서에개시된예시적인방법은디바이스제조공정에서의복수의공정조건들하에서각각핫스폿들의성능의특성들의세트들을각각얻는단계; 핫스폿들각각에대하여공정조건들각각에대해, 그공정조건하에서의특성들에기초하여, 그핫스폿이결함있는지를결정하는단계; 공정조건들각각의특성들을얻는단계; 핫스폿들각각의특성들을얻는단계; 및공정조건들중 하나의특성들, 핫스폿들중 하나의특성들, 및그 공정조건하에서그 핫스폿이결함있는지의여부를포함하는트레이닝세트를이용하여기계학습모델을트레이닝하는단계를포함한다.

2. 发明专利

JP2011100149A System and method for mask verification using individual mask error model 有权
标题翻译：使用个性掩码错误模型进行掩蔽验证的系统和方法
公开(公告)号：JP2011100149A
公开(公告)日：2011-05-19
申请号：JP2010290500
申请日：2010-12-27
申请人： Asml Netherlands Bv , エーエスエムエルネザーランズビー.ブイ.
发明人： YE JUN , HUNSCHE STEFAN
IPC分类号： G03F1/00 , H01L21/027
CPC分类号： G06F17/5081 , G03F1/36 , G03F1/84 , G03F7/70441 , G03F7/705
摘要： PROBLEM TO BE SOLVED: To provide a method and a system for optimizing the common process window of device design and an exposure tool by combining with a mask error model. SOLUTION: A mask is manufactured in accordance with a post-OPC mask layout (process 210). The mask is inspected to create and analyze mask inspection data and to determine systematic mask error parameters (process 212). An individual mask error model is created for the inspected mask (process 214). A lithographic process is simulated by using the individual mask error model to generate a simulate pattern (process 216). The simulate pattern is compared with a pre-OPC design layout obtained in a process 218 (process 220) to determine whether the manufactured mask demonstrates the desired patterning performance (process 222). When the mask is determined to be capable of demonstrating the desired performance, the method advances to a process 228. When not, the method continues advances to a process 224, where the mask is evaluated to determine whether it is repairable or reworkable. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种通过与掩模误差模型结合来优化设备设计的公共过程窗口和曝光工具的方法和系统。解决方案：根据OPC后掩模布局制造掩模（过程210）。检查掩模以创建和分析掩模检查数据并确定系统掩模误差参数（过程212）。为检查的掩码创建单独的掩码错误模型（过程214）。通过使用单独的掩模误差模型来生成光刻过程以产生模拟模式（过程216）。将模拟模式与在过程218（过程220）中获得的OPC前设计布局进行比较，以确定所制造的掩模是否显示所需的图案化性能（过程222）。当确定掩模能够表现出期望的性能时，该方法前进到过程228.否则，该方法继续前进到过程224，其中对掩模进行评估以确定其是否可修复或可再加工。版权所有（C）2011，JPO＆INPIT

3. 发明专利

SG11201606207WA METHOD OF OPTIMIZING A PROCESS WINDOW 未知
公开(公告)号：SG11201606207WA
公开(公告)日：2016-09-29
申请号：SG11201606207W
申请日：2015-01-07
申请人： ASML NETHERLANDS BV
发明人： HUNSCHE STEFAN , VELLANKI VENUGOPAL
IPC分类号： G03F7/20
摘要： A defect prediction method for a device manufacturing process involving processing a pattern onto a substrate, the method comprising: identifying a processing window limiting pattern (PWLP) from the pattern; determining a processing parameter under which the PWLP is processed; and determining or predicting, using the processing parameter, existence, probability of existence, a characteristic, or a combination thereof, of a defect produced from the PWLP with the device manufacturing process.

4. 发明专利

NL2013625A INSPECTION APPARATUS AND METHODS, SUBSTRATES HAVING METROLOGY TARGETS, LITHOGRAPHIC SYSTEM AND DEVICE MANUFACTURING METHOD. 未知
公开(公告)号：NL2013625A
公开(公告)日：2015-05-04
申请号：NL2013625
申请日：2014-10-13
申请人： ASML NETHERLANDS BV
发明人： MATHIJSSEN SIMON GIJSBERT JOSEPHUS , HUNSCHE STEFAN , KRAAIJ MARKUS GERARDUS MARTINUS MARIA
IPC分类号： G01N21/47 , G03F7/20 , H01L23/544
摘要： Disclosed is an inspection apparatus for use in lithography. It comprises a support for a substrate carrying a plurality of metrology targets; an optical system for illuminating the targets under predetermined illumination conditions and for detecting predetermined portions of radiation diffracted by the targets under the illumination conditions; a processor arranged to calculate from said detected portions of diffracted radiation a measurement of asymmetry for a specific target; and a controller for causing the optical system and processor to measure asymmetry in at least two of said targets which have different known components of positional offset between structures and smaller sub-structures within a layer on the substrate and calculate from the results of said asymmetry measurements a measurement of a performance parameter of the lithographic process for structures of said smaller size. Also disclosed are substrates provided with a plurality of novel metrology targets formed by a lithographic process.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式