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1. 发明申请

WO2012106033A3 UNIFORM DRY ETCH IN TWO STAGES 审中-公开
标题翻译：在两个阶段统一烘干
公开(公告)号：WO2012106033A3
公开(公告)日：2012-11-29
申请号：PCT/US2011064724
申请日：2011-12-13
申请人： APPLIED MATERIALS INC , YANG DONGQING , TANG JING , INGLE NITIN
发明人： YANG DONGQING , TANG JING , INGLE NITIN
IPC分类号： H01L21/3065
CPC分类号： H01L21/31116
摘要： A method of etching silicon oxide from a multiple trenches is described which allows more homogeneous etch rates among trenches. The surfaces of the etched silicon oxide within the trench following the etch may also be smoother. The method includes two dry etch stages followed by a sublimation step. The first dry etch stage removes silicon oxide quickly and produces large solid residue granules. The second dry etch stage remove silicon oxide slowly and produces small solid residue granules in amongst the large solid residue granules. Both the small and large solid residue are removed in the ensuing sublimation step. There is no sublimation step between the two dry etch stages.
摘要翻译：描述了从多个沟槽蚀刻氧化硅的方法，其允许在沟槽之间更均匀的蚀刻速率。蚀刻后的沟槽内的蚀刻氧化硅的表面也可以更光滑。该方法包括两个干蚀刻阶段，接着是升华步骤。第一道干法刻蚀阶段迅速除去氧化硅，并产生大量的固体残渣颗粒。第二干蚀刻阶段慢慢地除去氧化硅并且在大的固体残余颗粒中产生小的固体残余颗粒。在随后的升华步骤中，小的和大的固体残余物都被除去。两个干法蚀刻阶段之间没有升华步骤。

2. 发明申请

WO2011139435A3 HIGH-TEMPERATURE SELECTIVE DRY ETCH HAVING REDUCED POST-ETCH SOLID RESIDUE 审中-公开
标题翻译：具有减少后固化残留物的高温选择性干燥剂
公开(公告)号：WO2011139435A3
公开(公告)日：2012-01-26
申请号：PCT/US2011030582
申请日：2011-03-30
申请人： APPLIED MATERIALS INC , THADANI KIRAN V , TANG JING , INGLE NITIN , YANG DONGQING
发明人： THADANI KIRAN V , TANG JING , INGLE NITIN , YANG DONGQING
IPC分类号： H01L21/3065
CPC分类号： H01L21/31116 , H01J37/32357
摘要： Methods of dry etching silicon-containing dielectric films are described. The methods include maintaining a relatively high temperature of the dielectric films while etching in order to achieve reduced solid residue on the etched surface. Partially or completely avoiding the accumulation of solid residue increases the etch rate.
摘要翻译：描述了干法蚀刻含硅介电膜的方法。这些方法包括在蚀刻时保持电介质膜的较高温度，以便在蚀刻表面上实现减少的固体残余物。部分或完全避免固体残余物的积累增加了蚀刻速率。

3. 发明申请

WO2011115761A3 INVERTABLE PATTERN LOADING WITH DRY ETCH 审中-公开
标题翻译：不可逆图案加载干燥蚀刻
公开(公告)号：WO2011115761A3
公开(公告)日：2011-12-22
申请号：PCT/US2011027221
申请日：2011-03-04
申请人： APPLIED MATERIALS INC , TANG JING , INGLE NITIN , YANG DONGQING , VENKATARAMAN SHANKAR
发明人： TANG JING , INGLE NITIN , YANG DONGQING , VENKATARAMAN SHANKAR
IPC分类号： H01L21/3065
CPC分类号： H01L21/31116 , H01J37/32091
摘要： A method of etching silicon oxide from a narrow trench and a wide trench (or open area) is described which allows the etch in the wide trench to progress further than the etch in the narrow trench. The method includes two dry etch cycles. The first dry etch cycle involves a low intensity or abbreviated sublimation step which leaves solid residue in the narrow trench. The remaining solid residue inhibits etch progress in the narrow trench during the second dry etch cycle allowing the etch in the wide trench to overtake the etch in the narrow trench.
摘要翻译：描述了从窄沟槽和宽沟槽（或开放区域）中蚀刻氧化硅的方法，其允许宽沟槽中的蚀刻比窄沟槽中的蚀刻进一步进行。该方法包括两个干蚀刻循环。第一干蚀刻循环涉及低强度或缩写升华步骤，其在窄沟槽中留下固体残留物。剩余的固体残余物在第二干蚀刻循环期间抑制窄沟槽中的蚀刻进程，允许宽沟槽中的蚀刻超过窄沟槽中的蚀刻。

4. 发明申请

WO2010011476A4 DEPOSITION METHODS AND RELEASING STRESS BUILDUP 审中-公开
标题翻译：沉积方法和释放应力的构建
公开(公告)号：WO2010011476A4
公开(公告)日：2010-06-24
申请号：PCT/US2009049300
申请日：2009-06-30
申请人： APPLIED MATERIALS INC , TANG JING , INGLE NITIN K , YUAN ZHENG , MININNI ROSSELLA
发明人： TANG JING , INGLE NITIN K , YUAN ZHENG , MININNI ROSSELLA
IPC分类号： H01L21/205 , H01L21/31
CPC分类号： H01L21/76224
摘要： A deposition method for releasing a stress buildup of a feature over a semiconductor substrate with dielectric material is provided. The feature includes lines separated by a gap. The method includes forming a liner layer over the feature on the semiconductor substrate in a chamber. A stress of the liner layer over the feature is released to substantially reduce bending of the lines of the feature. A dielectric film is deposited over the stress-released liner layer to substantially fill the gap of the feature.
摘要翻译：提供了一种用电介质材料在半导体衬底上释放特征应力累积的沉积方法。该功能包括由间隙分隔的行。该方法包括在腔室中的半导体衬底上的特征结构上形成衬垫层。释放特征上的内衬层的应力以基本上减少特征的线的弯曲。电介质膜沉积在应力释放衬垫层上以基本上填充特征的间隙。

5. 发明申请

WO2013049173A3 IMPROVED INTRENCH PROFILE 审中-公开
标题翻译：改进的英语资料
公开(公告)号：WO2013049173A3
公开(公告)日：2013-06-13
申请号：PCT/US2012057294
申请日：2012-09-26
申请人： APPLIED MATERIALS INC , SAPRE KEDAR , INGLE NITIN K , TANG JING
发明人： SAPRE KEDAR , INGLE NITIN K , TANG JING
IPC分类号： H01L21/762 , H01L21/205 , H01L21/31
CPC分类号： H01L21/3065 , H01L21/3081 , H01L21/76224
摘要： A method of etching a recess in a semiconductor substrate is described. The method may include forming a dielectric liner layer in a trench of the substrate where the liner layer has a first density. The method may also include depositing a second dielectric layer at least partially in the trench on the liner layer. The second dielectric layer may initially be flowable following the deposition, and have a second density that is less than the first density of the liner. The method may further include exposing the substrate to a dry etchant, where the etchant removes a portion of the first liner layer and the second dielectric layer to form a recess, where the dry etchant includes a fluorine-containing compound and molecular hydrogen, and where the etch rate ratio for removing the first dielectric liner layer to removing the second dielectric layer is about 1:1.2 to about 1:1.
摘要翻译：描述了蚀刻半导体衬底中的凹陷的方法。该方法可以包括在衬底的具有第一密度的衬底的沟槽中形成电介质衬里层。该方法还可以包括至少部分地在衬垫层上的沟槽中沉积第二介电层。第二介电层在沉积之后最初可以是可流动的，并且具有小于衬里的第一密度的第二密度。该方法可进一步包括将衬底暴露于干蚀刻剂，其中蚀刻剂去除第一衬层和第二介电层的一部分以形成凹槽，其中干蚀刻剂包括含氟化合物和分子氢，并且其中用于去除第一电介质衬垫层以去除第二电介质层的蚀刻速率比为约1：1.2至约1：1。

6. 发明申请

WO2011025655A3 SILICON-SELECTIVE DRY ETCH FOR CARBON-CONTAINING FILMS 审中-公开
标题翻译：用于含碳膜的硅选择干燥剂
公开(公告)号：WO2011025655A3
公开(公告)日：2011-05-19
申请号：PCT/US2010045056
申请日：2010-08-10
申请人： APPLIED MATERIALS INC , SAPRE KEDAR , TANG JING , WANG LINLIN , MALLICK ABHIJIT BASU , INGLE NITIN
发明人： SAPRE KEDAR , TANG JING , WANG LINLIN , MALLICK ABHIJIT BASU , INGLE NITIN
IPC分类号： H01L21/3065 , B44C1/22 , G03F7/42
CPC分类号： H01L21/3065 , H01L21/31116
摘要： A method of etching silicon-and-carbon-containing material is described and includes a SiConiTM etch in combination with a flow of reactive oxygen. The reactive oxygen may be introduced before the SiConiTM etch reducing the carbon content in the near surface region and allowing the SiConiTM etch to proceed more rapidly. Alternatively, reactive oxygen may be introduced during the SiConiTM etch further improving the effective etch rate.
摘要翻译：描述了一种蚀刻含硅和碳的材料的方法，并且包括结合活性氧流的SiConiTM蚀刻。可以在SiConiTM蚀刻之前引入活性氧，从而减少近表面区域中的碳含量，并允许SiConiTM蚀刻进行得更快。或者，可以在SiConiTM蚀刻期间引入活性氧，进一步提高有效蚀刻速率。

7. 发明申请

WO2011112812A2 APPARATUS AND METHODS FOR CYCLICAL OXIDATION AND ETCHING 审中-公开
公开(公告)号：WO2011112812A2
公开(公告)日：2011-09-15
申请号：PCT/US2011027900
申请日：2011-03-10
申请人： APPLIED MATERIALS INC , GANGULY UDAYAN , RANISH JOSEPH M , HUNTER AARON M , TANG JING , OLSEN CHRISTOPHER S , SCOTNEY-CASTLE MATTHEW D , NGUYEN VICKY , SRINIVASAN SWAMINATHAN , SWENBERG JOHANES F , WANG ANCHUAN , INGLE NITIN K , HEMKAR MANISH , MARIN JOSE A
发明人： GANGULY UDAYAN , RANISH JOSEPH M , HUNTER AARON M , TANG JING , OLSEN CHRISTOPHER S , SCOTNEY-CASTLE MATTHEW D , NGUYEN VICKY , SRINIVASAN SWAMINATHAN , SWENBERG JOHANES F , WANG ANCHUAN , INGLE NITIN K , HEMKAR MANISH , MARIN JOSE A
IPC分类号： H01L21/3065
CPC分类号： H01L21/67115 , H01L21/0223 , H01L21/67109 , H01L21/67167 , H01L21/6719 , H01L21/67207 , H01L21/68785 , H01L21/76232 , H01L27/11521
摘要： Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and/or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device.

8. 发明申请

WO2010011476A3 DEPOSITION METHODS AND RELEASING STRESS BUILDUP 审中-公开
标题翻译：沉积方法和释放应力建筑
公开(公告)号：WO2010011476A3
公开(公告)日：2010-04-15
申请号：PCT/US2009049300
申请日：2009-06-30
申请人： APPLIED MATERIALS INC , TANG JING , INGLE NITIN K , YUAN ZHENG , MININNI ROSSELLA
发明人： TANG JING , INGLE NITIN K , YUAN ZHENG , MININNI ROSSELLA
IPC分类号： H01L21/205 , H01L21/31
CPC分类号： H01L21/76224
摘要： A deposition method for releasing a stress buildup of a feature over a semiconductor substrate with dielectric material is provided. The feature includes lines separated by a gap. The method includes forming a liner layer over the feature on the semiconductor substrate in a chamber. A stress of the liner layer over the feature is released to substantially reduce bending of the lines of the feature. A dielectric film is deposited over the stress-released liner layer to substantially fill the gap of the feature.
摘要翻译：提供了一种通过电介质材料释放在半导体衬底上的特征的应力累积的沉积方法。该功能包括由间隙隔开的线。该方法包括在腔室中的半导体衬底上的特征上形成衬垫层。衬垫层在特征上的应力被释放，以显着减少特征线的弯曲。电介质膜沉积在应力释放衬垫层上，以基本上填充特征的间隙。

9. 发明申请

WO2011112802A3 APPARATUS AND METHODS FOR CYCLICAL OXIDATION AND ETCHING 审中-公开
标题翻译：用于循环氧化和蚀刻的装置和方法
公开(公告)号：WO2011112802A3
公开(公告)日：2012-01-05
申请号：PCT/US2011027881
申请日：2011-03-10
申请人： APPLIED MATERIALS INC , GANGULY UDAYAN , RANISH JOSEPH M , HUNTER AARON M , TANG JING , OLSEN CHRISTOPHER S , SCOTNEY-CASTLE MATTHEW D , NGUYEN VICKY , SRINIVASAN SWAMINATHAN , LIU WEI , SWENBERG JOHANES F , SUN SHIYU
发明人： GANGULY UDAYAN , RANISH JOSEPH M , HUNTER AARON M , TANG JING , OLSEN CHRISTOPHER S , SCOTNEY-CASTLE MATTHEW D , NGUYEN VICKY , SRINIVASAN SWAMINATHAN , LIU WEI , SWENBERG JOHANES F , SUN SHIYU
IPC分类号： H01L21/3065
CPC分类号： H01L21/76232 , H01L21/0223 , H01L21/67109 , H01L21/67115 , H01L21/67167 , H01L21/6719 , H01L21/67207 , H01L21/68785 , H01L27/11521
摘要： Apparatus and methods for the manufacture of semiconductor devices suitable for narrow pitch applications and methods of fabrication thereof are described herein. Disclosed are various single chambers configured to form and/or shape a material layer by oxidizing a surface of a material layer to form an oxide layer; removing at least some of the oxide layer by an etching process; and cyclically repeating the oxidizing and removing processes until the material layer is formed to a desired shape. In some embodiments, the material layer may be a floating gate of a semiconductor device.
摘要翻译：本文描述了用于制造适用于窄间距应用的半导体器件的设备和方法及其制造方法。公开了被配置为通过氧化材料层的表面以形成氧化物层来形成和/或成形材料层的各种单室; 通过蚀刻工艺去除至少一些氧化物层; 并且循环地重复氧化和去除过程直到材料层形成为期望的形状。在一些实施例中，材料层可以是半导体器件的浮置栅极。

10. 发明申请

WO2013049223A3 INSENSITIVE DRY REMOVAL PROCESS FOR SEMICONDUCTOR INTEGRATION 审中-公开
标题翻译：用于半导体集成的敏感干燥除去过程
公开(公告)号：WO2013049223A3
公开(公告)日：2013-05-23
申请号：PCT/US2012057358
申请日：2012-09-26
申请人： APPLIED MATERIALS INC , SAPRE KEDAR , MININNI ROSSELLA , TANG JING
发明人： SAPRE KEDAR , MININNI ROSSELLA , TANG JING
IPC分类号： H01L21/311 , H01L21/31
CPC分类号： H01L29/401 , H01L21/31116 , H01L29/66545
摘要： Methods of depositing and etching dielectric layers from a surface of a semiconductor substrate are disclosed. The methods may include depositing a first dielectric layer having a first wet etch rate in aqueous HF. The methods also may include depositing a second dielectric layer that may be initially flowable following deposition, and the second dielectric layer may have a second wet etch rate in aqueous HF that is higher than the first wet etch rate. The methods may further include etching the first and second dielectric layers with an etchant gas mixture, where the first and second dielectric layers have a ratio of etch rates that is closer to one than the ratio of the second wet etch rate to the first wet etch rate in aqueous HF.
摘要翻译：公开了从半导体衬底的表面沉积和蚀刻电介质层的方法。所述方法可以包括在HF水溶液中沉积具有第一湿蚀刻速率的第一介电层。所述方法还可以包括沉积第二介电层，其可以在沉积之后最初可流动，并且第二介电层可以具有高于第一湿蚀刻速率的HF水溶液中的第二湿蚀刻速率。所述方法可以进一步包括用蚀刻剂气体混合物蚀刻第一和第二介电层，其中第一和第二介电层具有比第二湿蚀刻速率与第一湿蚀刻的比率更接近的蚀刻速率比在HF水溶液中。

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