专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US11342226B2 Hybrid wafer dicing approach using an actively-focused laser beam laser scribing process and plasma etch process 有权
公开(公告)号：US11342226B2
公开(公告)日：2022-05-24
申请号：US16539828
申请日：2019-08-13
申请人： Applied Materials, Inc.
发明人： Karthik Balakrishnan , Jungrae Park , Sriskantharajah Thirunavukarasu , Eng Sheng Peh
IPC分类号： H01L21/82 , H01L21/78 , H01L21/308 , H01L21/3065 , H01L21/67 , B23K26/53
摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with an actively-focused laser beam laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

2. 发明授权

US10504762B2 Bridging front opening unified pod (FOUP) 有权
公开(公告)号：US10504762B2
公开(公告)日：2019-12-10
申请号：US15956481
申请日：2018-04-18
申请人： APPLIED MATERIALS, INC.
发明人： Karrthik Parathithasan , Fang Jie Lim , Sriskantharajah Thirunavukarasu , Eng Sheng Peh
IPC分类号： B65D85/48 , H01L21/673 , H01L21/67
CPC分类号： H01L21/67376 , H01L21/67126
摘要： A bridging front opening unified pod (FOUP) is provided herein. In some embodiments, the bridging FOUP includes a bottom floor, side walls, a ceiling and a back wall that forms an enclosure volume having a front opening, a plurality of supports coupled to the side walls and extending into the enclosure volume, wherein the plurality of supports are configured to support a substrate carrier, a base plate assembly comprising a base plate coupled to the bottom floor, a pair of L-brackets coupled to the base plate, wherein each L-brackets includes a short lift pin, a long lift pin coupled to the base plate, wherein the height of the short lift pins and the long lift pin is selected such that the substrate is kept level when disposed thereon, and a docking support disposed proximate the base plate assembly and configured to support a substrate carrier.

3. 发明授权

US10465288B2 Nozzle for uniform plasma processing 有权
公开(公告)号：US10465288B2
公开(公告)日：2019-11-05
申请号：US14461318
申请日：2014-08-15
申请人： Applied Materials, Inc.
发明人： Rohit Mishra , Siva Suri Chandra Rao Bhesetti , Eng Sheng Peh , Sriskantharajah Thirunavukarasu , Shoju Vayyapron , Cheng Sun
IPC分类号： C23C16/50 , H01J37/32 , C23C16/455
摘要： A nozzle for uniform plasma processing comprises an inlet portion and an outlet portion. The inlet portion has a side surface substantially parallel to a vertical axis. The inlet portion comprises a plurality of gas channels. The outlet portion is coupled to the inlet portion. The outlet portion comprises a plurality of outlets. At least one of the outlets is at an angle other than a right angle relative to the vertical axis.

4. 发明授权

US09478697B2 Reusable substrate carrier 有权
标题翻译：可重复使用的基板载体
公开(公告)号：US09478697B2
公开(公告)日：2016-10-25
申请号：US14538766
申请日：2014-11-11
申请人： APPLIED MATERIALS, INC.
发明人： Sriskantharajah Thirunavukarasu , Mingwei Zhu , Karthik Elumalai , Thean Ming Tan , Yong Cao , Daniel Lee Diehl , Nag Patibandla
IPC分类号： A47G29/08 , H01L33/00
CPC分类号： H01L33/0075 , H01L21/68771 , H01L33/0066 , H01L33/0079
摘要： In some embodiments, a substrate carrier for holding a plurality of substrates comprises a disk formed of a continuous material to a nominal dimension which is approximately a multiple of a nominal dimension of a standard substrate size used in the manufacture of light emitting diode devices. In an embodiment, the disk is formed symmetrically about a central axis and defines a substantially planar upper surface. A first pair of pockets is defined in the upper surface of the disk, wherein the disk and each of the first pair of pockets are bisected by a first reference plane passing through the central axis. A second pair of pockets is defined in the upper surface of the disk, wherein the disk and each of the second pair of pockets are bisected by a second reference plane passing through the central axis.
摘要翻译：在一些实施例中，用于保持多个基板的基板载体包括由连续材料形成的标称尺寸的盘，其大约是用于制造发光二极管器件的标准基板尺寸的标称尺寸的倍数。在一个实施例中，盘围绕中心轴对称地形成，并且限定了基本平坦的上表面。在盘的上表面中限定第一对凹穴，其中盘和第一对凹穴中的每一个由穿过中心轴线的第一参考平面对分。在盘的上表面中限定第二对凹穴，其中盘和第二对凹穴中的每一个通过穿过中心轴线的第二参考平面对分。

5. 发明申请

US20160189941A1 METHODS AND APPARATUS FOR NODULE CONTROL IN A TITANIUM-TUNGSTEN TARGET 有权
标题翻译： TITANIUM-TUNGSTEN目标中的控制方法和装置
公开(公告)号：US20160189941A1
公开(公告)日：2016-06-30
申请号：US14587967
申请日：2014-12-31
申请人： APPLIED MATERIALS, INC.
发明人： Junqi Wei , Zhitao Cao , Yueh Sheng Ow , Ananthkrishna Jupudi , Kirankumar Savandaiah , Xin Wang , Sriskantharajah Thirunavukarasu
IPC分类号： H01J37/34 , H01J37/32 , B22F3/12
CPC分类号： H01J37/3429 , B22F3/12 , B22F2998/10 , B22F2999/00 , C22C1/0458 , C22C14/00 , C22C27/04 , C23C14/3414 , H01J37/3426 , H01J37/3491 , B22F1/0003 , B22F3/02 , B22F3/10 , B22F2003/247 , B22F2202/13
摘要： Embodiments of the present disclosure include methods and apparatus for controlling titanium-tungsten (TiW) target nodule formation. In some embodiments, a target includes: a source material comprising predominantly titanium (Ti) and tungsten (W), formed from a mixture of titanium powder and tungsten powder, wherein a grain size of a predominant quantity of the titanium powder is less than or equal to a grain size of a predominant quantity of the tungsten powder.
摘要翻译：本公开的实施例包括用于控制钛 - 钨（TiW）靶结节形成的方法和装置。在一些实施方案中，靶包括：主要由钛粉末和钨粉末的混合物形成的钛（Ti）和钨（W）的源材料，其中主要量的钛粉末的晶粒尺寸小于或等于等于主要量的钨粉的粒度。

6. 发明授权

US11421316B2 Methods and apparatus for controlling warpage in wafer level packaging processes 有权
公开(公告)号：US11421316B2
公开(公告)日：2022-08-23
申请号：US16584695
申请日：2019-09-26
申请人： APPLIED MATERIALS, INC.
发明人： Prayudi Lianto , Mohamed Rafi , Muhammad Azim Bin Syed Sulaiman , Guan Huei See , Ang Yu Xin Kristy , Karthik Elumalai , Sriskantharajah Thirunavukarasu , Arvind Sundarrajan
IPC分类号： H01L23/48 , H01L23/52 , C23C14/54 , H01L21/67 , H01L23/00
摘要： Methods and apparatus for producing fine pitch patterning on a substrate. Warpage correction of the substrate is accomplished on a carrier or carrier-less substrate. A first warpage correction process is performed on the substrate by raising and holding a temperature of the substrate to a first temperature and cooling the carrier-less substrate to a second temperature. Further wafer level packaging processing is then performed such as forming vias in a polymer layer on the substrate. A second warpage correction process is then performed on the substrate by raising and holding a temperature of the substrate to a third temperature and cooling the substrate to a fourth temperature. With the warpage of the substrate reduced, a redistribution layer may be formed on the substrate with a 2/2 μm l/s fine pitch patterning.

7. 发明授权

US11309278B2 Methods for bonding substrates 有权
公开(公告)号：US11309278B2
公开(公告)日：2022-04-19
申请号：US16520680
申请日：2019-07-24
申请人： APPLIED MATERIALS, INC.
发明人： Prayudi Lianto , Guan Huei See , Sriskantharajah Thirunavukarasu , Arvind Sundarrajan , Xundong Dai , Peter Khai Mum Fung
IPC分类号： G11C16/04 , H01L23/00 , B23K101/40 , B23K20/02
摘要： Methods for bonding substrates used, for example, in substrate-level packaging, are provided herein. In some embodiments, a method for bonding substrates includes: performing electrochemical deposition (ECD) to deposit at least one material on each of a first substrate and a second substrate, performing chemical mechanical polishing (CMP) on the first substrate and the second substrate to form a bonding interface on each of the first substrate and the second substrate, positioning the first substrate on the second substrate so that the bonding interface on the first substrate aligns with the bonding interface on the second substrate, and bonding the first substrate to the second substrate using the bonding interface on the first substrate and the bonding interface on the second substrate.

8. 发明申请

US20220108908A1 SHADOW RING KIT FOR PLASMA ETCH WAFER SINGULATION PROCESS 有权
公开(公告)号：US20220108908A1
公开(公告)日：2022-04-07
申请号：US17064470
申请日：2020-10-06
申请人： Applied Materials, Inc.
发明人： Karthik Elumalai , Eng Sheng Peh , Michael Sorensen , Sriskantharajah Thirunavukarasu , Arunkumar Tatti
IPC分类号： H01L21/683 , H01L21/3065 , H01J37/305
摘要： Shadow ring kits and methods of dicing semiconductor wafers are described. In an example, an etch apparatus includes a chamber, and a plasma source within or coupled to the chamber. An electrostatic chuck is within the chamber, the electrostatic chuck including a conductive pedestal to support a substrate carrier sized to support a wafer having a first diameter. A shadow ring assembly is between the plasma source and the electrostatic chuck, the shadow ring assembly sized to process a wafer having a second diameter smaller than the first diameter.

9. 发明授权

US10930542B2 Apparatus for handling various sized substrates 有权
公开(公告)号：US10930542B2
公开(公告)日：2021-02-23
申请号：US16272811
申请日：2019-02-11
申请人： APPLIED MATERIALS, INC.
发明人： Sriskantharajah Thirunavukarasu , Eng Sheng Peh , Karrthik Parathithasan , Fang Jie Lim
IPC分类号： H01L21/687 , H01L21/677 , H01L21/683 , H01L21/67
摘要： Embodiments of methods and apparatus for handling substrates of different sizes are provided herein. In some embodiments, an apparatus for handling substrates of different sizes includes: a pair of end effectors having a first set of contact pads configured to support a substrate having a first size and a second set of contact pads configured to support a substrate having a second size, smaller than the first size.

10. 发明授权

US10446423B2 Next generation warpage measurement system 有权
公开(公告)号：US10446423B2
公开(公告)日：2019-10-15
申请号：US15623503
申请日：2017-06-15
申请人： APPLIED MATERIALS, INC.
发明人： Jun-Liang Su , Karthik Elumalai , Eng Sheng Peh , Sriskantharajah Thirunavukarasu , Dimantha Rajapaksa
IPC分类号： G01B11/14 , H01L21/67 , G01B11/24 , H01L21/673 , H01L21/677 , G01B11/30
摘要： Systems, apparatuses and methods for determining a surface profile of a substrate are provided. In one embodiment, a method includes projecting a signal having a vertical component/profile across the surface of the substrate from a plurality of locations along a first side of the substrate, capturing the projected signals at each of a plurality of respective locations across the surface of the substrate and determining a surface profile for the substrate using the captured signals. The process can be automated using a controller having predetermined projection and capture positions along respective sides of the substrate, where a surface profile of the substrate can be automatically determined by the controller using the captured signals.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式