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    • 4. 发明公开
    • 얼라인 키 형성방법
    • 形成对齐方法
    • KR1020080069477A
    • 2008-07-28
    • KR1020070007244
    • 2007-01-23
    • 삼성전자주식회사
    • 신성호홍창기윤보언김준용김성준
    • H01L21/027
    • G03F9/708H01L23/544H01L2223/54426H01L2223/5446
    • A method for forming an align key is provided to prevent damage to align key groves and remove the asymmetry of an align mark by forming sacrificial layer patterns in align key grooves. A method for forming an align key comprises the steps of: forming trenches(104) and align key grooves(102) on a substrate(100); depositing opaque conductive layers on an entire surface of the substrate wherein the trenches and align key grooves are formed; depositing sacrificial layers on the opaque conductive layers; separating the opaque conductive layers and the sacrificial layers by processing a CMP(Chemical Mechanical Polishing) process; and removing the sacrificial layers. The opaque conductive layers are metal or a metal oxidation layer.
    • 提供一种用于形成对准键的方法,以通过在对准键槽中形成牺牲层图案来防止损坏对准键槽并消除对准标记的不对称性。 一种用于形成对准键的方法包括以下步骤:形成沟槽(104)并对准衬底(100)上的键槽(102); 在衬底的整个表面上沉积不透明导电层,其中形成沟槽和对准键槽; 在不透明导电层上沉积牺牲层; 通过加工CMP(化学机械抛光)工艺来分离不透明导电层和牺牲层; 并去除牺牲层。 不透明导电层是金属或金属氧化层。
    • 5. 发明授权
    • 고 평탄화 화학 기계적 연마 방법 및 반도체 소자의제조방법
    • 高平面化学机械抛光方法及制造半导体器件的方法
    • KR100829598B1
    • 2008-05-14
    • KR1020060113083
    • 2006-11-16
    • 삼성전자주식회사
    • 김준용홍창기윤보언권병호
    • H01L21/304
    • H01L21/31053C09G1/02
    • A high planarity CMP method and a semiconductor device manufacturing method are provided to improve a polishing performance of the CMP method by doubling a polishing speed on a silicon oxide film with a step difference. A film to be polished(120) with a surface step difference is formed on a substrate(100). The substrate includes a cell region and a periphery region. A structure(110), such as a hard mask, a conductive film, an electrode, a conductive film pattern, an insulation film, a metal line, or an insulation film pattern, is formed on the substrate. The structure is formed on the cell region on the substrate. A first CMP(Chemical Mechanical Polishing) is performed on the film to be polished at a first process condition between 30 and 80 °C to form an intermediate film. A second CMP is performed on the intermediate film at a second process condition between 5 and 25 °C.
    • 提供高平坦度CMP方法和半导体器件制造方法,以通过以阶梯差将氧化硅膜上的研磨速度加倍来提高CMP方法的抛光性能。 在基板(100)上形成具有表面台阶差的待抛光薄膜(120)。 基板包括单元区域和外围区域。 在基板上形成诸如硬掩模,导电膜,电极,导电膜图案,绝缘膜,金属线或绝缘膜图案的结构(110)。 该结构形成在基板上的单元区域上。 在30至80℃的第一工艺条件下对待研磨的膜进行第一CMP(化学机械抛光)以形成中间膜。 在5和25℃之间的第二工艺条件下对中间膜进行第二次CMP。
    • 6. 发明公开
    • 복합 영상 신호에서의 화질 개선 방법 및 그 장치, 복합영상 신호에서의 왜곡 제거 방법 및 그 장치
    • 用于改进复合视频信号质量的方法及其装置以及用于移除复合视频信号的装置及其装置的方法
    • KR1020070118756A
    • 2007-12-18
    • KR1020060052873
    • 2006-06-13
    • 삼성전자주식회사서강대학교산학협력단
    • 김성희양승준박래홍이지원이현승김준용임보라
    • H04N9/77H04N9/64
    • H04N19/186H04N19/51H04N19/80H04N19/86
    • A method and an apparatus for improving image quality in a composition video signal, and a method and an apparatus for removing the distortion from the composition video signal are provided to install filters before a decoding operation to perform a pre-processing operation such that noise is removed from one dimensional signal and various distortions are detected and removed. A method for improving image quality of a composition video signal comprises the steps of dividing a composition video signal into a plurality of frequency domain bands by using low pass and high pass filters(502), performing a wavelet packet filtering operation with respect to a frequency band, which includes a color signal having energy exceeding predetermined threshold energy, among the frequency domain bands(506), and performing a wiener filtering operation with respect to bands including a color signal having energy less than the threshold energy(508).
    • 提供一种用于提高构图视频信号中的图像质量的方法和装置,以及用于从构图视频信号中去除失真的方法和装置,用于在解码操作之前安装滤波器以进行预处理操作,使得噪声为 从一维信号中去除并检测和去除各种失真。 一种用于提高构图视频信号的图像质量的方法包括以下步骤:通过使用低通和高通滤波器(502)将合成视频信号分成多个频域带,执行相对于频率的小波包滤波操作 频带,其包括在频域频带(506)中具有超过预定阈值能量的颜色信号,并且对于包括具有小于阈值能量的能量的颜色信号的频带(508)执行维纳滤波操作。
    • 9. 发明公开
    • 비휘발성 메모리 집적 회로 장치의 제조 방법 및 이를통해서 제조된 비휘발성 메모리 집적 회로 장치
    • 非易失性存储器集成电路装置的制造方法和非易失性存储器集成电路装置
    • KR1020080008057A
    • 2008-01-23
    • KR1020060067480
    • 2006-07-19
    • 삼성전자주식회사
    • 권병호홍창기윤보언김준용
    • H01L21/8247H01L27/115
    • H01L27/11568H01L27/105H01L27/11526H01L27/11529H01L21/28273
    • A method for fabricating a non-volatile memory integrated circuit device and a non-volatile memory integrated circuit device fabricated thereby are provided to minimize an RC delay of a word line by forming the word line with a double layer of a conductive pattern and a damascene metal layer pattern. An isolation region is formed on a substrate to define a cell array region and a peripheral circuit region. A plurality of first and second pre-stack gate structures(10a,12a) are formed on the cell array region. Each of the first and second pre-stack gate structures includes a lower structure, a conductive pattern, and a first sacrificial layer pattern. A first pitch between the first pre-stack gate structures and a second pitch between the first and second pre-stack gate structures are narrower than a third pitch between the second pre-stack gate structures. A junction region is formed on the exposed cell array region. A spacer(60) is formed on the sidewalls of the first and second pre-stack gate structures. The spacer between the first pre-stack gate structures comes in contact with the spacer between the first and second pre-stack gate structures. The spacers between the second pre-stack gate structures do not come in contact with each other. A second sacrificial layer pattern(90) is formed to fill a space between the second pre-stack gate structures. The first sacrificial layer pattern is removed from the first and second pre-stack gate structures. A damascene metal layer pattern is formed on the first and second pre-stack gate structures to complete a first and second stack gate structures. The second sacrificial layer pattern is removed. A stop layer is formed on an upper surface of the first stack gate structure, an upper surface and a sidewall of a second stack gate structure, and the substrate.
    • 提供了一种用于制造由此制造的非易失性存储器集成电路器件和非易失性存储器集成电路器件的方法,以通过用双层导电图案和镶嵌形成字线来最小化字线的RC延迟 金属层图案。 在衬底上形成隔离区以限定电池阵列区域和外围电路区域。 在单元阵列区域上形成多个第一和第二叠前栅极结构(10a,12a)。 第一和第二叠前栅极结构中的每一个包括下部结构,导电图案和第一牺牲层图案。 第一预叠栅极结构之间的第一间距和第一和第二叠前栅极结构之间的第二间距比第二叠前栅极结构之间的第三间距窄。 在暴露的电池阵列区域上形成结区。 间隔物(60)形成在第一和第二叠层栅极结构的侧壁上。 第一堆叠前栅极结构之间的间隔物与第一和第二堆叠前栅极结构之间的间隔物接触。 第二叠前栅极结构之间的间隔物彼此不接触。 形成第二牺牲层图案(90)以填充第二叠前栅极结构之间的空间。 第一牺牲层图案从第一和第二叠前栅极结构去除。 在第一和第二叠前栅极结构上形成镶嵌金属层图案以完成第一和第二堆叠栅极结构。 去除第二牺牲层图案。 在第一堆叠栅极结构的上表面,第二堆叠栅极结构的上表面和侧壁以及基板上形成停止层。
    • 10. 发明公开
    • 영상의 해상도 변환 방법 및 그 장치
    • 从低分辨率图像获取超分辨率图像的方法及其设备
    • KR1020070119879A
    • 2007-12-21
    • KR1020060054375
    • 2006-06-16
    • 삼성전자주식회사서강대학교산학협력단
    • 한승훈양승준박래홍김준용
    • H04N7/01
    • G06T3/4084G06T7/13H04N7/014H04N7/0142
    • A method and an apparatus for converting resolution of images are provided to solve a problem that because a point spread function in the same direction is used during a resolution conversion process, RF components cannot be properly reflected, degrading picture quality. An edge detecting unit(340) detects an edge region from an inputted low-resolution video frame and the direction of the edge region to generate edge map and edge direction information. A directional function generating unit(350) generates a directional point spread function based on the generated edge map and edge direction information. An initial interpolation unit(310) interpolates the inputted low-resolution video frame into a high-resolution video frame. A residual calculating unit generates a residual term by using the inputted low-resolution video frame, the high-resolution video frame and the directional point spread function. An updating unit performs updating on the interpolated high-resolution video frame according to results obtained by comparing the residual term and a certain threshold value.
    • 提供了用于转换图像分辨率的方法和装置,以解决由于在分辨率转换处理期间使用相同方向的点扩散函数的问题,RF分量不能被适当地反映,降低图像质量。 边缘检测单元(340)从输入的低分辨率视频帧和边缘区域的方向检测边缘区域以产生边缘图和边缘方向信息。 方向函数生成单元(350)基于生成的边缘图和边缘方向信息生成定向点扩展函数。 初始内插单元(310)将输入的低分辨率视频帧内插成高分辨率视频帧。 剩余计算单元通过使用输入的低分辨率视频帧,高分辨率视频帧和方向点扩展函数来产生残余项。 更新单元根据通过比较剩余项和特定阈值而获得的结果,对内插高分辨率视频帧执行更新。