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1. 发明专利

JP2017092051A 発光装置审中-公开
公开(公告)号：JP2017092051A
公开(公告)日：2017-05-25
申请号：JP2017034969
申请日：2017-02-27
申请人：株式会社半導体エネルギー研究所 , Semiconductor Energy Lab Co Ltd
发明人： YAMAZAKI SHUNPEI , KATAYAMA MASAHIRO , EGUCHI SHINGO , OIKAWA YOSHIAKI , SATO AMI , SEO TETSUSHI , HATANO KAORU
IPC分类号： H05B33/02 , H01L51/50 , H05B33/14 , H05B33/22
CPC分类号： H01L27/3246 , H01L27/1214 , H01L27/1266 , H01L29/7869 , H01L51/003 , H01L51/52 , H01L51/524 , H01L51/5253 , H01L2251/5338 , H05B33/02 , H05B33/04 , H05B33/12
摘要：【課題】薄型化を達成しながら、信頼性が高い発光装置を提供することを目的の一とする。また、可撓性を有する基板上に発光素子が設けられた発光装置を歩留まり良く製造することを目的の一とする。【解決手段】可撓性を有する基板と、基板上に形成された発光素子と、発光素子を覆う樹脂膜と、を有し、発光素子において隔壁として機能する絶縁層が凸状部有し、樹脂膜がその凸状部を埋没することで、薄型化を達成しながら、信頼性の高い発光装置を提供することができる。また、作製工程においても、歩留まり良く発光装置を作製することができる。【選択図】図1

2. 发明专利

JP2015035610A 半導体装置审中-公开
标题翻译：半导体器件
公开(公告)号：JP2015035610A
公开(公告)日：2015-02-19
申请号：JP2014189896
申请日：2014-09-18
申请人：株式会社半導体エネルギー研究所 , Semiconductor Energy Lab Co Ltd
发明人： OKAZAKI KENICHI , OIKAWA YOSHIAKI , MARUYAMA HODAKA , GOTO HIROMITSU , YAMAZAKI SHUNPEI
IPC分类号： H01L21/8236 , G09F9/30 , H01L27/08 , H01L27/088 , H01L29/786 , H01L51/50 , H05B33/14
CPC分类号： H01L27/1214 , H01L27/0207
摘要：【課題】酸化物半導体を用いた薄膜トランジスタにおいて所望の閾値電圧を得ることを課題の一つとし、該閾値電圧の経時的な変化を抑制することを課題の一つとし、また、具体的には該薄膜トランジスタを所望の閾値電圧を有するトランジスタを用いて構成される論理回路に適用することを課題の一つとする。【解決手段】上記目的を達成するために、同一基板上に酸化物半導体層の厚みが異なる薄膜トランジスタを形成し、酸化物半導体層の厚みにより閾値が制御された薄膜トランジスタをもちいて論理回路を構成すればよい。また、脱水化または脱水素化処理が施された後に、酸化物絶縁膜が接して形成された酸化物半導体膜を利用することで、閾値の経時変化が抑制され、論理回路の信頼性を高められる。【選択図】図10
摘要翻译：要解决的问题：在使用氧化物半导体的薄膜晶体管中获得预期的阈值电压; 并且抑制阈值电压的时间变化; 并且特别地将薄膜晶体管施加到由各自具有预期阈值电压的晶体管组成的逻辑电路。解决方案：在半导体器件中，优选在同一衬底上形成具有氧化物半导体层的薄膜晶体管，并且通过使用具有由氧化物半导体层的厚度控制的阈值的薄膜晶体管构成逻辑电路。通过在进行脱水或脱氢处理之后利用氧化物半导体膜附近形成氧化物绝缘膜的氧化物半导体膜，抑制阈值的时间变化，提高逻辑电路的可靠性。

3. 发明专利

JP2013149982A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013149982A
公开(公告)日：2013-08-01
申请号：JP2013029225
申请日：2013-02-18
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , SAKATA JUNICHIRO , NODA KOSEI , SAKAKURA MASAYUKI , OIKAWA YOSHIAKI , MARUYAMA HODAKA
IPC分类号： H01L29/786 , G02F1/1368 , H01L21/316 , H01L21/336 , H01L21/363 , H01L51/50
CPC分类号： H01L29/78606 , H01L23/5329 , H01L27/1225 , H01L29/24 , H01L29/66742 , H01L29/66969 , H01L29/7869 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To manufacture and provide a high-reliability semiconductor device having a thin-film transistor with stable electrical characteristics.SOLUTION: Boron elements or aluminum elements are contained in an insulating layer covering an oxide semiconductor layer of the thin-film transistor. The insulating layer containing the boron elements or the aluminum elements is formed by a spattering method using a silicon target or a silicon oxide target containing the boron elements or the aluminum elements. Additionally, the oxide semiconductor layer of the thin-film transistor is covered with an insulating layer containing antimony elements (Sb) or phosphorus elements (P) instead of the boron elements.
摘要翻译：要解决的问题：制造和提供具有稳定电特性的薄膜晶体管的高可靠性半导体器件。解决方案：硼元素或铝元素包含在覆盖薄膜晶体管的氧化物半导体层的绝缘层中。包含硼元素或铝元素的绝缘层通过使用含有硼元素或铝元素的硅靶或氧化硅靶的溅射法形成。此外，用含有锑元素（Sb）或磷元素（P）的绝缘层代替硼元素，覆盖薄膜晶体管的氧化物半导体层。

4. 发明专利

JP2013070070A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013070070A
公开(公告)日：2013-04-18
申请号：JP2012246206
申请日：2012-11-08
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , MARUYAMA HODAKA , OIKAWA YOSHIAKI , TOCHIBAYASHI KATSUAKI
IPC分类号： H01L29/786 , C23C14/34 , G02F1/1368 , G02F1/167 , G02F1/17 , H01L21/20 , H01L21/336 , H01L21/363 , H01L21/8242 , H01L21/8247 , H01L27/105 , H01L27/108 , H01L27/115 , H01L29/788 , H01L29/792 , H01L51/50
CPC分类号： H01L27/1225 , H01L21/02472 , H01L21/02483 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/02667 , H01L21/28185 , H01L27/1229 , H01L29/045 , H01L29/66969 , H01L29/7869
摘要： PROBLEM TO BE SOLVED: To form an oxide semiconductor layer excellent in crystallinity for enabling manufacturing of a transistor excellent in electrical properties to achieve the practical use of a large-size display device, a high-performance semiconductor device, and the like.SOLUTION: A manufacturing method of a semiconductor device comprises: performing a first heating treatment for crystallizing a first oxide semiconductor layer and forming a second oxide semiconductor layer on the first oxide semiconductor layer; performing a second heating treatment in a step-by-step manner under conditions different in temperature and atmosphere to efficiently perform formation of an oxide semiconductor layer having a crystal region in which a c-axis is oriented to a direction approximately perpendicular to a surface and to efficiently cover the deficiency of oxygen to form an oxide insulation layer contacting the oxide semiconductor layer; performing a third heating treatment for supplying oxygen to the oxide semiconductor layer again to form a hydrogen-containing nitride insulation layer on the oxide insulation layer; and performing a fourth heating treatment for supplying hydrogen at least to a boundary face between the oxide semiconductor layer and the oxide insulation layer.
摘要翻译：要解决的问题：为了形成具有优异的电性能的晶体管的结晶性优异的氧化物半导体层，以实现大尺寸显示装置，高性能半导体装置等的实际应用。解决方案：半导体器件的制造方法包括：对第一氧化物半导体层进行结晶并在第一氧化物半导体层上形成第二氧化物半导体层的第一加热处理; 在温度和气氛不同的条件下逐步进行第二次加热处理，以有效地形成具有c轴取向为大致垂直于表面的方向的晶体区域的氧化物半导体层，以及有效地覆盖氧的不足以形成与氧化物半导体层接触的氧化物绝缘层; 对氧化物半导体层再次进行氧化，进行第三加热处理，以在氧化物绝缘层上形成含氢氮化物绝缘层; 以及至少对氧化物半导体层和氧化物绝缘层之间的边界面进行氢的供给的第四加热处理。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2011124561A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011124561A
公开(公告)日：2011-06-23
申请号：JP2010249533
申请日：2010-11-08
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： AKIMOTO KENGO , SAKATA JUNICHIRO , OIKAWA YOSHIAKI , YAMAZAKI SHUNPEI
IPC分类号： H01L29/786 , H01L21/28
CPC分类号： H01L29/7869 , H01L29/45
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a high-reliability semiconductor device having stable electrical characteristics and having a thin-film transistor formed which uses an oxide semiconductor. SOLUTION: The semiconductor device includes an oxide semiconductor film overlapping with a gate electrode with a gate insulating film interposed therebetween; and a source electrode or a drain electrode which is in contact with the oxide semiconductor film. The source electrode or the drain electrode includes a mixture, metal compound, or alloy containing one or more of metals with low electronegativity, such as titanium, magnesium, yttrium, aluminum, tungsten, and molybdenum, and the concentration of hydrogen in the source electrode or the drain electrode is 1.2 times, preferably, 5 times or more as high as that of hydrogen in the oxide semiconductor film. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造具有稳定的电气特性并且具有使用氧化物半导体的薄膜晶体管形成的高可靠性半导体器件的方法。解决方案：半导体器件包括与栅电极重叠的氧化物半导体膜，栅极绝缘膜插入其间; 以及与氧化物半导体膜接触的源电极或漏电极。源电极或漏极包括含有一种或多种具有低电负性的金属如钛，镁，钇，铝，钨和钼的混合物，金属化合物或合金，并且源电极中的氢浓度或漏极为氧化物半导体膜中的氢的1.2倍，优选为5倍以上。版权所有（C）2011，JPO＆INPIT

6. 发明专利

JP2011077517A Liquid crystal display device and method for manufacturing the same 有权
标题翻译：液晶显示装置及其制造方法
公开(公告)号：JP2011077517A
公开(公告)日：2011-04-14
申请号：JP2010198549
申请日：2010-09-06
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , SAKAKURA MASAYUKI , SAKATA JUNICHIRO , TSUBUKI MASASHI , AKIMOTO KENGO , HOSOHANE MIYUKI , OIKAWA YOSHIAKI
IPC分类号： H01L29/786 , G02F1/1368 , G09F9/30 , H01L21/28
CPC分类号： H01L27/1225
摘要： PROBLEM TO BE SOLVED: To provide an active matrix liquid crystal display device in which a plurality of kinds of circuits are formed over the same substrate and a plurality of kinds of thin film transistors are provided in accordance with characteristics of the plurality of kinds of circuits. SOLUTION: An inverted-coplanar thin film transistor having an oxide semiconductor layer which overlaps with a source electrode layer and a drain electrode layer is used for a pixel thin film transistor. A channel-protective thin film transistor is used for a driver-circuit thin film transistor. In addition, main parts of the pixel thin film transistor are formed using a light-transmitting material, so that an aperture ratio is increased. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：解决的问题：提供一种有源矩阵液晶显示装置，其中在同一基板上形成多种电路，并且根据多个晶体管的特性提供多种薄膜晶体管种类的电路。解决方案：具有与源电极层和漏电极层重叠的氧化物半导体层的倒共面薄膜晶体管用于像素薄膜晶体管。通道保护薄膜晶体管用于驱动电路薄膜晶体管。此外，使用透光材料形成像素薄膜晶体管的主要部分，使得开口率增加。版权所有（C）2011，JPO＆INPIT

7. 发明专利

JP2011054957A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011054957A
公开(公告)日：2011-03-17
申请号：JP2010177489
申请日：2010-08-06
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , SAKATA JUNICHIRO , SAKAKURA MASAYUKI , OIKAWA YOSHIAKI , OKAZAKI KENICHI , MARUYAMA HODAKA
IPC分类号： H01L29/786 , G02F1/1368
CPC分类号： H01L27/1251 , H01L21/385 , H01L27/1214 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L27/127 , H01L27/1288 , H01L29/4908 , H01L29/78648 , H01L29/7869 , H01L33/0041 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To improve reliability of a semiconductor device. SOLUTION: The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate. The driver circuit portion and the display portion include thin film transistors in which a semiconductor layer includes an oxide semiconductor; a first wiring; and a second wiring. The thin film transistors each include a source electrode layer or a drain electrode layer which each have a shape whose end portions are located on an inner side than end portions of the semiconductor layer. In the thin film transistor in the driver circuit portion, the semiconductor layer is provided between a gate electrode layer and a conductive layer. The first wiring and the second wiring are electrically connected in an opening provided in a gate insulating layer through an oxide conductive layer. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提高半导体器件的可靠性。解决方案：半导体器件包括在同一衬底上的驱动电路部分和显示部分（也称为像素部分）。驱动器电路部分和显示部分包括其中半导体层包括氧化物半导体的薄膜晶体管; 第一布线和第二布线。薄膜晶体管各自包括源极电极层或漏极电极层，每个源极电极层或漏极电极层的端部位于比半导体层的端部更靠内侧的形状。在驱动电路部分的薄膜晶体管中，半导体层设置在栅电极层和导电层之间。第一布线和第二布线通过氧化物导电层在设置在栅极绝缘层中的开口中电连接。版权所有（C）2011，JPO＆INPIT

8. 发明专利

JP2010039482A Liquid crystal display device and method for manufacturing the same 有权
标题翻译：液晶显示装置及其制造方法
公开(公告)号：JP2010039482A
公开(公告)日：2010-02-18
申请号：JP2009161387
申请日：2009-07-08
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： OIKAWA YOSHIAKI , EGUCHI SHINGO , MASUYAMA MITSUO , KATANIWA MASATOSHI , SHOJI HIRONOBU , NAKATA MASATAKA
IPC分类号： G02F1/1333
CPC分类号： G02F1/133305 , G02F2201/503 , G02F2202/22
摘要： PROBLEM TO BE SOLVED: To provide a flexible and highly reliable liquid crystal display device which is not easily damaged even if subjected to external pressure, and to provide a method for manufacturing the liquid crystal device with a high yield. SOLUTION: The liquid crystal display device includes a first structure body 132 and a second structure body 138, which are arranged face to face via a liquid crystal, and a sealing material 134 for enclosing the liquid crystal. The first and second structure bodies, in each of which a fibrous body is impregnated with an organic resin, are brought into contact with each other on the outside of the sealing material to be fixed. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种即使受到外部压力也不容易损坏的柔性且高可靠性的液晶显示装置，并且提供一种以高产率制造液晶装置的方法。解决方案：液晶显示装置包括通过液晶面对面布置的第一结构体132和第二结构体138，以及用于封闭液晶的密封材料134。其中纤维体浸渍有机树脂的第一和第二结构体在密封材料的外侧彼此接触以固定。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2010021351A Semiconductor apparatus 有权
标题翻译： SEMICONDUCTOR APPARATUS
公开(公告)号：JP2010021351A
公开(公告)日：2010-01-28
申请号：JP2008180287
申请日：2008-07-10
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： OIKAWA YOSHIAKI , EGUCHI SHINGO , MASUYAMA MITSUO , KATANIWA MASATOSHI , SHOJI HIRONOBU , NAKATA MASATAKA , YAMAZAKI SHUNPEI
IPC分类号： H01L23/29 , B32B5/02 , G06K19/07 , G06K19/077 , H01L23/31 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor apparatus, which includes resistance to external stress with high reliability while achieving thinning and miniaturization, and which prevents failures in shape and characteristics caused by the external stress in a production process to improve a yield at low cost with high productivity. SOLUTION: In a semiconductor apparatus, a semiconductor integrated circuit using a single crystal semiconductor substrate is provided between structures obtained by impregnating a pair of fiber bodies 150 and 160 opposed to each other with an organic resin. In the structures obtained by impregnating the pair of fiber bodies with the organic resin, the semiconductor integrated circuit is arranged at the center part. The structures are adhered to each other at the end to seal the semiconductor integrated circuit. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供一种半导体装置，其在实现薄化和小型化的同时具有高的可靠性的外部应力的耐受性，并且防止在制造过程中由外部应力引起的形状和特性的故障以提高产量成本低，生产率高。解决方案：在半导体装置中，使用单晶半导体衬底的半导体集成电路设置在通过用有机树脂浸渍彼此相对的一对纤维体150和160而获得的结构之间。在通过用有机树脂浸渍一对纤维体获得的结构中，半导体集成电路布置在中心部分。结构在端部彼此粘合以密封半导体集成电路。版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2009302517A Semiconductor device, and method for manufacturing semiconductor device 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：JP2009302517A
公开(公告)日：2009-12-24
申请号：JP2009111743
申请日：2009-05-01
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： OIKAWA YOSHIAKI , EGUCHI SHINGO , YAMAZAKI SHUNPEI
IPC分类号： H01L21/822 , G06K19/07 , G06K19/077 , H01L21/312 , H01L27/04 , H01L29/786
CPC分类号： H01L21/71 , H01L23/293 , H01L23/3157 , H01L2924/0002 , H01L2924/12044 , H01L2924/19041 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device by reducing defects of the semiconductor device, such as defects in shape and characteristic due to external stress and electrostatic discharge. SOLUTION: The semiconductor device includes a semiconductor integrated circuit sandwiched by impact resistance layers against external stress or an impact diffusion layer diffusing the impact and a conductive layer covering the semiconductor integrated circuit. With the use of the conductive layer covering the semiconductor integrated circuit, electrostatic breakdown (malfunctions of the circuit or damages of a semiconductor element) due to electrostatic discharge (ESD) of the semiconductor integrated circuit can be prevented. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：通过减少半导体器件的缺陷，例如由于外部应力和静电放电引起的形状和特性的缺陷，来提供高度可靠的半导体器件。解决方案：半导体器件包括夹在耐冲击电阻层之间的外部应力的半导体集成电路或扩散冲击的冲击扩散层和覆盖半导体集成电路的导电层。通过使用覆盖半导体集成电路的导电层，可以防止由于半导体集成电路的静电放电（ESD）引起的静电击穿（电路的故障或半导体元件的损坏）。版权所有（C）2010，JPO＆INPIT

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