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1. 发明专利

JP2013203999A Diphenylsulfone compound for polymer electrolyte, polymer electrolyte, membrane electrode joined body, solid polymeric fuel cell, and production method of polymer electrolyte 有权
标题翻译：聚合物电解质，聚合物电解质，膜电极接合体，固体聚合物燃料电池的二苯基砜化合物和聚合物电解质的生产方法
公开(公告)号：JP2013203999A
公开(公告)日：2013-10-07
申请号：JP2012077374
申请日：2012-03-29
申请人： Tokyo Institute Of Technology , 国立大学法人東京工業大学 , Toppan Printing Co Ltd , 凸版印刷株式会社
发明人： YAMAMOTO RYUICHI , KOJIMA TAKAHIRO , ABE MASAHIRO , OTA MASAFUMI , NAOI KOKUKO
IPC分类号： C08G61/12 , H01B1/06 , H01B13/00 , H01M8/02 , H01M8/10
CPC分类号： Y02P70/56
摘要： PROBLEM TO BE SOLVED: To provide a diphenylsulfone compound for a polymer electrolyte, in which swelling can be suppressed, a polymer electrolyte, a membrane electrode joined body, a solid polymeric fuel cell, and a production method of a polymer electrolyte.SOLUTION: A diphenylsulfone compound for a polymer electrolyte is expressed by general formula (1). In the formula, Rand Reach independently represent a linking group selected from the group consisting of -(CH)-, -O-(CH)-, -S-(CH)-, -NH-(CH)-, -(CF)-, -O-(CF)-, -S-(CF)- and -NH-(CF)-, where a represents an integer of 2 or more; Xand Xeach independently represent a halogen atom; and Yand Yeach independently represent an atom selected from a group consisting of group 1 elements and group 2 elements.
摘要翻译：要解决的问题：为了提供可以抑制溶胀的聚合物电解质的二苯砜化合物，聚合物电解质，膜电极接合体，固体聚合物燃料电池和聚合物电解质的制造方法。解决方案：A 用于聚合物电解质的二苯砜化合物由通式（1）表示。在该式中，Rand Reach独立地表示选自 - （CH） - ， - O-（CH） - ， - S-（CH） - ， - NH-（CH） - ， - （CF ） - ， - O-（CF） - ， - S-（CF） - 和-NH-（CF） - ，其中a表示2或更大的整数; Xand Xeach独立代表一个卤素原子; Yand Yeach独立地表示选自由1族元素和2族元素组成的组的原子。

2. 发明专利

JP2014227517A 有機化合物、高分子有機化合物、高分子有機化合物の製造方法、高分子電解質膜、高分子電解質、膜電極接合体、及び、燃料電池有权
标题翻译：有机化合物，聚合有机化合物，聚合有机化合物生产方法，聚电解质膜，聚电解质，膜电极组件和燃料电池
公开(公告)号：JP2014227517A
公开(公告)日：2014-12-08
申请号：JP2013109956
申请日：2013-05-24
申请人：国立大学法人東京工業大学 , Tokyo Institute Of Technology , 凸版印刷株式会社 , Toppan Printing Co Ltd
发明人： YAMAMOTO RYUICHI , KISHI KATSUYUKI , NAOI KOKUKO
IPC分类号： C08G61/12 , C08J5/22 , H01B1/06 , H01M4/86 , H01M8/02
CPC分类号： Y02P70/56
摘要：【課題】耐酸化性を向上させることのできる有機化合物、高分子有機化合物、高分子有機化合物の製造方法、高分子電解質膜、高分子電解質、膜電極接合体、及び、燃料電池を提供する。【解決手段】下記一般式(1)で表される、-Z-PO(OR1)(OR2)置換基を有するピリドン環から成る2価のピリドンジイル基を有することを特徴とする有機化合物。但し、一般式(1)において、Zは2価の有機基を示し、R1、R2は各々独立にHまたは1価の有機基を示す。【選択図】なし
摘要翻译：要解决的问题：提供能够提高抗氧化性的有机化合物，聚合有机化合物，聚合有机化合物制备方法，聚电解质膜，聚电解质，膜电极组件和燃料电池。解决方案：存在提供了一种有机化合物，其特征在于具有包含在图中由通式（1）表示的-Z-PO（OR）（OR）取代基的吡啶酮环的二价吡啶二基。在通式（1）中，Z表示二价有机基团，而兰德·达奇独立地表示H或一价有机基团。

3. 发明专利

JP2014229440A 固体高分子電解質の製造方法、固体高分子電解質、イオン伝導体、及び、膜電極接合体有权
标题翻译：制造固体聚电解质，固体电解质，离子导体和膜电极组件的方法
公开(公告)号：JP2014229440A
公开(公告)日：2014-12-08
申请号：JP2013107233
申请日：2013-05-21
申请人：国立大学法人東京工業大学 , Tokyo Institute Of Technology , 凸版印刷株式会社 , Toppan Printing Co Ltd
发明人： YAMAMOTO RYUICHI , KUDO YASUO , SHIOZAKI FUMIO , KISHI KATSUYUKI , NAOI KOKUKO
IPC分类号： H01M8/02 , C08F8/34 , C08K5/37 , C08L25/18 , C08L29/04 , C08L33/26 , C08L41/00 , C08L101/02 , H01B1/06 , H01B1/12 , H01B13/00
CPC分类号： Y02P70/56
摘要：【課題】機械的強度を向上させることのできる固体高分子電解質の製造方法、固体高分子電解質、イオン伝導体、及び、膜電極接合体を提供する。【解決手段】ポリビニルアルコールとスルホン化ポリマーと多価チオールを溶解する溶液の加熱を通じて、ポリビニルアルコールの脱水反応ならびに脱水により生成した二重結合への多価チオールの付加反応を漸次進行させる。これにより、架橋構造を有するマトリックスが形成され、マトリックスにスルホン化ポリマーが分散している固体高分子電解質が得られる。【選択図】図1
摘要翻译：要解决的问题：提供一种制造能够增加机械强度的固体聚电解质的方法，固体聚电解质，离子导体和膜电极组件。解决方案：一种制备固体聚电解质的方法包括以下步骤：逐渐促进聚乙烯醇的脱水反应，以及在溶解有聚乙烯醇，磺化聚合物和多硫醇的液体溶液被加热的时间段内，由于脱水而导致的多硫醇与双键的加成反应。在该方法中，形成具有交联结构的基质，得到在基体中分散有磺化聚合物的固体聚电解质。

4. 发明专利

JP2004063720A Manufacturing method of build-up multilayer printed-wiring board 审中-公开
公开(公告)号：JP2004063720A
公开(公告)日：2004-02-26
申请号：JP2002219232
申请日：2002-07-29
申请人： Toppan Printing Co Ltd , 凸版印刷株式会社
发明人： NAOI KOKUKO
IPC分类号： C25D5/18 , C25D7/00 , H01L23/12 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a build-up multilayer printed-wiring board that can form a filled via whose surface is flat in a hole for via having a small diameter (100 μmϕ or less) and high aspect ratio (0.7 or more). SOLUTION: A resin photosensitive layer 31 is formed on both the surfaces of a circuit board (an internal layer board) 10. A series of patterning treatments such as pattern exposure and development are made. An insulating layer 31a where the hole 32 for via is formed at a specific position is formed. A ground conductor layer is formed on the insulating layer 31a and in the hole 32 for via by electroless copper plating. By electrolytic panel plating using an electrolytic copper plating bath where an addition agent for the filled via is added with the plating substrate conductor layer as a cathode, a conductor layer 41 and the filled via 42 are formed, the conductor layer 41 is subjected to patterning treatment, second wiring layers 41a, 41b, a pad electrode 41c, and the like are formed, and the four-layer build-up multilayer printed-wiring board 100 is obtained. COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2003031624A Film carrier including electrical conductive path and method of manufacturing the same 审中-公开
标题翻译：包括导电路径的电影载体及其制造方法
公开(公告)号：JP2003031624A
公开(公告)日：2003-01-31
申请号：JP2001219765
申请日：2001-07-19
申请人： Toppan Printing Co Ltd , 凸版印刷株式会社
发明人： NAOI KOKUKO
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To provide a film carrier structure including an electrically conductive path and also to provide a method of manufacturing the same film carrier structure in which close contact property with electrolytic plating due to reduction in size of electrically conductive path and moreover electrical reliability are improved.
SOLUTION: In the film carrier with conductive layers at both surfaces, apertures 4-1, 4 are provided to a conductive layer 1 of one surface and an insulation film 2. Thereafter, the bottom of aperture is etched to provide an aperture 4-2 to the other conductive layer 3. Here, residues of insulation film and carbon generated at the internal wall and bottom part of the aperture are removed by solution and washing. Thereafter, a thin film conductor layer 6 is formed at the aperture 10, and an electrical conductive path and electrolytic plated conductive layer 7 are formed by electrolytic copper plating. Finally, the conductor layers of both surfaces are patterned to manufacture the film carrier including electrically conductive path through formation of electrodes and wiring pattern.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供一种包括导电路径的薄膜载体结构，并且还提供一种制造相同的薄膜载体结构的方法，该薄膜载体结构由于导电路径的尺寸减小而与电解电镀紧密接触，此外还具有电可靠性改进了解决方案：在两面具有导电层的薄膜载体中，将孔4-1,4提供到一个表面的导电层1和绝缘膜2.此后，孔的底部被蚀刻以提供孔4-2 到另一个导电层3.这里，通过溶液和洗涤除去在孔的内壁和底部产生的绝缘膜和碳的残留物。此后，在孔10处形成薄膜导体层6，并且通过电解镀铜形成导电路径和电解电镀导电层7。最后，对两个表面的导体层进行图案化以制造包括通过形成电极和布线图案的导电路径的薄膜载体。

6. 发明专利

JP2002368425A Printed circuit board and its manufacturing method 审中-公开
标题翻译：印刷电路板及其制造方法
公开(公告)号：JP2002368425A
公开(公告)日：2002-12-20
申请号：JP2001173861
申请日：2001-06-08
申请人： Toppan Printing Co Ltd , 凸版印刷株式会社
发明人： HASEGAWA TAKESHI , AMAMIYA HIROYASU , SUZUKI TATSUO , MINAKI KENICHI , NAOI KOKUKO
IPC分类号： H05K1/09 , H05K3/42 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a printed circuit board having no cavity or the like by eliminating a difference in heights between a non-penetration via and other part, and enriching in an electroplating layer even in the non-penetration via in the board having the non-penetration via for connecting a conductive layer between insulating layers. SOLUTION: The printed circuit board comprises the non-penetration via for connecting the conductive layer between the insulating layers 13. The conductive layer on the insulating layer has an electroless plating layer 14, a first electroplating layer 15, and a second electroplating layer. The board further comprises the non-penetration via for connecting the conductive layer between the insulating layers in such a manner that the conductive layer on the insulating layer has an electroless plating layer, a first electroplating layer and a second electroplating layer, and further a third electroplating layer.
摘要翻译：要解决的问题：通过消除非穿透通孔和其他部分之间的高度差异来提供不具有空腔等的印刷电路板，并且即使在具有电镀层的板中的非穿透通孔中也富集电镀层，用于在绝缘层之间连接导电层的非穿透通孔。解决方案：印刷电路板包括用于连接绝缘层13之间的导电层的非穿透通孔。绝缘层上的导电层具有化学镀层14，第一电镀层15和第二电镀层。该板还包括非穿透通孔，用于以绝缘层上的导电层具有化学镀层，第一电镀层和第二电镀层的方式连接绝缘层上的导电层，电镀层

7. 发明专利

JP2005101165A Flip chip mounting structure, substrate for mounting the same, and method of manufacturing the same 审中-公开
标题翻译：滑动芯片安装结构，用于安装其的基板及其制造方法
公开(公告)号：JP2005101165A
公开(公告)日：2005-04-14
申请号：JP2003331477
申请日：2003-09-24
申请人： Toppan Printing Co Ltd , 凸版印刷株式会社
发明人： NAOI KOKUKO
IPC分类号： H01L23/12 , H01L21/60
CPC分类号： H01L2224/0401 , H01L2224/05557 , H01L2224/16 , H01L2224/1601 , H01L2224/81191 , H01L2224/81385 , H01L2924/01078
摘要： PROBLEM TO BE SOLVED: To provide a flip chip mounting structure, substrate for mounting the same and a method of manufacturing the same for enabling stable electrical connection through sufficient connections between the element side electrode bump of semiconductor element and substrate side electrode in the flip chip mounting.
SOLUTION: The flip chip mounting structure is formed by mounting semiconductor elements and a plurality of element side electrodes which are concentrated to a single plane and provided on a flip chip semiconductor element to form a mound contact using a mounting substrate including a plurality of substrate side electrodes to be electrically and mechanically connected to the element side electrode via a connection metal. This flip chip mounting structure is characterized in providing a concave part in the substrate side electrode for feeding a metal material for joint at the time of flip chip mounting.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供倒装芯片安装结构，用于安装倒装芯片安装结构的基板及其制造方法，用于通过半导体元件的元件侧电极凸块与基板侧电极之间的充分连接实现稳定的电连接倒装芯片安装。解决方案：倒装芯片安装结构通过将半导体元件和集中在单个平面上的多个元件侧电极安装在倒装芯片半导体元件上而形成，以使用包括多个元件的安装基板形成墩形接触的基板侧电极经由连接金属电气机械连接到元件侧电极。该倒装芯片安装结构的特征在于，在倒装芯片安装时，在基板侧电极上设置用于供给接合用金属材料的凹部。版权所有（C）2005，JPO＆NCIPI

8. 发明专利

JP2010272223A Membrane electrode assembly, transcription base material for manufacturing membrane electrode assembly, coating transcription base material for manufacturing membrane electrode assembly, and solid polymer fuel cell 有权
标题翻译：膜电极组件，用于制造膜电极组件的转录基材料，用于制造膜电极组件的涂覆转印材料和固体聚合物燃料电池
公开(公告)号：JP2010272223A
公开(公告)日：2010-12-02
申请号：JP2009120682
申请日：2009-05-19
申请人： Toppan Printing Co Ltd , 凸版印刷株式会社
发明人： HABA YASUHIRO , NAOI KOKUKO
IPC分类号： H01M4/86 , H01M4/88 , H01M8/02 , H01M8/10
CPC分类号： Y02P70/56
摘要： PROBLEM TO BE SOLVED: To provide a membrane electrode assembly having excellent water repellency while retaining adhesion properties between an electrode catalyst layer having a waviness curve and a solid polymer electrolyte membrane, and power generation performance improved, a transcription base material for manufacturing the membrane electrode assembly, a coating transcription base material of an electrode catalyst layer for manufacturing a membrane electrode assembly, and a solid polymer fuel cell. SOLUTION: In the membrane electrode assembly equipped with a structure pinching a polymer electrolyte membrane with a pair of electrode catalyst layers, a surface on the opposite side of a jointing surface with a polymer electrolyte membrane of one of the pair of electrode catalyst layers has an average height of a waviness curve element obtained by a contour curve filter with cutoff value λf4 mm, λc0.8 mm in a direction on a surface of either the pair of the electrode catalyst layers to be 3 μm or more and 15 μm or less. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供具有优异的防水性的膜电极组件，同时保持具有波纹曲线的电极催化剂层和固体聚合物电解质膜之间的粘合性能，并且发电性能得到改善，制造用转印基材膜电极组件，用于制造膜电极组件的电极催化剂层的涂层转录基材和固体聚合物燃料电池。解决方案：在具有夹持具有一对电极催化剂层的聚合物电解质膜的结构的膜电极组件中，在接合表面的与电极催化剂对中的一个的高分子电解质膜相反的一侧的表面通过在一对电极催化剂层的表面上的方向上的切断值λf4mm，λc0.8mm的轮廓线滤波器得到的波纹曲线要素的平均高度为3μm以上且15μm以下或更少。版权所有（C）2011，JPO＆INPIT

9. 发明专利

JP2009299193A Analysis device for copper-electroplating solution 有权
标题翻译：铜电解液分析装置
公开(公告)号：JP2009299193A
公开(公告)日：2009-12-24
申请号：JP2009224533
申请日：2009-09-29
申请人： Toppan Printing Co Ltd , 凸版印刷株式会社
发明人： OKUBO RIICHI , NAOI KOKUKO , MIZUNO YUKA
IPC分类号： C25D21/12 , G01N27/416 , G01N27/42
CPC分类号： C25D21/12 , G01N27/42
摘要： PROBLEM TO BE SOLVED: To provide an analysis device for a copper-electroplating solution, which is suitable for determining embedding properties to be shown when a copper metal is embedded into a via hole or a trench provided in a printed board, a semiconductor-packaged substrate or a semiconductor product such as a semiconductor substrate through copper electroplating, or for determining a macrothrowing power (uniformity of physical properties and thickness of plated film). SOLUTION: This analysis device determines the effective embedding properties and the macrothrowing power of the copper-electroplating solution by measuring the change with time of the potential preferably on the condition of a cathode current density of 0.1 to 20 A/dm 2 . The analysis device determines the embedding properties and the like from the shape of a curve obtained by measuring the change with time of the potential while controlling the rotation number of the working electrode preferably to 100 to 7,500 rpm. The analysis device determines the embedding properties and the like by approximating the curve of the change with time of the potential in a fixed time period after the start of electrolysis, with the Boltzmann function, and determining the velocity dx of the potential change and the convergent point A2 of the potential. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种铜电镀溶液的分析装置，其适于确定当将铜金属嵌入到设置在印刷电路板中的通孔或沟槽中时所示的嵌入性能，半导体封装基板或半导体产品例如通过铜电镀的半导体基板，或用于确定宏观投影功率（物理性质和镀膜厚度的均匀性）。解决方案：该分析装置优选在阴极电流密度为0.1至20A / dm 2的条件下测量电位随时间的变化来确定铜电镀溶液的有效嵌入特性和宏观投入功率 > 2 。分析装置根据通过测量电位随时间的变化而获得的曲线形状来确定嵌入特性等，同时将工作电极的转数控制在100至7,500rpm。分析装置通过利用玻尔兹曼函数近似在电解开始后的固定时间段内的电位随时间的变化的曲线来确定嵌入特性等，并且确定电位变化的速度dx和收敛点A2的潜力。版权所有（C）2010，JPO＆INPIT

10. 发明专利

JP2010272222A Membrane electrode assembly, its manufacturing method, and solid polymer fuel cell 有权
标题翻译：膜电极组件及其制造方法和固体聚合物燃料电池
公开(公告)号：JP2010272222A
公开(公告)日：2010-12-02
申请号：JP2009120681
申请日：2009-05-19
申请人： Toppan Printing Co Ltd , 凸版印刷株式会社
发明人： HABA YASUHIRO , NAOI KOKUKO
IPC分类号： H01M8/02 , H01M4/86 , H01M4/88 , H01M8/10
CPC分类号： Y02P70/56
摘要： PROBLEM TO BE SOLVED: To provide a membrane electrode assembly, its manufacturing method and a solid polymer fuel cell, with short manufacturing tacts, gas diffusion properties and drainage properties of the first and the second electrode catalyst layers improved, ion conductivity of the membrane electrode assembly improved, and having excellent power generation characteristics, while retaining adhesion properties with a first electrode catalyst layer on an anode side, a second electrode catalyst layer on a cathode side and a polymer electrolyte membrane. SOLUTION: In the method for manufacturing a membrane electrode assembly, first catalyst ink containing catalyst carrying particle, polymer electrolyte and solvent coated on a base material to form a coating film, solvent in the coating film formed is removed to form a first electrode catalyst layer, electrolyte ink containing polymer electrolyte and solvent is coated on the first electrode catalyst layer to form a coating film, the solvent in the coating film formed is removed to form a polymer electrolyte film, second catalyst ink containing catalyst carrying particles, polymer electrolyte and solvent is coated on the polymer electrolyte film to form a coating film, the solvent in the coating film formed is removed to form a second electrode catalyst layer. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供薄膜电极组件，其制造方法和固体聚合物燃料电池，其制造短，第一和第二电极催化剂层的气体扩散特性和排水性能提高，离子传导率膜电极组件改善并且具有优异的发电特性，同时保持与阳极侧的第一电极催化剂层，阴极侧的第二电极催化剂层和聚合物电解质膜的粘附性。解决方案：在膜电极组件的制造方法中，含有催化剂载体的第一催化剂油墨，聚合物电解质和涂覆在基材上的溶剂形成涂膜，去除形成的涂膜中的溶剂，形成第一电极催化剂层，含有聚合物电解质的电解质油墨和溶剂涂覆在第一电极催化剂层上以形成涂膜，去除形成的涂膜中的溶剂以形成聚合物电解质膜，含有催化剂载体颗粒的第二催化剂油墨，聚合物电解质和溶剂涂覆在聚合物电解质膜上以形成涂膜，去除形成的涂膜中的溶剂以形成第二电极催化剂层。版权所有（C）2011，JPO＆INPIT

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