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1. 发明授权

US09490342B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09490342B2
公开(公告)日：2016-11-08
申请号：US13161591
申请日：2011-06-16
申请人： Chien-Ming Lai , Yi-Wen Chen , Zhi-Cheng Lee , Tong-Jyun Huang , Che-Hua Hsu , Kun-Hsien Lin , Tzung-Ying Lee , Chi-Mao Hsu , Hsin-Fu Huang , Chin-Fu Lin
发明人： Chien-Ming Lai , Yi-Wen Chen , Zhi-Cheng Lee , Tong-Jyun Huang , Che-Hua Hsu , Kun-Hsien Lin , Tzung-Ying Lee , Chi-Mao Hsu , Hsin-Fu Huang , Chin-Fu Lin
IPC分类号： H01L21/3205 , H01L29/66 , H01L21/8238 , H01L21/28 , H01L21/3213 , H01L29/423 , H01L29/49 , H01L29/51 , H01L29/78
CPC分类号： H01L29/6659 , H01L21/28088 , H01L21/32134 , H01L21/823842 , H01L29/42376 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/7833
摘要： A method for fabricating a semiconductor device includes the following steps. Firstly, a dummy gate structure having a dummy gate electrode layer is provided. Then, the dummy gate electrode layer is removed to form an opening in the dummy gate structure, thereby exposing an underlying layer beneath the dummy gate electrode layer. Then, an ammonium hydroxide treatment process is performed to treat the dummy gate structure. Afterwards, a metal material is filled into the opening.
摘要翻译：一种制造半导体器件的方法包括以下步骤。首先，提供具有伪栅极电极层的虚拟栅极结构。然后，去除虚拟栅极电极层，以在虚拟栅极结构中形成开口，从而暴露在伪栅极电极层下面的下面的层。然后，进行氢氧化铵处理处理以处理伪栅极结构。之后，将金属材料填充到开口中。

2. 发明授权

US08232152B2 Removing method of a hard mask 有权
标题翻译：去除硬掩模的方法
公开(公告)号：US08232152B2
公开(公告)日：2012-07-31
申请号：US12883233
申请日：2010-09-16
申请人： Che-Hua Hsu , Shao-Hua Hsu , Zhi-Cheng Lee , Cheng-Guo Chen , Shin-Chi Chen , Hung-Ling Shih , Hung-Yi Wu , Heng-Ching Huang
发明人： Che-Hua Hsu , Shao-Hua Hsu , Zhi-Cheng Lee , Cheng-Guo Chen , Shin-Chi Chen , Hung-Ling Shih , Hung-Yi Wu , Heng-Ching Huang
IPC分类号： H01L21/336
CPC分类号： H01L29/66545 , H01L21/823456 , H01L21/823468 , H01L29/6656
摘要： A removing method of a hard mask includes the following steps. A substrate is provided. At least two MOSFETs are formed on the substrate. An isolating structure is formed in the substrate and located between the at least two MOSFETs. Each of the MOSEFTs includes a gate insulating layer, a gate, a spacer and a hard mask on the gate. A protecting structure is formed on the isolating structure and the hard mask is exposed from the protecting structure. The exposed hard mask is removed to expose the gate.
摘要翻译：硬掩模的去除方法包括以下步骤。提供基板。在衬底上形成至少两个MOSFET。在衬底中形成隔离结构，并且位于至少两个MOSFET之间。 MOSEFT中的每一个在栅极上包括栅极绝缘层，栅极，间隔物和硬掩模。在隔离结构上形成保护结构，从保护结构露出硬掩模。暴露的硬掩模被移除以露出门。

3. 发明授权

US09384962B2 Oxygen treatment of replacement work-function metals in CMOS transistor gates 有权
标题翻译： CMOS晶体管栅极中替代工作功能金属的氧化处理
公开(公告)号：US09384962B2
公开(公告)日：2016-07-05
申请号：US13082387
申请日：2011-04-07
申请人： Guang-Yaw Hwang , Chun-Hsien Lin , Hung-Ling Shih , Jiunn-Hsiung Liao , Zhi-Cheng Lee , Shao-Hua Hsu , Yi-Wen Chen , Cheng-Guo Chen , Jung-Tsung Tseng , Chien-Ting Lin , Tong-Jyun Huang , Jie-Ning Yang , Tsung-Lung Tsai , Po-Jui Liao , Chien-Ming Lai , Ying-Tsung Chen , Cheng-Yu Ma , Wen-Han Hung , Che-Hua Hsu
发明人： Guang-Yaw Hwang , Chun-Hsien Lin , Hung-Ling Shih , Jiunn-Hsiung Liao , Zhi-Cheng Lee , Shao-Hua Hsu , Yi-Wen Chen , Cheng-Guo Chen , Jung-Tsung Tseng , Chien-Ting Lin , Tong-Jyun Huang , Jie-Ning Yang , Tsung-Lung Tsai , Po-Jui Liao , Chien-Ming Lai , Ying-Tsung Chen , Cheng-Yu Ma , Wen-Han Hung , Che-Hua Hsu
IPC分类号： H01L21/28 , H01L21/02
CPC分类号： H01L29/517 , H01L21/28088 , H01L21/823842 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L29/7843 , H01L29/7845 , H01L29/7846
摘要： A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O2 ambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.
摘要翻译：提供一种制造金属栅极的方法。该方法包括提供基板。然后，在基板上形成栅极电介质层。在栅极电介质层上形成具有功函数金属层的多层堆叠结构。在多层堆叠结构的至少一层上进行O2气氛处理。在多层堆叠结构上形成导电层。

4. 发明申请

US20120322218A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120322218A1
公开(公告)日：2012-12-20
申请号：US13161591
申请日：2011-06-16
申请人： Chien-Ming LAI , Yi-Wen Chen , Zhi-Cheng Lee , Tong-Jyun Huang , Che-Hua Hsu , Kun-Hsien Lin , Tzung-Ying Lee , Chi-Mao Hsu , Hsin-Fu Huang , Chin-Fu Lin
发明人： Chien-Ming LAI , Yi-Wen Chen , Zhi-Cheng Lee , Tong-Jyun Huang , Che-Hua Hsu , Kun-Hsien Lin , Tzung-Ying Lee , Chi-Mao Hsu , Hsin-Fu Huang , Chin-Fu Lin
IPC分类号： H01L21/336
CPC分类号： H01L29/6659 , H01L21/28088 , H01L21/32134 , H01L21/823842 , H01L29/42376 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/7833
摘要： A method for fabricating a semiconductor device includes the following steps. Firstly, a dummy gate structure having a dummy gate electrode layer is provided. Then, the dummy gate electrode layer is removed to form an opening in the dummy gate structure, thereby exposing an underlying layer beneath the dummy gate electrode layer. Then, an ammonium hydroxide treatment process is performed to treat the dummy gate structure. Afterwards, a metal material is filled into the opening.
摘要翻译：一种制造半导体器件的方法包括以下步骤。首先，提供具有伪栅极电极层的虚拟栅极结构。然后，去除虚拟栅极电极层，以在虚拟栅极结构中形成开口，从而暴露在伪栅极电极层下面的下面的层。然后，进行氢氧化铵处理处理以处理伪栅极结构。之后，将金属材料填充到开口中。

5. 发明申请

US20120142157A1 Method of fabricating a semiconductor structure 审中-公开
标题翻译：制造半导体结构的方法
公开(公告)号：US20120142157A1
公开(公告)日：2012-06-07
申请号：US12961518
申请日：2010-12-07
申请人： Cheng-Guo Chen , Zhi-Cheng Lee , Shao-Hua Hsu , Jung-Tsung Tseng , Chien-Ting Lin , Cheng-Hsien Chou
发明人： Cheng-Guo Chen , Zhi-Cheng Lee , Shao-Hua Hsu , Jung-Tsung Tseng , Chien-Ting Lin , Cheng-Hsien Chou
IPC分类号： H01L21/336 , H01L21/302
CPC分类号： H01L21/31053 , H01L29/66545
摘要： The method of fabricating a semiconductor structure according to the present invention includes planarizing an inter-layer dielectric layer and further a hard mask to remove a portion of hard mask in a thickness direction. The remaining hard mask has a thickness less than the original thickness of the hard mask. The remaining hard mask and the dummy gate are removed to form a recess. After a gate material is filled into the recess, a gate with a relatively accurate height can be obtained.
摘要翻译：根据本发明的制造半导体结构的方法包括平面化层间电介质层和硬掩模以在厚度方向上去除一部分硬掩模。剩余的硬掩模的厚度小于硬掩模的原始厚度。剩余的硬掩模和伪栅被去除以形成凹部。在栅极材料填充到凹部中之后，可以获得具有相对精确的高度的栅极。

6. 发明授权

US08003461B1 Method of fabricating efuse structure, resistor sturcture and transistor sturcture 有权
标题翻译：制造efuse结构，电阻结构和晶体管结构的方法
公开(公告)号：US08003461B1
公开(公告)日：2011-08-23
申请号：US12700707
申请日：2010-02-04
申请人： Che-Hua Hsu , Zhi-Cheng Lee , Cheng-Guo Chen , Shao-Hua Hsu
发明人： Che-Hua Hsu , Zhi-Cheng Lee , Cheng-Guo Chen , Shao-Hua Hsu
IPC分类号： H01L21/8242
CPC分类号： H01L21/02 , H01L21/8234
摘要： A method of fabricating an efuse structure, a resistor structure and a transistor structure. First, a work function metal layer, a polysilicon layer and a first hard mask layer are formed to cover a transistor region, a resistor region and an e-fuse region on a substrate. Then, the work function metal layer on the resistor region and the efuse region is removed by using a first photomask. Later, a gate, a resistor, an efuse are formed in the transistor region, the resistor region and the efuse region respectively. After that, a dielectric layer aligning with the top surface of the gate is formed. Later, the polysilicon layer in the gate is removed by taking a second hard mask as a mask to form a recess. Finally, a metal layer fills up the recess.
摘要翻译：一种制造efuse结构，电阻器结构和晶体管结构的方法。首先，形成工作功能金属层，多晶硅层和第一硬掩模层，以覆盖基板上的晶体管区域，电阻区域和e熔丝区域。然后，通过使用第一光掩模去除电阻器区域和efuse区域上的功函数金属层。之后，在晶体管区域，电阻区域和efuse区域分别形成栅极，电阻器，efuse。之后，形成与栅极顶表面对准的电介质层。之后，通过取第二硬掩模作为掩模来除去栅极中的多晶硅层以形成凹陷。最后，金属层填满凹槽。

7. 发明申请

US20110189827A1 METHOD OF FABRICATING EFUSE STRUCTURE, RESISTOR STURCTURE AND TRANSISTOR STURCTURE 有权
标题翻译：制作EFUSE结构，电阻器和晶体管的方法
公开(公告)号：US20110189827A1
公开(公告)日：2011-08-04
申请号：US12700707
申请日：2010-02-04
申请人： Che-Hua Hsu , Zhi-Cheng Lee , Cheng-Guo Chen , Shao-Hua Hsu
发明人： Che-Hua Hsu , Zhi-Cheng Lee , Cheng-Guo Chen , Shao-Hua Hsu
IPC分类号： H01L21/8234 , H01L21/02
CPC分类号： H01L21/02 , H01L21/8234
摘要： A method of fabricating an efuse structure, a resistor structure and a transistor structure. First, a work function metal layer, a polysilicon layer and a first hard mask layer are formed to cover a transistor region, a resistor region and an e-fuse region on a substrate. Then, the work function metal layer on the resistor region and the efuse region is removed by using a first photomask. Later, a gate, a resistor, an efuse are formed in the transistor region, the resistor region and the efuse region respectively. After that, a dielectric layer aligning with the top surface of the gate is formed. Later, the polysilicon layer in the gate is removed by taking a second hard mask as a mask to form a recess. Finally, a metal layer fills up the recess.
摘要翻译：一种制造efuse结构，电阻器结构和晶体管结构的方法。首先，形成工作功能金属层，多晶硅层和第一硬掩模层，以覆盖基板上的晶体管区域，电阻区域和e熔丝区域。然后，通过使用第一光掩模去除电阻器区域和efuse区域上的功函数金属层。之后，在晶体管区域，电阻区域和efuse区域分别形成栅极，电阻器，efuse。之后，形成与栅极顶表面对准的电介质层。之后，通过取第二硬掩模作为掩模来除去栅极中的多晶硅层以形成凹陷。最后，金属层填满凹槽。

8. 发明申请

US20120309185A1 METHOD OF FORMING METAL GATE STRUCTURE 有权
标题翻译：形成金属结构的方法
公开(公告)号：US20120309185A1
公开(公告)日：2012-12-06
申请号：US13586874
申请日：2012-08-16
申请人： Che-Hua HSU , Shao-Hua HSU , Zhi-Cheng LEE , Cheng-Guo CHEN
发明人： Che-Hua HSU , Shao-Hua HSU , Zhi-Cheng LEE , Cheng-Guo CHEN
IPC分类号： H01L21/28
CPC分类号： H01L21/823807 , H01L21/31138 , H01L21/32139 , H01L21/823814 , H01L21/823835 , H01L29/165 , H01L29/4966 , H01L29/517 , H01L29/665 , H01L29/6653 , H01L29/66545 , H01L29/6659 , H01L29/66636 , H01L29/7833 , H01L29/7834
摘要： A method of forming metal gate structure includes providing a substrate; forming a gate dielectric layer, a material layer and a polysilicon layer stacked on the substrate; forming a first mask layer, a second mask layer and a patterned photoresist on the polysilicon layer; removing portions of the second mask layer and the first mask layer to form a hard mask by utilizing the patterned photoresist as an etching mask; removing the patterned photoresist, and next utilizing the hard mask as an etching mask to remove parts of the polysilicon layer and parts of the material layer. Thus, a gate stack is formed. Since the patterned photoresist is removed before forming the gate stack, the gate stack is protected from damages of the photoresist-removing process. The photoresist-removing process does not attack the sidewalls of the gate stack, so a bird's beak effect of the gate dielectric layer is prevent.
摘要翻译：一种形成金属栅极结构的方法包括提供衬底; 形成层叠在基板上的栅介质层，材料层和多晶硅层; 在所述多晶硅层上形成第一掩模层，第二掩模层和图案化光刻胶; 通过利用图案化的光致抗蚀剂作为蚀刻掩模去除第二掩模层和第一掩模层的部分以形成硬掩模; 去除图案化的光致抗蚀剂，接着利用硬掩模作为蚀刻掩模去除部分多晶硅层和材料层的部分。因此，形成栅堆叠。由于在形成栅极叠层之前去除图案化的光致抗蚀剂，所以保护栅极堆叠免受光致抗蚀剂去除工艺的损害。光致抗蚀剂去除工艺不会侵蚀栅极堆叠的侧壁，因此防止栅极电介质层的鸟喙效应。

9. 发明申请

US20120256276A1 Metal Gate and Fabricating Method Thereof 有权
标题翻译：金属门及其制造方法
公开(公告)号：US20120256276A1
公开(公告)日：2012-10-11
申请号：US13082387
申请日：2011-04-07
申请人： Guang-Yaw Hwang , Chun-Hsien Lin , Hung-Ling Shih , Jiunn-Hsiung Liao , Zhi-Cheng Lee , Shao-Hua Hsu , Yi-Wen Chen , Cheng-Guo Chen , Jung-Tsung Tseng , Chien-Ting Lin , Tong-Jyun Huang , Jie-Ning Yang , Tsung-Lung Tsai , Po-Jui Liao , Chien-Ming Lai , Ying-Tsung Chen , Cheng-Yu Ma , Wen-Han Hung , Che-Hua Hsu
发明人： Guang-Yaw Hwang , Chun-Hsien Lin , Hung-Ling Shih , Jiunn-Hsiung Liao , Zhi-Cheng Lee , Shao-Hua Hsu , Yi-Wen Chen , Cheng-Guo Chen , Jung-Tsung Tseng , Chien-Ting Lin , Tong-Jyun Huang , Jie-Ning Yang , Tsung-Lung Tsai , Po-Jui Liao , Chien-Ming Lai , Ying-Tsung Chen , Cheng-Yu Ma , Wen-Han Hung , Che-Hua Hsu
IPC分类号： H01L29/78 , H01L21/3205
CPC分类号： H01L29/517 , H01L21/28088 , H01L21/823842 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L29/7843 , H01L29/7845 , H01L29/7846
摘要： A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O2 ambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.
摘要翻译：提供一种制造金属栅极的方法。该方法包括提供基板。然后，在基板上形成栅极电介质层。在栅极电介质层上形成具有功函数金属层的多层堆叠结构。在多层堆叠结构的至少一层上进行O2气氛处理。在多层堆叠结构上形成导电层。

10. 发明申请

US20120244669A1 Method of Manufacturing Semiconductor Device Having Metal Gates 有权
标题翻译：制造具有金属门的半导体器件的方法
公开(公告)号：US20120244669A1
公开(公告)日：2012-09-27
申请号：US13053223
申请日：2011-03-22
申请人： Po-Jui Liao , Tsung-Lung Tsai , Chien-Ting Lin , Shao-Hua Hsu , Yi-Wei Chen , Hsin-Fu Huang , Tzung-Ying Lee , Min-Chuan Tsai , Chan-Lon Yang , Chun-Yuan Wu , Teng-Chun Tsai , Guang-Yaw Hwang , Chia-Lin Hsu , Jie-Ning Yang , Cheng-Guo Chen , Jung-Tsung Tseng , Zhi-Cheng Lee , Hung-Ling Shih , Po-Cheng Huang , Yi-Wen Chen , Che-Hua Hsu
发明人： Po-Jui Liao , Tsung-Lung Tsai , Chien-Ting Lin , Shao-Hua Hsu , Yi-Wei Chen , Hsin-Fu Huang , Tzung-Ying Lee , Min-Chuan Tsai , Chan-Lon Yang , Chun-Yuan Wu , Teng-Chun Tsai , Guang-Yaw Hwang , Chia-Lin Hsu , Jie-Ning Yang , Cheng-Guo Chen , Jung-Tsung Tseng , Zhi-Cheng Lee , Hung-Ling Shih , Po-Cheng Huang , Yi-Wen Chen , Che-Hua Hsu
IPC分类号： H01L21/8238
CPC分类号： H01L21/823842 , H01L21/823807 , H01L29/66545 , H01L29/6656 , H01L29/7833
摘要： The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.
摘要翻译：本发明提供一种制造具有金属栅极的半导体器件的方法。首先，提供基板。具有第一牺牲栅极的第一导电型晶体管和具有第二牺牲栅极的第二导电型晶体管设置在衬底上。去除第一牺牲栅极以形成第一沟槽。然后，在第一沟槽中形成第一金属层。去除第二牺牲栅极以形成第二沟槽。接下来，在第一沟槽和第二沟槽中形成第二金属层。最后，在第二金属层上形成第三金属层，其中第三金属层被填充到第一沟槽和第二沟槽中。

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