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1. 发明授权

US08866949B2 Optical element module and manufacturing method thereof, electronic element module and manufacturing method thereof, and electronic information device 有权
标题翻译：光元件模块及其制造方法，电子元件模块及其制造方法以及电子信息装置
公开(公告)号：US08866949B2
公开(公告)日：2014-10-21
申请号：US12805959
申请日：2010-08-26
申请人： Yuji Yano , Hideyuki Kurimoto
发明人： Yuji Yano , Hideyuki Kurimoto
IPC分类号： G02B13/16 , B32B37/12 , G02B7/02 , G02B13/00 , G02B27/00 , B32B38/00
CPC分类号： B32B37/12 , B32B38/0004 , B32B2310/0831 , B32B2457/00 , B32B2457/08 , G02B7/021 , G02B7/022 , G02B13/0085 , G02B27/0018 , Y10T29/49002 , Y10T29/49826 , Y10T156/1052
摘要： An optical element module according to the present invention is provided, in which: a plurality of optical elements are housed within a light shielding holder; a metal light shielding plate is interposed at least between respective planarized surfaces of a spacer section of an upper optical element and a spacer section of a lower optical element; the light shielding plate includes an opening formed at a position corresponding to an optical surface of the optical element; and the light shielding plate includes a cut section, which is formed by cutting a part of a peripheral edge of the light shielding plate.
摘要翻译：本发明提供一种光学元件模块，其中：多个光学元件容纳在遮光保持器内; 金属遮光板至少插入上光学元件的间隔部分和下光学元件的间隔部分的相应的平坦表面之间; 遮光板包括形成在与光学元件的光学表面对应的位置处的开口; 遮光板包括通过切割遮光板的周缘的一部分而形成的切割部。

2. 发明授权

US08410827B2 Transmitter, interface device, and car mounted communication system 有权
标题翻译：发射机，接口设备和车载通信系统
公开(公告)号：US08410827B2
公开(公告)日：2013-04-02
申请号：US13113235
申请日：2011-05-23
申请人： Yuji Yano
发明人： Yuji Yano
IPC分类号： H03K3/00
CPC分类号： H03K19/00361
摘要： A transmitter includes a capacitor from one end of which a charge voltage is derived; a first constant current source to generate a charge current for the capacitor; a second constant current source to generate a discharge current for the capacitor; a charge/discharge controller to perform charge/discharge control of the capacitor based on a logic level of a transmission input signal and a comparison result between the charge voltage and a reference voltage; an output stage to generate the transmission output signal, wherein a slew rate of which is set in response to the charge voltage, and wherein an amplitude of the transmission output signal is set in response to an output side power source voltage; a reference voltage generator to fluctuate the reference voltage depend on the output side power source voltage; and a constant current controller to fluctuate a current value of the charge current and the discharge current depend on the reference voltage.
摘要翻译：发射机包括从其一端导出充电电压的电容器; 产生电容器的充电电流的第一恒流源; 用于产生电容器的放电电流的第二恒流源; 充电/放电控制器，用于基于发送输入信号的逻辑电平和充电电压与参考电压之间的比较结果来执行电容器的充电/放电控制; 产生发送输出信号的输出级，其中，根据所述充电电压设定其转换速率，并且响应于所述输出侧电源电压而设定所述发送输出信号的振幅; 参考电压发生器使参考电压波动取决于输出侧电源电压; 以及恒定电流控制器，用于使充电电流的当前值波动，并且放电电流取决于参考电压。

3. 发明申请

US20130039134A1 SEMICONDUCTOR DEVICE INCLUDING MEMORY CAPABLE OF REDUCING POWER CONSUMPTION 有权
标题翻译：半导体器件，包括可减少功耗的存储器
公开(公告)号：US20130039134A1
公开(公告)日：2013-02-14
申请号：US13566779
申请日：2012-08-03
申请人： Hisashi Iwamoto , Yuji Yano , Kazunari Inoue
发明人： Hisashi Iwamoto , Yuji Yano , Kazunari Inoue
IPC分类号： G11C7/22
CPC分类号： G11C7/1069 , G11C7/1006 , G11C7/1096 , G11C7/222
摘要： A semiconductor device includes a plurality of memory arrays and a plurality of memory array control circuits. Each of the plurality of memory array control circuits includes a read/write control circuit for controlling a read/write operation for the memory array, and a selection circuit for selecting and activating the memory array based on a clock signal and an output signal from the read/write control circuit.
摘要翻译：半导体器件包括多个存储器阵列和多个存储器阵列控制电路。多个存储器阵列控制电路中的每一个包括用于控制存储器阵列的读/写操作的读/写控制电路，以及用于基于时钟信号和来自该存储器阵列控制电路的输出信号选择和激活存储器阵列的选择电路读/写控制电路。

4. 发明申请

US20080237898A1 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, HEAT SINK, SEMICONDUCTOR CHIP, INTERPOSER SUBSTRATE, AND GLASS PLATE 审中-公开
标题翻译：半导体器件，其制造方法，散热器，半导体芯片，插入器基板和玻璃板
公开(公告)号：US20080237898A1
公开(公告)日：2008-10-02
申请号：US12049728
申请日：2008-03-17
申请人： Yuji YANO , Yasuki Fukui , Koji Miyata
发明人： Yuji YANO , Yasuki Fukui , Koji Miyata
IPC分类号： H01L23/34 , H01L21/56
CPC分类号： H01L21/565 , H01L23/3128 , H01L23/4334 , H01L23/562 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/32245 , H01L2224/45139 , H01L2224/48227 , H01L2224/48247 , H01L2224/73265 , H01L2224/8592 , H01L2924/00014 , H01L2924/15311 , H01L2924/16152 , H01L2924/181 , H01L2924/1815 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要： A semiconductor device of the present invention includes: a laminate structure, including a semiconductor chip, partially sealed with a resin; and a stress relief section for relieving a stress during resin sealing, provided as a convex section including a plain top surface on an uppermost section of the laminate structure, the stress relief section being provided in an annular shape on a peripheral region of the uppermost section so as to come into contact with the sealing resin. This makes it possible to improve the manufacturing yield of the semiconductor device in which the member of the uppermost section is exposed.
摘要翻译：本发明的半导体器件包括：层叠结构，包括半导体芯片，部分地用树脂密封; 以及用于在树脂密封期间缓解应力的应力释放部分，其被设置为在所述层叠结构的最上部分上具有平坦顶面的凸部，所述应力消除部设置在所述最上部的周边区域上的环状以与密封树脂接触。由此，能够提高最上部的部件露出的半导体装置的制造成品率。

5. 发明授权

US07276437B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07276437B2
公开(公告)日：2007-10-02
申请号：US11028861
申请日：2005-01-05
申请人： Yuji Yano , Atsuya Narai
发明人： Yuji Yano , Atsuya Narai
IPC分类号： H01L21/44
CPC分类号： H01L24/85 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L25/0657 , H01L25/50 , H01L2224/05553 , H01L2224/05644 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4809 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/48464 , H01L2224/48465 , H01L2224/48471 , H01L2224/48475 , H01L2224/48479 , H01L2224/48499 , H01L2224/48599 , H01L2224/49052 , H01L2224/4911 , H01L2224/4942 , H01L2224/49425 , H01L2224/49429 , H01L2224/4945 , H01L2224/73265 , H01L2224/78301 , H01L2224/85051 , H01L2224/85181 , H01L2224/85186 , H01L2224/85191 , H01L2224/85203 , H01L2224/85951 , H01L2225/06506 , H01L2225/0651 , H01L2225/06555 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01057 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/15311 , H01L2924/30105 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/4554
摘要： In a manufacturing method of a semiconductor device, a substrate and a plurality of semiconductor chips stacked on the substrate are connected to each other by a ball bonding method adopting a reverse method. Specifically, after first bonding on a bonding pad on the substrate, a gold wire is led to a bonding pad of a semiconductor chip of the bottom layer, and by second bonding, a wire for connecting the substrate and the semiconductor chip of the bottom layer is formed. Similarly, other semiconductor chips are also connected to the substrate from the layer on the bottom. As a result, it is possible to reduce the package size, to provide a sufficient clearance between wires, and to reduce restrictions on combinations of semiconductor chips to be stacked.
摘要翻译：在半导体器件的制造方法中，通过采用逆方法的球焊方法，将堆叠在基板上的基板和多个半导体芯片彼此连接。具体地说，在基板上的接合焊盘上首次接合之后，将金线导入底层的半导体芯片的接合焊盘，通过第二接合，将基板与底层的半导体芯片连接形成了。类似地，其它半导体芯片也从底部的层连接到基板。结果，可以减小封装尺寸，以提供电线之间的足够的间隙，并且减少对要堆叠的半导体芯片的组合的限制。

6. 发明申请

US20060151206A1 Semiconductor device and manufacturing method therefor 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060151206A1
公开(公告)日：2006-07-13
申请号：US11324635
申请日：2006-01-04
申请人： Tomoyo Maruyama , Yuji Yano
发明人： Tomoyo Maruyama , Yuji Yano
IPC分类号： H05K1/16
CPC分类号： H01L24/97 , H01L23/49833 , H01L24/73 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/15311 , H01L2924/15331 , H05K1/144 , H01L2224/85 , H01L2224/83 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor device of the present invention includes a semiconductor elements on a circuit board of the semiconductor device, interposing an adhesive material between the semiconductor element and the circuit board. Further, a connection use circuit board including an external terminal connecting portion is mounted on an upper surface of the semiconductor element, interposing an adhesive material between the connection use circuit board and the semiconductor element, and a lower surface of the connection use circuit board and the upper surface of the circuit board are connected with each other via an electrically conductive terminal. A space between the circuit board and the connection use circuit board is sealed with sealing resin. With this configuration, it is possible to realize a small and thin semiconductor device which allows for (i) less restricted arrangement of an external connection terminal, which connects the semiconductor device with a semiconductor device or an electronic component laminated on an upper stage, and (ii) an improvement in a packaging density, and which is excellent in a heat radiation characteristic.
摘要翻译：本发明的半导体器件包括在半导体器件的电路板上的半导体元件，在半导体元件和电路板之间插入粘接材料。此外，包括外部端子连接部分的连接用电路板安装在半导体元件的上表面上，在连接用电路板和半导体元件之间插入粘合剂材料，连接用电路板的下表面和电路板的上表面通过导电端子相互连接。电路板和连接用电路板之间的空间用密封树脂密封。利用这种结构，可以实现一种小而薄的半导体器件，其允许（i）将半导体器件与半导体器件或层叠在上层上的电子部件连接的外部连接端子的布置较少，以及（ii）包装密度的改善，并且具有优异的散热特性。

7. 发明申请

US20050148175A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050148175A1
公开(公告)日：2005-07-07
申请号：US11028861
申请日：2005-01-05
申请人： Yuji Yano , Atsuya Narai
发明人： Yuji Yano , Atsuya Narai
IPC分类号： H01L25/18 , H01L21/60 , H01L25/00 , H01L25/04 , H01L25/065 , H01L25/07 , H01L23/495 , H01L21/44 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/85 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L25/0657 , H01L25/50 , H01L2224/05553 , H01L2224/05644 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4809 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/48464 , H01L2224/48465 , H01L2224/48471 , H01L2224/48475 , H01L2224/48479 , H01L2224/48499 , H01L2224/48599 , H01L2224/49052 , H01L2224/4911 , H01L2224/4942 , H01L2224/49425 , H01L2224/49429 , H01L2224/4945 , H01L2224/73265 , H01L2224/78301 , H01L2224/85051 , H01L2224/85181 , H01L2224/85186 , H01L2224/85191 , H01L2224/85203 , H01L2224/85951 , H01L2225/06506 , H01L2225/0651 , H01L2225/06555 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01057 , H01L2924/01079 , H01L2924/014 , H01L2924/12041 , H01L2924/15311 , H01L2924/30105 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/4554
摘要： In a manufacturing method of a semiconductor device, a substrate and a plurality of semiconductor chips stacked on the substrate are connected to each other by a ball bonding method adopting a reverse method. Specifically, after first bonding on a bonding pad on the substrate, a gold wire is led to a bonding pad of a semiconductor chip of the bottom layer, and by second bonding, a wire for connecting the substrate and the semiconductor chip of the bottom layer is formed. Similarly, other semiconductor chips are also connected to the substrate from the layer on the bottom. As a result, it is possible to reduce the package size, to provide a sufficient clearance between wires, and to reduce restrictions on combinations of semiconductor chips to be stacked.
摘要翻译：在半导体器件的制造方法中，通过采用逆方法的球焊方法，将堆叠在基板上的基板和多个半导体芯片彼此连接。具体地说，在基板上的接合焊盘上首次接合之后，将金线导入底层的半导体芯片的接合焊盘，通过第二接合，将基板与底层的半导体芯片连接形成了。类似地，其它半导体芯片也从底部的层连接到基板。结果，可以减小封装尺寸，以提供电线之间的足够的间隙，并且减少对要堆叠的半导体芯片的组合的限制。

8. 发明授权

US06731013B2 Wiring substrate, semiconductor device and package stack semiconductor device 有权
标题翻译：接线基板，半导体器件和封装堆叠半导体器件
公开(公告)号：US06731013B2
公开(公告)日：2004-05-04
申请号：US09873338
申请日：2001-06-05
申请人： Hiroyuki Juso , Yasuki Fukui , Yuji Yano , Seiji Ishihara
发明人： Hiroyuki Juso , Yasuki Fukui , Yuji Yano , Seiji Ishihara
IPC分类号： H01L2348
CPC分类号： H01L24/97 , H01L23/3128 , H01L23/49816 , H01L23/49838 , H01L24/45 , H01L24/48 , H01L25/105 , H01L25/16 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48137 , H01L2224/48225 , H01L2224/48227 , H01L2224/73265 , H01L2224/85001 , H01L2224/97 , H01L2225/06551 , H01L2225/06568 , H01L2225/1011 , H01L2225/1052 , H01L2225/1094 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2924/18165 , H01L2924/30105 , H01L2924/3025 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A wiring substrate of the present invention includes a terminal section, provided on a first surface of an insulating substrate, for wire or flip-chip bondings; a land section, provided on the insulating substrate, for an external connection terminal; wiring patterns, respectively provided on the first surface and a second surface on the other side of the first surface, for making electrical connection between the terminal section and the land section; and a support pattern, provided on the second surface corresponding in position to the terminal section, for improving bondings. The wiring substrate can relieve connection failure in bondings.
摘要翻译：本发明的布线基板包括设置在绝缘基板的第一表面上用于导线或倒装芯片连接的端子部分; 设置在所述绝缘基板上的用于外部连接端子的接地部; 分别设置在第一表面的第一表面和第一表面的另一侧的第二表面上，用于在端子部分和接地部分之间进行电连接; 以及设置在与端子部分相对应的第二表面上的用于改善粘合的支撑图案。接线基板可以缓解接合中的连接故障。

9. 发明授权

US08649111B2 Optical element, optical element module, electronic element module, and electronic information device 有权
标题翻译：光学元件，光学元件模块，电子元件模块和电子信息设备
公开(公告)号：US08649111B2
公开(公告)日：2014-02-11
申请号：US13416667
申请日：2012-03-09
申请人： Yuji Yano , Hideyuki Kurimoto , Shohgo Hirooka
发明人： Yuji Yano , Hideyuki Kurimoto , Shohgo Hirooka
IPC分类号： G02B13/20
CPC分类号： G02B13/0085 , G02B27/0018 , H04N5/2254 , H04N5/2257
摘要： The present invention provides an optical element, comprising: a side surface where incident light undergoes diffuse reflection inside the optical element, between the outline of a top optical surface and a bottom optical surface; and an inclined surface for total reflection of diffuse reflection from the side surface, formed at least between the side surface and the bottom optical surface.
摘要翻译：本发明提供一种光学元件，包括：入射光在光学元件内部在顶部光学表面的轮廓和底部光学表面之间经受漫反射的侧表面; 以及至少在侧表面和底部光学表面之间形成的用于从侧表面进行漫反射的全反射的倾斜表面。

10. 发明授权

US08405756B2 Optical element, optical element wafer, optical element wafer module, optical element module, method for manufacturing optical element module, electronic element wafer module, method for manufacturing electronic element module, electronic element module and electronic information device 有权
标题翻译：光学元件，光学元件晶片，光学元件晶片模块，光学元件模块，光学元件模块的制造方法，电子元件晶片模块，电子元件模块的制造方法，电子元件模块和电子信息装置
公开(公告)号：US08405756B2
公开(公告)日：2013-03-26
申请号：US12565444
申请日：2009-09-23
申请人： Yuji Yano , Norimichi Shigemitsu , Kengo Iwai
发明人： Yuji Yano , Norimichi Shigemitsu , Kengo Iwai
IPC分类号： H04N5/225
CPC分类号： B26D3/08 , B32B2310/0843 , B32B2457/14 , G02B7/021 , G02B13/003 , H04N5/2254 , H04N5/2257 , Y10T83/0341 , Y10T156/1075
摘要： An optical element according to the present invention includes: an optical surface at a center portion thereof; a spacer section having a predetermined thickness on an outer circumference side of the optical surface; a support plate including one or a plurality of through holes penetrating a portion corresponding to the optical surface, provided inside a transparent resin material, wherein the support plate has light shielding characteristics, an outer circumference portion side of the through hole of the support plate is provided inside the spacer section, and the outer circumference portion side of the through hole is configured to be thicker than a further outer circumference portion side thereof.
摘要翻译：根据本发明的光学元件包括：在其中心部分处的光学表面; 在所述光学表面的外周侧具有预定厚度的间隔部分; 在透明树脂材料的内侧设置有贯通贯穿与光学面对应的部分的一个或多个通孔的支撑板，其中，所述支撑板具有遮光特性，所述支撑板的通孔的外周部侧为设置在所述间隔部的内部，所述贯通孔的外周部侧被配置为比其另外的外周侧更厚。

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