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1. 发明授权

US08149065B1 Low KVCO phase-locked loop with large frequency drift handling capability 有权
标题翻译：低KVCO锁相环，具有较大的频率漂移处理能力
公开(公告)号：US08149065B1
公开(公告)日：2012-04-03
申请号：US13088645
申请日：2011-04-18
申请人： Randy Tsang , Yu-chi Lee , David Cousinard
发明人： Randy Tsang , Yu-chi Lee , David Cousinard
IPC分类号： H03L7/085
CPC分类号： H03L7/099 , H03L1/02 , H03L7/18
摘要： A phase-locked loop that supports a large frequency drift capability, yet maintains a low Kvco, and does not introduce noise or discontinuities in the frequency of the generated phase-locked loop output signal. The phase-locked loop may include a VCO with an LC tank circuit, the capacitance of which may be adjusted in incremental units. By gradually adjusting a control signal applied to a selected VCO LC tank circuit frequency adjustment control line, e.g., in a continuous ramped function, or time-averaged ramped function, from LOW-to-HIGH or from HIGH-to-LOW, over a period of time that is greater than the response time of the phase-locked loop, a frequency range supported by the VCO may be shifted to either a higher frequency range or a lower frequency range, as needed, to accommodate environmentally induced frequency drift in the VCO, without introducing noise or discontinuities in the frequency of the generated phase-locked loop output signal.
摘要翻译：一个锁相环，支持大的频率漂移能力，但维持低的Kvco，并且不会在产生的锁相环输出信号的频率中引入噪声或不连续性。锁相环可以包括具有LC槽电路的VCO，其电容可以以增量单位调节。通过逐渐调整施加到所选择的VCO LC电路频率调节控制线的控制信号，例如，以连续斜坡功能或时间平均斜坡函数，从低到高或从高到低，通过时间段大于锁相环的响应时间，由VCO支持的频率范围可以根据需要转换到更高的频率范围或更低的频率范围，以适应环境中的频率漂移 VCO，不会在产生的锁相环输出信号的频率中引入噪声或不连续性。

2. 发明授权

US06879369B2 Structure of LCD manufactured by one-drop fill technology including a substrate with transparent conductive patterns 有权
标题翻译：通过一滴填充技术制造的LCD结构，包括具有透明导电图案的基板
公开(公告)号：US06879369B2
公开(公告)日：2005-04-12
申请号：US10389795
申请日：2003-03-18
申请人： Yu-Chi Lee , Po-Hsiu Shih
发明人： Yu-Chi Lee , Po-Hsiu Shih
IPC分类号： G02F1/1339 , G02F1/1341 , G02F1/13
CPC分类号： G02F1/1339 , G02F1/1341 , G02F2202/023 , G02F2202/025
摘要： A structure of liquid crystal display and manufacture method thereof are described. The liquid crystal display is manufactured by a one drop fill process. The display comprises a first substrate, a second substrate, a conductive pattern layer, a black matrix layer, a liquid crystal layer and an ultraviolet-type seal. The metal pattern layer is made of indium tin oxide and formed on the first substrate. Therefore, the metal pattern layer is a transparent layer allowing the ultraviolet light to pass through. The ultraviolet-type seal is pre-cured by the ultraviolet light from the first substrate direction to the seal, and then cured by a heating process. Hence, the liquid crystal pollution problem is reduced.
摘要翻译：对液晶显示及其制造方法的结构进行说明。液晶显示器通过一滴填充工艺制造。显示器包括第一基板，第二基板，导电图案层，黑矩阵层，液晶层和紫外线密封。金属图案层由氧化铟锡制成并形成在第一基板上。因此，金属图案层是允许紫外光通过的透明层。紫外线密封件通过从第一基板方向到密封件的紫外线预固化，然后通过加热工艺固化。因此，液晶污染问题减少。

3. 发明授权

US06870591B2 Liquid crystal display with separating wall 有权
标题翻译：液晶显示屏带分隔壁
公开(公告)号：US06870591B2
公开(公告)日：2005-03-22
申请号：US10347957
申请日：2003-01-21
申请人： Yu-Chi Lee , Po-Hsiu Shih
发明人： Yu-Chi Lee , Po-Hsiu Shih
IPC分类号： G02F1/1339 , G02F1/1341
CPC分类号： G02F1/1341 , G02F1/1339 , G02F2001/13415
摘要： A liquid crystal display with separating wall is described. The liquid crystal display is manufactured by a one drop fill process. The display comprises a first substrate, a second substrate, a liquid crystal layer and a seal. The separating wall is formed on the first substrate and around a periphery of the first substrate in a non-display area to block efficiently the liquid crystal from spilling out. The height of the separating wall is close to a cell gap, and therefore the separating wall can utilize a technology of spacer on color filter to produce and adjust height thereof. Hence, the quality of liquid crystal displays can be improved and manufacture cost can be reduced.
摘要翻译：描述了具有分隔壁的液晶显示器。液晶显示器通过一滴填充工艺制造。显示器包括第一基板，第二基板，液晶层和密封件。分隔壁形成在第一基板上并且在非显示区域中围绕第一基板的周边，以有效地阻止液晶溢出。分隔壁的高度接近单元间隙，因此分隔壁可以利用滤色器上的间隔物技术来产生和调节其高度。因此，可以提高液晶显示器的质量，并且可以降低制造成本。

4. 发明授权

US06556268B1 Method for forming compact LCD packages and devices formed in which first bonding PCB to LCD panel and second bonding driver chip to PCB 有权
标题翻译：用于形成紧凑型LCD封装和器件的方法，其中将PCB粘合到LCD面板和将第二粘合驱动器芯片粘合到PCB
公开(公告)号：US06556268B1
公开(公告)日：2003-04-29
申请号：US09282689
申请日：1999-03-31
申请人： Yu-Chi Lee , Chin-Chen Yang , Hong-Yu Lin , Fang-I Shieh
发明人： Yu-Chi Lee , Chin-Chen Yang , Hong-Yu Lin , Fang-I Shieh
IPC分类号： G02F11345
CPC分类号： G02F1/13452 , H05K1/189 , H05K3/361
摘要： A method for forming a compact LCD package and devices formed by such method are disclosed. In the method, an LCD display panel is formed by bonding an upper glass panel and a lower glass panel together and exposing an edge portion formed by a larger lower glass panel. Conductive traces formed of a conductive film layer such as ITO is provided on the edge portion of the LCD display panel for providing electrical connection to the drive lines and scan lines for the LCD panel. A two-step bonding method is used to first bond a printed circuit board in a pre-bonding step to the exposed edge portion of the LCD panel by using an anisotropic conductive film layer. The bonding is conducted under pressure and heat such that electrical communication is established through the conductive metal particles contained in the anisotropic conductive film. In a second, or post-bonding step, an IC chip or a driver chip is bonded to the top of the PCB by a multiplicity of solder bumps formed on the driver chip connecting electrically to a second multiplicity of conductive pads formed on top of the PCB substrate. The present invention novel method therefore produces a more compact LCD package which saves a planar area in an edge portion by at least 50%. In the first pre-bonding method that utilizes an anisotropic conductive film, fabrication equipment for an outer lead bonding method can be utilized. In the post-bonding step, fabrication equipment for an inner lead bonding method can be used.
摘要翻译：公开了一种用于形成紧凑型LCD封装的方法和通过这种方法形成的器件。在该方法中，通过将上玻璃面板和下玻璃面板结合在一起并露出由较大的下玻璃面板形成的边缘部分而形成LCD显示面板。在LCD显示面板的边缘部分设置由诸如ITO的导电膜层形成的导电迹线，用于提供与LCD面板的驱动线和扫描线的电连接。使用两步接合方法通过使用各向异性导电膜层将预粘合步骤中的印刷电路板首先结合到LCD面板的暴露边缘部分。在压力和热量下进行接合，使得通过各向异性导电膜中所含的导电金属颗粒建立电连通。在第二或后贴合步骤中，IC芯片或驱动器芯片通过形成在驱动器芯片上的多个焊料凸块接合到PCB的顶部，该焊料凸块电连接到形成在第二多个导电焊盘上的第二多个导电焊盘 PCB基板。因此，本发明的新方法产生更紧凑的LCD封装，其将边缘部分中的平面区域保持至少50％。在利用各向异性导电膜的第一预接合方法中，可以利用外引线接合方法的制造设备。在后贴合步骤中，可以使用内引线接合方法的制造设备。

5. 发明授权

US06365500B1 Composite bump bonding 失效
标题翻译：复合凸块焊接
公开(公告)号：US06365500B1
公开(公告)日：2002-04-02
申请号：US08518182
申请日：1995-08-23
申请人： Shyh-Ming Chang , Jwo-huei Jou , Yu-Chi Lee , Dyi-Chung Hu
发明人： Shyh-Ming Chang , Jwo-huei Jou , Yu-Chi Lee , Dyi-Chung Hu
IPC分类号： H01L2144
CPC分类号： H01L24/10 , H01L24/13 , H01L24/81 , H01L2224/05001 , H01L2224/05023 , H01L2224/05184 , H01L2224/05568 , H01L2224/05573 , H01L2224/13 , H01L2224/13099 , H01L2224/1319 , H01L2224/13562 , H01L2224/16 , H01L2224/81801 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/07802 , H01L2924/14 , H01L2924/00 , H01L2224/05624 , H01L2924/00014 , H01L2224/05639 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05669 , H01L2224/05671 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171
摘要： A bonded structure comprising the physical and electrical connections between an integrated circuit element and substrate using a composite bump comprised of a single polymer body of low Young's Modulus and a conductive metal coating. The bond can be formed using thermocompression bonding, ultrasonic bonding, application of heat or application of light. The bond can also be formed using a non conductive adhesive between the integrated circuit element and the substrate. The bond can also be formed with a conductive adhesive coating on the composite bump.
摘要翻译：一种结合结构，其包括使用由低杨氏模量的单个聚合物体和导电金属涂层组成的复合凸块的集成电路元件和基板之间的物理和电连接。可以使用热压接，超声波接合，加热或施加光来形成粘结。也可以使用集成电路元件和衬底之间的非导电粘合剂形成接合。也可以在复合凸块上形成导电粘合剂涂层。

6. 发明授权

US5861661A Composite bump tape automated bonded structure 失效
标题翻译：复合凸点胶带自动粘结结构
公开(公告)号：US5861661A
公开(公告)日：1999-01-19
申请号：US974454
申请日：1997-11-20
申请人： Pao-Yun Tang , Shyh-Ming Chang , Yu-Chi Lee , Su-Yu Fang
发明人： Pao-Yun Tang , Shyh-Ming Chang , Yu-Chi Lee , Su-Yu Fang
IPC分类号： C09J9/02 , H01L21/60 , H01L21/68 , H01L23/495
CPC分类号： H01L21/568 , C09J9/02 , H01L21/6835 , H01L24/29 , H01L24/83 , H01L2224/16 , H01L2224/2919 , H01L2224/29499 , H01L2224/73204 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/838 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/0665 , H01L2924/07802 , H01L2924/0781 , H01L2924/09701 , H01L2924/14
摘要： This invention provides a bonded structure and a method of forming the bonded structure for joining a lead array to the conducting bonding pads of an integrated circuit element. The invention uses an anisotropic conductive film with tape automated bonding to form the bonded structure. The invention also uses integrated circuit elements having composite bumps as input/output pads. The composite bumps comprise a polymer body covered by a conductive metal coating. The invention provides a low cost method of tape automated bonding which uses lower temperature and pressure in the bonding process and provides a bond which is automatically encapsulated after the bonding has been completed. The lower temperature and pressure improve the dimensional stability of the elements of the bonded structure and the automatic encapsulation provides improved reliability.
摘要翻译：本发明提供一种接合结构和形成用于将引线阵列接合到集成电路元件的导电接合焊盘的接合结构的方法。本发明使用具有带自动键合的各向异性导电膜来形成结合结构。本发明还使用具有复合凸块的集成电路元件作为输入/输出焊盘。复合凸块包括被导电金属涂层覆盖的聚合物体。本发明提供了一种低成本的带式自动接合方法，其在接合过程中使用较低的温度和压力，并且提供了在接合完成之后自动封装的接合。较低的温度和压力提高了粘结结构元件的尺寸稳定性，自动封装提高了可靠性。

7. 发明授权

US5431328A Composite bump flip chip bonding 失效
标题翻译：复合凸块倒装芯片接合
公开(公告)号：US5431328A
公开(公告)日：1995-07-11
申请号：US239380
申请日：1994-05-06
申请人： Shyh-Ming Chang , Chih-Chiang Chu , Yu-Chi Lee
发明人： Shyh-Ming Chang , Chih-Chiang Chu , Yu-Chi Lee
IPC分类号： H01L21/60 , H01L23/485 , H05K3/34
CPC分类号： H01L24/10 , H01L24/13 , H01L24/81 , H05K3/3436 , H01L2224/13 , H01L2224/13099 , H01L2224/13111 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H05K2201/0212 , H05K3/3431 , Y02P70/613
摘要： A bonded structure comprising the physical and electrical connections between an integrated circuit element and substrate using a composite bump comprised of a single polymer body of low Young's Modulus, a conductive barrier metal coating covering the polymer body and a soldering metal coating covering the conductive barrier metal coating. When the bonded structure is formed the composite bump is deformed and the low Young's Modulus of the polymer body allows a very reliable bonded structure with very low bonding force. Due to the low Young's Modulus there is little stress tending to break the solder joint after the bonded structure is formed. The bond is formed using a soldering process so that the soldering metal forms a conductive adhesive between the composite bumps and either the substrate input/output pads or the integrated circuit element input/output pads.
摘要翻译：一种结合结构，其包括使用由低杨氏模量的单一聚合物主体组成的复合凸块的集成电路元件和基板之间的物理和电连接，覆盖聚合物主体的导电阻挡金属涂层和覆盖导电阻挡金属的焊接金属涂层涂层。当形成接合结构时，复合凸块变形，并且聚合物主体的低杨氏模量允许具有非常低的结合力的非常可靠的结合结构。由于低的杨氏模量，在结合结构形成之后，很少有应力打破焊点。使用焊接工艺形成接合，使得焊接金属在复合凸块与衬底输入/输出焊盘或集成电路元件输入/输出焊盘之间形成导电粘合剂。

8. 发明申请

US20060202203A1 Structure of TFT electrode for preventing metal layer diffusion and manufacturing method therefor 有权
公开(公告)号：US20060202203A1
公开(公告)日：2006-09-14
申请号：US11375336
申请日：2006-03-15
申请人： Cheng-Chung Chen , Yu-Chang Sun , Yi-Hsun Huang , Chien-Wei Wu , Shuo-Wei Liang , Chia-Hsiang Chen , Chi-Shen Lee , Chai-Yuan Sheu , Yu-Chi Lee , Te-Ming Chu , Cheng-Hsing Chen
发明人： Cheng-Chung Chen , Yu-Chang Sun , Yi-Hsun Huang , Chien-Wei Wu , Shuo-Wei Liang , Chia-Hsiang Chen , Chi-Shen Lee , Chai-Yuan Sheu , Yu-Chi Lee , Te-Ming Chu , Cheng-Hsing Chen
IPC分类号： H01L29/04
CPC分类号： H01L29/78669 , H01L27/124 , H01L29/42384 , H01L29/4908 , H01L29/66765
摘要： The invention provides a TFT electrode structure and its manufacturing method that can prevent metal diffusion occurring in the fabrication of a TFT, and thereby reduce the risk of contamination of the chemical vapor deposition process due to metallic ion diffusion. The transparent pixel electrode is formed after the gate electrode metal so that the pixel transparent electrode can be used as a barrier layer to prevent metal diffusion under high temperature from the gate electrode metal to adjacent insulating layers or the active layer. Further, the method used to form the transparent pixel electrode is a low-temperature physical vapor deposition process, which affected less by the processing environment, and the transparent pixel electrode is a conductive layer that is not affected by metal diffusion.

9. 发明申请

US20050274947A1 Structure of TFT electrode for preventing metal layer diffusion and manufacturing method therefor 有权
标题翻译：用于防止金属层扩散的TFT电极的结构及其制造方法
公开(公告)号：US20050274947A1
公开(公告)日：2005-12-15
申请号：US10964611
申请日：2004-10-15
申请人： Cheng-Chung Chen , Yu-Chang Sun , Yi-Hsun Huang , Chien-Wei Wu , Shuo-Wei Liang , Chia-Hsiang Chen , Chi-Shen Lee , Chai-Yuan Sheu , Yu-Chi Lee , Te-Ming Chu , Cheng-Hsing Chen
发明人： Cheng-Chung Chen , Yu-Chang Sun , Yi-Hsun Huang , Chien-Wei Wu , Shuo-Wei Liang , Chia-Hsiang Chen , Chi-Shen Lee , Chai-Yuan Sheu , Yu-Chi Lee , Te-Ming Chu , Cheng-Hsing Chen
IPC分类号： H01L21/00 , H01L21/336 , H01L21/77 , H01L21/84 , H01L29/423 , H01L29/49 , H01L29/786
CPC分类号： H01L29/78669 , H01L27/124 , H01L29/42384 , H01L29/4908 , H01L29/66765
摘要： The invention provides a TFT electrode structure and its manufacturing method that can prevent metal diffusion occurring in the fabrication of a TFT, and thereby reduce the risk of contamination of the chemical vapor deposition process due to metallic ion diffusion. The transparent pixel electrode is formed after the gate electrode metal so that the pixel transparent electrode can be used as a barrier layer to prevent metal diffusion under high temperature from the gate electrode metal to adjacent insulating layers or the active layer. Further, the method used to form the transparent pixel electrode is a low-temperature physical vapor deposition process, which affected less by the processing environment, and the transparent pixel electrode is a conductive layer that is not affected by metal diffusion.
摘要翻译：本发明提供一种能够防止TFT制造中发生金属扩散的TFT电极结构及其制造方法，从而降低由金属离子扩散引起的化学气相沉积工艺的污染风险。透明像素电极形成在栅电极金属之后，使得像素透明电极可以用作阻挡层，以防止在高温下从栅电极金属到相邻绝缘层或有源层的金属扩散。此外，用于形成透明像素电极的方法是低温物理气相沉积工艺，其受处理环境影响较小，并且透明像素电极是不受金属扩散影响的导电层。

10. 发明申请

US20050249421A1 Electrical apparatus with image capture unit 审中-公开
标题翻译：具有图像捕获单元的电气设备
公开(公告)号：US20050249421A1
公开(公告)日：2005-11-10
申请号：US11124102
申请日：2005-05-09
申请人： Ching Yeh , Yu-Chi Lee
发明人： Ching Yeh , Yu-Chi Lee
IPC分类号： G06K9/36
CPC分类号： H04N7/142 , G03B17/00 , H04N21/41407 , H04N21/4223 , H04N21/4788
摘要： An electrical apparatus with an image capture unit includes a casing, an image capture unit and a connection unit. The casing has a container and a first fasten portion set in the container. The image capture unit has a second fasten portion. When the second fasten portion connects with the first fasten portion, the image capture unit is fastened in the container. The connection unit connects the image capture unit and the casing. At least one portion of the connection unit is made of a flexible material. When the first fasten portion is separated from the second fasten portion, the image capture unit and at least one portion of the connection unit are pull out and exposed out of the casing. Then, when applying a force to the connection unit, the shape of the connection unit is modified.
摘要翻译：具有图像捕获单元的电气设备包括壳体，图像捕获单元和连接单元。壳体具有容器和设置在容器中的第一紧固部分。图像捕获单元具有第二紧固部分。当第二固定部分与第一固定部分连接时，图像捕获单元被紧固在容器中。连接单元连接图像捕获单元和外壳。连接单元的至少一部分由柔性材料制成。当第一紧固部分与第二固定部分分离时，图像捕获单元和连接单元的至少一部分被拉出并暴露于壳体外。然后，当向连接单元施加力时，改变连接单元的形状。

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