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    • 7. 发明申请
    • Data transfer apparatus
    • 数据传输装置
    • US20060224936A1
    • 2006-10-05
    • US11191086
    • 2005-07-28
    • Yoshihiro Takamatsuya
    • Yoshihiro Takamatsuya
    • G11C29/00
    • G06F11/1443H04L1/0061H04L1/1809
    • A data transfer apparatus improving data transfer rate regardless of the original transfer mode in a USB interface is disclosed. A computer includes a bulk packet generation unit and an isochronous packet transmission unit. The bulk packet generation unit generates a bulk packet (or a control packet) which is a USB packet and has a predetermined structure including a first data area by describing data which is taken as an object of transfer in the first data area. The isochronous packet transmission unit generates an isochronous packet which is a packet in USB isochronous transfer and has a predetermined structure including a second data area by incorporating at least one bulk packet into the second data area, and isochronously transfers the isochronous packet to the mobile telephone over the USB interface.
    • 公开了一种在USB接口中与原始传送模式无关地提高数据传送速率的数据传送装置。 计算机包括批量分组产生单元和同步分组传输单元。 批量分组生成单元通过描述作为第一数据区域中的传送对象的数据来生成作为USB分组的批量分组(或控制分组),并且具有包括第一数据区域的预定结构。 同步分组传输单元生成作为USB同步传输中的分组的同步分组,并且通过将至少一个批量分组合并到第二数据区中并具有包括第二数据区的预定结构,并将等时分组同步地传送到移动电话 通过USB接口。
    • 10. 发明授权
    • Circuit for generating a chip-enable signal for a multiple chip configuration
    • 用于产生用于多芯片配置的芯片使能信号的电路
    • US06289411B1
    • 2001-09-11
    • US09282195
    • 1999-03-31
    • Yoshiki OkumuraYoshihiro TakamatsuyaTomohiro HayashiShinkichi GamaTakeshi Nagase
    • Yoshiki OkumuraYoshihiro TakamatsuyaTomohiro HayashiShinkichi GamaTakeshi Nagase
    • G06F1200
    • G06F12/06
    • A circuit for enabling a chip, usable for both a first device capable of having m chips and a second device having more than m chips, includes a first generation unit which generates a chip-enable signal that includes a bit pattern of m bits for enabling one of the m chips indicated by a chip number, a second generation unit which generates a chip-enable generation signal that is to be decoded into a chip-enable signal of at least 2m bits for enabling one of the more than m chips indicated by the chip number, the chip-enable generation signal including a bit pattern identical to the bit pattern of m bits when the chip number is equal to a specific number, and a selection unit which selects and outputs the chip-enable signal generated by the first generation unit when the circuit is used for the first device, and selects and outputs the chip-enable generation signal generated by the second generation unit when the circuit is used for the second device.
    • 一种可用于能够具有m个芯片的第一设备和具有多于m个芯片的第二设备的芯片的电路包括:第一生成单元,其生成包括m位的位模式以使能的芯片使能信号 由芯片号码表示的m个芯片中的一个,第二代单元,其生成待解码为至少2m位的芯片使能信号的芯片使能生成信号,以使得能够使用由 所述芯片编号,所述芯片使能产生信号包括当所述芯片数等于特定数量时与m位的位模式相同的位模式;以及选择单元,其选择并输出由所述第一模块生成的所述芯片使能信号 当电路用于第一装置时,生成单元,并且当电路用于第二装置时,选择并输出由第二代单元产生的芯片使能生成信号。