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    • 1. 发明授权
    • Correlation degree operation apparatus, parallel correlation degree
operation apparatus and correlation degree operation method
    • 相关度运算装置,并行相关度运算装置和相关度运算方法
    • US5929939A
    • 1999-07-27
    • US634490
    • 1996-04-18
    • Akihiko OhtaniYoshifumi MatsumotoAkira SotaKatsuji AokiHisato YoshidaMasahiro GionAtsushi Ubukata
    • Akihiko OhtaniYoshifumi MatsumotoAkira SotaKatsuji AokiHisato YoshidaMasahiro GionAtsushi Ubukata
    • H04N7/26H04N7/28
    • H04N19/43H04N19/51
    • There is provided a correlation degree operation apparatus in which the search area is readily extensible, in which a high-speed process can be assured even though the search area is extended, and which can be formed in a simple arrangement. The search area memory stores the picture element data of a search area including ((m.times.M).times.L) candidate blocks. The correlation degree operation unit executes an operation of a degree of correlation between a reference picture block and each of the candidate blocks, with the use of picture element data supplied from the search area memory, this operation being executed by a pipeline process for each candidate block group composed of (M.times.L) candidate blocks. The search area memory has the function of supplying four picture element data at the same clock cycle. This enables the correlation degree operation unit to continuously execute the pipeline processes for the candidate block groups. It is therefore possible to continuously execute the operations of correlation degree between the reference picture block having (M.times.N) picture elements and ((m.times.M).times.L) candidate blocks.
    • 提供了一种相关度操作装置,其中搜索区域是易于扩展的,其中即使搜索区域被扩展也可以确保高速处理,并且可以以简单的布置形成。 搜索区存储器存储包括((m×M)×L)候选块的搜索区域的图像元素数据。 相关度操作单元通过使用从搜索区域存储器提供的图像元素数据来执行参考图像块和每个候选块之间的相关程度的操作,该操作由每个候选的流水线处理执行 由(MxL)候选块组成的块组。 搜索区存储器具有在相同时钟周期提供四个图像元素数据的功能。 这使得相关度操作单元能够连续执行候选块组的流水线处理。 因此,可以连续地执行具有(M×N)像素的参考图像块和((m×M)×L)个候选块之间的相关度的操作。
    • 2. 发明授权
    • Orthogonal transform processor
    • 正交变换处理器
    • US5596518A
    • 1997-01-21
    • US434298
    • 1995-05-03
    • Masaki ToyokuraKiyoshi OkamotoYoshifumi Matsumoto
    • Masaki ToyokuraKiyoshi OkamotoYoshifumi Matsumoto
    • G06F7/544G06F17/14
    • G06F17/147G06F7/5443
    • Stored in each of four coefficient memories are eight elements of each row of a matrix in 4 rows and 8 columns, which matrix consists of absolute values of elements of upper four rows out of an inverse discrete cosine matrix in 8 rows and 8 columns to be subjected to an 8-point IDCT processing. An input element y.sub.ij is supplied in parallel to four multipliers. Each of the four multipliers executes multiplication of an output of the corresponding coefficient memory out of the four coefficient memories, by the input element y.sub.ij. Eight accumulators are disposed for executing, in parallel, accumulation for obtaining eight inner products using results of the four multipliers while restoring signs of the coefficients of the orthogonal transform matrix. An 8-input selector is disposed for successively selecting results of the eight accumulators to supply an inner product w.sub.ij corresponding to the input element y.sub.ij.
    • 存储在四个系数存储器的每一个中的是四行和八列中矩阵的每一行的八个元素,该矩阵由8行和8列中的反离散余弦矩阵中的上四行的元素的绝对值组成 经过8点IDCT处理。 输入元素yij并行提供给四个乘法器。 四个乘法器中的每一个由输入元件yij执行四个系数存储器中的对应系数存储器的输出的乘法。 八个累加器被设置为并行执行累积,以使用四个乘法器的结果来获得八个内积,同时恢复正交变换矩阵的系数的符号。 设置8输入选择器,用于连续选择八个累加器的结果,以提供对应于输入元件yij的内积wij。
    • 4. 发明授权
    • Rotation detection sensor
    • 旋转检测传感器
    • US07098651B2
    • 2006-08-29
    • US10469405
    • 2002-02-17
    • Yoshifumi MatsumotoMasashi Sugimoto
    • Yoshifumi MatsumotoMasashi Sugimoto
    • G01P3/48G01B7/30
    • G01D11/245G01P1/026
    • A rotation detection sensor, which is a wheel-speed sensor, has a detection unit placed in a metal capped cylindrical casing and a holder fit in an opening of the casing. A flange is provided along the entire edge of the opening of the casing. Between the flange and the holder, a viscoelastic liquid gasket is entirely applied. The edge of the opening of the casing and the exposed part of the holder are covered with a resin portion. Thus, the viscoelastic liquid gasket smoothly enters the gap between the casing and the holder to ensure the gap is closed. Moreover, since the viscoelastic liquid gasket is quickly cured owing to its solvent which is speedily volatilized, the gasket exhibits a good workability. Then, after the solvent is volatilized, a rubber-based elastic sealing material is produced. The sealing material thus withstands any temperature change without problem, it never occurs that the sealing material melts to leak out, and the sealing between the casing and the holder can be ensured.
    • 作为车轮速度传感器的旋转检测传感器具有放置在金属盖圆柱形壳体中的检测单元和装配在壳体的开口中的保持器。 沿着壳体的开口的整个边缘设置凸缘。 在法兰和保持器之间,完全应用粘弹性液体垫圈。 壳体的开口的边缘和保持器的暴露部分被树脂部分覆盖。 因此,粘弹性液体垫片顺利地进入壳体和保持器之间的间隙,以确保间隙闭合。 此外,由于粘弹性液体垫片由于溶剂快速挥发而迅速固化,所以垫圈表现出良好的可加工性。 然后,挥发溶剂后,制造橡胶系弹性密封材料。 因此,密封材料不受任何温度变化的影响,密封材料不会熔化而泄漏,从而可以确保壳体与保持器之间的密封。
    • 7. 发明授权
    • Orthogonal transform processor
    • 正交变换处理器
    • US5477478A
    • 1995-12-19
    • US364037
    • 1994-12-27
    • Kiyoshi OkamotoYoshifumi MatsumotoMasaki Toyokura
    • Kiyoshi OkamotoYoshifumi MatsumotoMasaki Toyokura
    • G10L25/00G06F17/14G06T1/20G10L25/18H03M7/30H04N1/41H04N19/42H04N19/423H04N19/436H04N19/60H04N19/625H04N19/85G06F15/332
    • G06F17/147
    • The output of a butterfly unit is entered into a product-sum unit in a forward DCT and the output of the product-sum unit is entered into the butterfly unit in an inverse DCT. The product-sum unit employs, as a bit-string distribution circuit, a register circuit having eight bit shift registers each having a 16-bit parallel input and a 2-bit shift output and the bit shift registers are different in bit width from one another. Data are entered into the bit shift registers with the largest bit-width bit shift register first, such that the respective bit shift registers are shifted rightward by 2 bits per cycle. Four shift registers are disposed between the bit-string distribution circuit and a RAG circuit such that, when bit strings are entered, as delayed cycle by cycle, into eight RAGs of the RAC circuit, the final accumulation results are successively provided from the RACs in a proper order. This reduces the bi-directional DCT processor in circuit arrangement.
    • 蝶形单元的输出被输入到前向DCT中的乘积和单元中,并且乘积和单元的输出以逆DCT输入到蝶形单元中。 产品总和单元采用具有8位移位寄存器的寄存器电路作为位串分配电路,每个寄存器电路具有16位并行输入和2位移位输出,而位移寄存器的位宽与1位不同 另一个。 首先将数据输入到具有最大位宽位移位寄存器的位移寄存器中,使得相应的位移位寄存器向右移动每个周期2位。 四个移位寄存器设置在位串分配电路和RAG电路之间,使得当位串被输入时,逐周期地延迟到RAC电路的八个RAG中,最终累加结果从RAC 正确的顺序 这减少了电路布置中的双向DCT处理器。
    • 10. 发明授权
    • Two-dimensional orthogonal transform processor
    • 二维正交变换处理器
    • US5583803A
    • 1996-12-10
    • US364116
    • 1994-12-27
    • Yoshifumi MatsumotoMasaki Toyokura
    • Yoshifumi MatsumotoMasaki Toyokura
    • G06F17/14G06F7/38
    • G06F17/147
    • The two-dimensional DCT (discrete cosine transform) of plural n.times.n data items is carried out at high speed, with requiring less hardware. X(h) is an operation in which row vectors of A(h) are sequentially transmitted from a first memory to a one-dimensional DCT processor for product-of-matrices computations and the products thus found are sequentially written to at addresses of corresponding row vectors of B(h) of a second memory. Y(h) is an operation in which column vectors of B(h) are sequentially transmitted from the second memory to the one-dimensional DCT processor for product-of-matrices computations and the products thus found are sequentially written to at addresses of corresponding column vectors of C(h) of the first memory. The operation X(h) starts at h=1 and ends at h=m. Then, the operation Y(h) starts at h=1 and ends at h=m. The one-dimensional DCT processor performs the pipelining operation of n-element one-dimensional vectors for product-of-matrices computations.
    • 多个nxn数据项的二维DCT(离散余弦变换)以较高的速度执行,需要较少的硬件。 X(h)是对于矩阵的乘积运算,从第一存储器向一维DCT处理器依次发送A(h)的行向量的操作,并且将如此找到的乘积顺序地写入对应的地址 第二存储器的B(h)的行向量。 Y(h)是从第二存储器向一维DCT处理器顺序发送B(h)的列向量到矩阵计算的操作,并且将如此找到的乘积顺序写入到相应的地址 第一存储器的C(h)的列向量。 操作X(h)从h = 1开始,以h = m结束。 然后,操作Y(h)从h = 1开始,以h = m结束。 一维DCT处理器执行用于矩阵计算的n元素一维向量的流水线操作。