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1. 发明授权

US09754785B2 Methods of manufacturing semiconductor devices 有权
公开(公告)号：US09754785B2
公开(公告)日：2017-09-05
申请号：US14993141
申请日：2016-01-12
申请人： Eun-Jung Kim , Sung-Un Kwon , Yong-Kwan Kim , Yoo-Sang Hwang , Young-Sik Seo
发明人： Eun-Jung Kim , Sung-Un Kwon , Yong-Kwan Kim , Yoo-Sang Hwang , Young-Sik Seo
IPC分类号： H01L21/033 , H01L21/308 , H01L21/311 , H01L21/3213 , H01L27/108
CPC分类号： H01L21/0337 , H01L21/3086 , H01L21/31144 , H01L21/32139 , H01L27/10814 , H01L27/10876 , H01L27/10885
摘要： In a method of manufacturing a semiconductor device, sacrificial layer patterns extending in a first direction are formed on an etch target layer. Preliminary mask patterns are formed on opposite sidewall surfaces of each of the sacrificial layer patterns. A filling layer is formed to fill a space between the preliminary mask patterns. Upper portions of the preliminary mask patterns are etched to form a plurality of mask patterns. Each of the mask patterns is symmetric with respect to a plane passing a center point of each of the mask patterns in a second direction substantially perpendicular to the first direction and extending in the first direction. The sacrificial layer patterns and the filling layer are removed. The etch target layer is etched using the mask patterns as an etching mask to form a plurality of target layer patterns.

2. 发明授权

US09406873B2 Magnetic memory device and method of fabricating the same 有权
标题翻译：磁记忆装置及其制造方法
公开(公告)号：US09406873B2
公开(公告)日：2016-08-02
申请号：US14319563
申请日：2014-06-30
申请人： Shinhee Han , Daeeun Jeong , Yong Kwan Kim , Yoonjong Song
发明人： Shinhee Han , Daeeun Jeong , Yong Kwan Kim , Yoonjong Song
IPC分类号： H01L21/02 , H01L43/08 , H01L27/22
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1659 , H01L27/228
摘要： Provided are a magnetic memory device and a method of fabricating the same. The device may include a cell selection device, a magnetic tunnel junction (MTJ), and a lower electrode connecting them. The lower electrode may include a vertical portion and a horizontal portion laterally extending from a side surface of the vertical portion. In the lower electrode, the vertical portion has a top surface higher than the horizontal portion and has a top surface including at least two parallel sides and other side at an angle thereto. The MTJ may be provided on the vertical portion of the lower electrode.
摘要翻译：提供一种磁存储器件及其制造方法。该装置可以包括细胞选择装置，磁性隧道结（MTJ）和连接它们的下部电极。下电极可以包括从垂直部分的侧表面横向延伸的垂直部分和水平部分。在下部电极中，垂直部分具有高于水平部分的顶表面，并且具有包括至少两个平行边和与其成一定角度的另一侧的顶表面。 MTJ可以设置在下电极的垂直部分上。

3. 发明申请

US20160203983A1 METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20160203983A1
公开(公告)日：2016-07-14
申请号：US14993141
申请日：2016-01-12
申请人： EUN-JUNG KIM , SUNG-UN KWON , YONG-KWAN KIM , YOO-SANG HWANG , YOUNG-SIK SEO
发明人： EUN-JUNG KIM , SUNG-UN KWON , YONG-KWAN KIM , YOO-SANG HWANG , YOUNG-SIK SEO
IPC分类号： H01L21/033
CPC分类号： H01L21/0337 , H01L21/3086 , H01L21/31144 , H01L21/32139 , H01L27/10814 , H01L27/10876 , H01L27/10885
摘要： In a method of manufacturing a semiconductor device, sacrificial layer patterns extending in a first direction are formed on an etch target layer. Preliminary mask patterns are formed on opposite sidewall surfaces of each of the sacrificial layer patterns. A filling layer is formed to fill a space between the preliminary mask patterns. Upper portions of the preliminary mask patterns are etched to form a plurality of mask patterns. Each of the mask patterns is symmetric with respect to a plane passing a center point of each of the mask patterns in a second direction substantially perpendicular to the first direction and extending in the first direction. The sacrificial layer patterns and the filling layer are removed. The etch target layer is etched using the mask patterns as an etching mask to form a plurality of target layer patterns.
摘要翻译：在制造半导体器件的方法中，在蚀刻目标层上形成沿第一方向延伸的牺牲层图案。在每个牺牲层图案的相对侧壁表面上形成初步掩模图案。形成填充层以填充初步掩模图案之间的空间。蚀刻初步掩模图案的上部以形成多个掩模图案。每个掩模图案相对于通过每个掩模图案的中心点的平面在基本上垂直于第一方向并沿第一方向延伸的第二方向上是对称的。除去牺牲层图案和填充层。使用掩模图案作为蚀刻掩模蚀刻蚀刻目标层以形成多个目标层图案。

4. 发明授权

US09287160B2 Semiconductor devices and methods of fabricating the same 有权
公开(公告)号：US09287160B2
公开(公告)日：2016-03-15
申请号：US14826758
申请日：2015-08-14
申请人： Ki-hyung Nam , Pulunsol Cho , Yong Kwan Kim
发明人： Ki-hyung Nam , Pulunsol Cho , Yong Kwan Kim
IPC分类号： H01L27/088 , H01L21/762 , H01L21/8234
CPC分类号： H01L21/76224 , H01L21/823481 , H01L27/10876 , H01L27/10888 , H01L27/10891 , H01L27/228 , H01L27/2454 , H01L27/2463 , H01L29/4236 , H01L29/66621 , H01L29/78 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： A semiconductor device, and a method of fabricating the same, include a substrate including two-dimensionally arranged active portions, device isolation patterns extending along sidewalls of the active portions, each of the device isolation patterns including first and second device isolation patterns, gate patterns extending across the active portions and the device isolation patterns, each of the gate patterns including a gate insulating layer, a gate line and a gate capping pattern, and ohmic patterns on the active portions, respectively. Top surfaces of the first device isolation pattern and the gate insulating layer may be lower than those of the second device isolation pattern and the gate capping pattern, respectively, and the ohmic patterns may include an extending portion on the first insulating layer.

5. 发明授权

US08901526B2 Variable resistive memory device 有权
标题翻译：可变电阻式存储器件
公开(公告)号：US08901526B2
公开(公告)日：2014-12-02
申请号：US13753712
申请日：2013-01-30
申请人： Ki-hyung Nam , Yong-kwan Kim , Ho-joong Lee , Pulunsol Cho
发明人： Ki-hyung Nam , Yong-kwan Kim , Ho-joong Lee , Pulunsol Cho
IPC分类号： H01L29/00 , H01L45/00 , H01L27/22
CPC分类号： H01L45/1253 , H01L27/228
摘要： A variable resistive memory device capable of reducing contact resistance by including a contact layer having low contact resistance, the variable resistive memory device including a substrate comprising an active region; a gate line on the substrate; a first contact layer electrically connected to the active region; a memory cell contact plug electrically connected to the first contact layer; and a variable resistive memory cell electrically connected to the memory cell contact plug, wherein the first contact layer has less contact resistance with respect to the active region than the memory cell contact plug.
摘要翻译：一种可变电阻存储器件，其能够通过包括具有低接触电阻的接触层来降低接触电阻，所述可变电阻式存储器件包括包括有源区的衬底; 衬底上的栅极线; 电连接到有源区的第一接触层; 电连接到所述第一接触层的存储单元接触插塞; 以及电连接到所述存储单元接触插塞的可变电阻存储单元，其中所述第一接触层相对于所述有源区具有比所述存储单元接触插塞更小的接触电阻。

6. 发明申请

US20140021551A1 SEMICONDUCTOR DEVICES AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20140021551A1
公开(公告)日：2014-01-23
申请号：US13943208
申请日：2013-07-16
申请人： Ki-hyung NAM , Yong Kwan KIM , Chan Ho PARK , Pulunsol CHO
发明人： Ki-hyung NAM , Yong Kwan KIM , Chan Ho PARK , Pulunsol CHO
IPC分类号： H01L29/78 , H01L29/66
CPC分类号： H01L29/7831 , H01L27/228 , H01L27/2454 , H01L29/66484 , H01L45/06 , H01L45/085 , H01L45/144 , H01L45/145
摘要： Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device includes active portions defined in a semiconductor substrate, a device isolation pattern in a trench formed between the active portions, a gate electrode in a gate recess region crossing the active portions and the device isolation pattern, a gate dielectric layer between the gate electrode and an inner surface of the gate recess region, and a first ohmic pattern and a second ohmic pattern on each of the active portions at both sides of the gate electrode, respectively. The first and second ohmic patterns include a metal-semiconductor compound, and a top surface of the device isolation pattern at both sides of the gate recess region is recessed to be lower than a level of a top surface of the semiconductor substrate.
摘要翻译：公开了半导体器件及其制造方法。半导体器件包括限定在半导体衬底中的有源部分，在有源部分之间形成的沟槽中的器件隔离图案，与有源部分交叉的栅极凹部区域中的栅极电极和器件隔离图案，栅极电介质层电极和栅极凹陷区域的内表面，以及分别在栅电极两侧的每个有源部分上的第一欧姆图案和第二欧姆图案。第一和第二欧姆模式包括金属半导体化合物，并且栅极凹部区域的两侧的器件隔离图案的顶表面凹陷以低于半导体衬底的顶表面的电平。

7. 发明申请

US20130221306A1 VARIABLE RESISTIVE MEMORY DEVICE 有权
标题翻译：可变电阻存储器件
公开(公告)号：US20130221306A1
公开(公告)日：2013-08-29
申请号：US13753712
申请日：2013-01-30
申请人： Ki-hyung NAM , Yong-kwan KIM , Ho-joong LEE , Pulunsol CHO
发明人： Ki-hyung NAM , Yong-kwan KIM , Ho-joong LEE , Pulunsol CHO
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L27/228
摘要： A variable resistive memory device capable of reducing contact resistance by including a contact layer having low contact resistance, the variable resistive memory device including a substrate comprising an active region; a gate line on the substrate; a first contact layer electrically connected to the active region; a memory cell contact plug electrically connected to the first contact layer; and a variable resistive memory cell electrically connected to the memory cell contact plug, wherein the first contact layer has less contact resistance with respect to the active region than the memory cell contact plug.
摘要翻译：一种可变电阻存储器件，其能够通过包括具有低接触电阻的接触层来降低接触电阻，所述可变电阻式存储器件包括包括有源区的衬底; 衬底上的栅极线; 电连接到有源区的第一接触层; 电连接到所述第一接触层的存储单元接触插塞; 以及电连接到所述存储单元接触插塞的可变电阻存储单元，其中所述第一接触层相对于所述有源区具有比所述存储单元接触插塞更小的接触电阻。

8. 发明申请

US20130044295A1 PROJECTOR WITH OFFSET BETWEEN PROJECTION OPTICAL SYSTEM AND DISPLAY UNIT 审中-公开
标题翻译：投影机投影光学系统和显示单元之间的偏移
公开(公告)号：US20130044295A1
公开(公告)日：2013-02-21
申请号：US13571038
申请日：2012-08-09
申请人： Seong-Ha PARK , Yong-Kwan Kim , Dong-Hi Lee
发明人： Seong-Ha PARK , Yong-Kwan Kim , Dong-Hi Lee
IPC分类号： G03B21/28
CPC分类号： H04N9/3173 , G03B21/2066 , G03B21/208
摘要： A projector for projecting out lights forming an image on an external screen includes at least one light source configured to output a light; a display unit having a plurality of pixel elements and configured to form an image by controlling the pixel elements according to a driving signal; an illumination optical system having at least one lens and mirror arranged on a first optical axis, and configured to output the light output from the light source to the display unit through the mirror; and a projection optical system having at least one lens arranged on a second optical axis intersecting the first optical axis, and configured to externally output the light output from the display unit. A preset offset is provided between the second optical axis of the projection optical system and the central axis of the display unit.
摘要翻译：一种用于将形成图像的光投射到外部屏幕上的投影仪包括：至少一个被配置为输出光的光源; 显示单元，具有多个像素元素，并且被配置为根据驱动信号控制像素元素来形成图像; 照明光学系统，其具有布置在第一光轴上的至少一个透镜和反射镜，并且被配置为通过反射镜将从光源输出的光输出到显示单元; 以及投影光学系统，其具有布置在与所述第一光轴相交的第二光轴上的至少一个透镜，并且被配置为从所述显示单元输出的光从外部输出。在投影光学系统的第二光轴和显示单元的中心轴之间设置预置偏移。

9. 发明授权

US08248906B2 Ferroelectric hard disk system 失效
标题翻译：铁电硬盘系统
公开(公告)号：US08248906B2
公开(公告)日：2012-08-21
申请号：US11964328
申请日：2007-12-26
申请人： Seung-bum Hong , Sung-hoon Choa , Ju-hwan Jung , Hyoung-soo Ko , Yong Kwan Kim
发明人： Seung-bum Hong , Sung-hoon Choa , Ju-hwan Jung , Hyoung-soo Ko , Yong Kwan Kim
IPC分类号： G11B9/00
CPC分类号： G11B9/02
摘要： A ferroelectric hard disk device is provided and includes: a ferroelectric media having a bottom electrode and a ferroelectric layer disposed on the bottom electrode; and a head formed above the ferroelectric media, the head being operative to write and reproduce information on the ferroelectric layer.
摘要翻译：提供了一种铁电硬盘装置，包括：铁电介质，具有设置在底部电极上的底部电极和铁电体层; 以及形成在铁电介质上方的头部，头部用于在铁电层上写入和再现信息。

10. 发明授权

US08206803B2 Information storage medium using nanocrystal particles, method of manufacturing the information storage medium, and information storage apparatus including the information storage medium 有权
标题翻译：使用纳米晶粒的信息存储介质，信息存储介质的制造方法以及包括信息存储介质的信息存储装置
公开(公告)号：US08206803B2
公开(公告)日：2012-06-26
申请号：US11854124
申请日：2007-09-12
申请人： Seung-bum Hong , Simon Buehlmann , Shin-ae Jun , Sung-hoon Choa , Eun-joo Jang , Yong-kwan Kim
发明人： Seung-bum Hong , Simon Buehlmann , Shin-ae Jun , Sung-hoon Choa , Eun-joo Jang , Yong-kwan Kim
IPC分类号： B32B3/02
CPC分类号： G11B5/7325 , B82Y10/00 , G11B5/743 , G11B9/02 , G11B9/08 , G11B9/1472
摘要： Provided is an information storage medium using nanocrystal particles, a method of manufacturing the information storage medium, and an information storage apparatus including the information storage medium. The information storage medium includes a conductive layer, a first insulating layer formed on the conductive layer, a nanocrystal layer that is formed on the first insulating layer and includes conductive nanocrystal particles that can trap charges, and a second insulating layer formed on the nanocrystal layer.
摘要翻译：提供了使用纳米晶粒的信息存储介质，信息存储介质的制造方法以及包括信息存储介质的信息存储装置。所述信息存储介质包括导电层，形成在所述导电层上的第一绝缘层，形成在所述第一绝缘层上并包含可以捕获电荷的导电纳米晶体颗粒的纳米晶体层，以及形成在所述纳米晶体层上的第二绝缘层。

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