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1. 发明申请

US20070069757A1 Inspection method of contact failure of semiconductor device and semiconductor device to which inspection method is applied 有权
标题翻译：应用检查方法的半导体器件和半导体器件的接触故障检查方法
公开(公告)号：US20070069757A1
公开(公告)日：2007-03-29
申请号：US11368758
申请日：2006-03-07
申请人： Yasuo Matsumiya
发明人： Yasuo Matsumiya
IPC分类号： G01R31/26
CPC分类号： G01R31/305
摘要： A substrate inspection method includes forming, along a route extending from a peripheral portion to a central portion of an inspection area, a conducting path built up by combining a plurality of first conducting elements disposed in a first layer of a substrate, a plurality of second conducting elements disposed in a second layer of the substrate and contact holes connecting the first conducting elements and the second conducting elements between the first layer and the second layer, and detecting electrons emitted from the inspection area by irradiating the inspection area with electron beams.
摘要翻译：基板检查方法包括沿着从检查区域的周边部分延伸到中心部分的路线形成通过组合设置在基板的第一层中的多个第一导电元件而形成的导电路径，多个第二设置在基板的第二层中的导电元件和在第一层和第二层之间连接第一导电元件和第二导电元件的接触孔，并且通过用电子束照射检查区域来检测从检查区域发射的电子。

2. 发明申请

US20120104535A1 PHOTODETECTOR 审中-公开
标题翻译：照相机
公开(公告)号：US20120104535A1
公开(公告)日：2012-05-03
申请号：US13282760
申请日：2011-10-27
申请人： Shinichiro KAWAKAMI , Yasuo MATSUMIYA
发明人： Shinichiro KAWAKAMI , Yasuo MATSUMIYA
IPC分类号： H01L31/0352
CPC分类号： H01L31/108 , B82Y20/00 , H01L27/1446 , H01L27/14647 , H01L27/14649 , H01L27/14694 , H01L31/035236 , H01L31/109
摘要： A photodetector includes a substrate, a first electrode layer, a first light absorbing layer, a second electrode layer, a second light absorbing layer, and a third electrode layer that are laminated on the substrate, a first electrode wire that intercouples the first electrode layer and the second electrode layer, a second electrode wire that intercouples the second electrode layer and the third electrode layer, a first diode formed at a place where the second electrode layer and the first electrode wire are mutually brought into contact, and a second diode formed at a place where the second electrode layer and the second electrode wire are mutually brought into contact.
摘要翻译：光电检测器包括层叠在基板上的基板，第一电极层，第一光吸收层，第二电极层，第二光吸收层和第三电极层，将第一电极层和第二电极层，与第二电极层和第三电极层相互结合的第二电极线，形成在第二电极层和第一电极线相互接触的位置的第一二极管，以及形成在第二电极层和第二电极线相互接触的地方。

3. 发明申请

US20090196490A1 DEFECT INSPECTION METHOD AND DEFECT INSPECTION APPARATUS 审中-公开
标题翻译：缺陷检查方法和缺陷检查装置
公开(公告)号：US20090196490A1
公开(公告)日：2009-08-06
申请号：US12367444
申请日：2009-02-06
申请人： Yasuo MATSUMIYA
发明人： Yasuo MATSUMIYA
IPC分类号： G06K9/00
CPC分类号： G06K9/00 , G01R31/311 , G06K2209/19 , G06T7/001 , G06T2207/10061 , G06T2207/30148 , H01L22/12
摘要： A method, of inspecting a semiconductor device for defects, includes: acquiring an observation image of the semiconductor device, the observation image including a defect inspection object area which has a repetitive pattern; superposing a reference on the observation image thereby to form a test-mule image representing a version of the observation image in which signals have been removed from a given area, including the defect inspection area, masked with the reference ; and inspecting for defects in the test-mule image thereby to identify corresponding defects in the observation image.
摘要翻译：检测半导体器件的缺陷的方法包括：获取半导体器件的观察图像，所述观察图像包括具有重复图案的缺陷检查对象区域; 在观察图像上叠加参考，从而形成表示已经从给定区域去除了信号的观察图像的版本的测试骡图像，所述观察图像包括用参考掩蔽的缺陷检查区域; 并检查测试骡图像中的缺陷，从而识别观察图像中的相应缺陷。

4. 发明申请

US20070041631A1 Inspecting method, inspecting apparatus, and method of manufacturing semiconductor device 有权
标题翻译：检查方法，检查装置以及制造半导体器件的方法
公开(公告)号：US20070041631A1
公开(公告)日：2007-02-22
申请号：US11397852
申请日：2006-04-05
申请人： Atsuo Fushida , Yasuo Matsumiya , Yasuhiro Suzuki , Akihiro Shimada
发明人： Atsuo Fushida , Yasuo Matsumiya , Yasuhiro Suzuki , Akihiro Shimada
IPC分类号： G06K9/00
CPC分类号： H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： An inspecting method increases the accuracy of a DSA for thereby increasing the yield of semiconductor devices which are manufactured. For performing a DSA using the data of a defect inspecting process obtained when wiring patterns are formed on a wafer and the dada of a VC inspecting process performed after the wiring patterns are formed, a rectangular DSA area is established in surrounding relation to a wiring pattern in which a nonconductive area is detected, based on the shape of the wiring pattern. For example, if three defects are detected in the defect inspecting process, then it is possible to select only at least one of those defects which affects the wiring pattern in the DSA area. Since fabrication steps can appropriately be evaluated based on the selected defect, suitable necessary actions or countermeasures may be taken for any problematic fabrication step based on the evaluation of the fabrication steps, so that high-performance, high-quality semiconductor devices can be manufactured.
摘要翻译：检查方法提高DSA的精度，从而提高制造的半导体器件的产量。为了使用在晶片上形成布线图案时获得的缺陷检查处理的数据和在形成布线图案之后执行的VC检查处理的数据来执行DSA，建立与布线图案相关的矩形DSA区域其中基于布线图案的形状检测非导电区域。例如，如果在缺陷检查过程中检测到三个缺陷，则可以仅选择影响DSA区域中的布线图案的那些缺陷中的至少一个。由于可以基于所选择的缺陷来适当地评估制造步骤，所以可以基于制造步骤的评估对任何有问题的制造步骤采取适当的必要动作或对策，从而可以制造高性能，高质量的半导体器件。

5. 发明授权

US6159854A Process of growing conductive layer from gas phase 失效
标题翻译：从气相生长导电层的工艺
公开(公告)号：US6159854A
公开(公告)日：2000-12-12
申请号：US455520
申请日：1995-05-31
申请人： Nobuyuki Ohtsuka , Yasuo Matsumiya , Kuninori Kitahara
发明人： Nobuyuki Ohtsuka , Yasuo Matsumiya , Kuninori Kitahara
IPC分类号： C23C16/18 , C23C16/20 , H01L21/285 , H01L21/3205 , H01L21/768 , H01L21/44
CPC分类号： H01L21/76838 , C23C16/18 , C23C16/20 , H01L21/28556 , H01L21/32051 , H01L21/76879
摘要： A process of growing a conductive layer on a substrate by a chemical reaction of a source gas on the substrate includes preparing a substrate having an area covered with a coating layer of a material different from a material of the substrate and an area not covered with the coating layer; supplying a first source gas onto the substrate and causing a chemical reaction of the first source gas to occur on the substrate only in the area not covered with the coating layer, thereby selectively growing a first conductive layer on the substrate only in the area not covered with the coating layer; terminating the supplying of the first source gas; and supplying a second source gas onto the substrate and causing a chemical reaction of the second source gas to occur on both of the first conductive layer and the coating layer, thereby unselective growing a second conductive layer of the same conductive material as the first conductive layer, on both of the first conductive layer and the coating layer. A chemical vapor deposition process for growing a conductive layer, includes maintaining, in a container, an amount of a source liquid containing at least one of constituent elements of the conductive layer; introducing the source liquid from the container and a heated carrier gas into a vaporizer vaporizing the source liquid by heating to generate a source gas in the vaporizer; and supplying from the vaporizer the source gas together with the heated carrier gas immediately into a reactor for chemical vapor deposition.
摘要翻译：通过源气体在衬底上的化学反应在衬底上生长导电层的工艺包括制备具有覆盖有不同于衬底的材料的材料的涂层的区域的衬底和未覆盖涂层; 将第一源气体供应到基板上，并且仅在未覆盖涂层的区域中仅在基板上发生第一源气体的化学反应，从而仅在未覆盖的区域中在基板上选择性地生长第一导电层与涂层; 终止第一源气体的供给; 并且将第二源气体供应到所述基板上，并且使所述第二源气体在所述第一导电层和所述涂层两者上发生化学反应，从而选择性地生长与所述第一导电层相同的导电材料的第二导电层，在第一导电层和涂层两者上。用于生长导电层的化学气相沉积工艺包括在容器中保持含有导电层的构成元素中的至少一个的源液体的量; 将来自容器的源液体和加热的载气引入蒸发器中，通过加热蒸发源液体，以在蒸发器中产生源气体; 并且将来自气化器的源气体与加热的载体气体一起供应到用于化学气相沉积的反应器中。

6. 发明授权

US08073241B2 Defect source analysis method, defect source analysis apparatus, and method of manufacturing semiconductor device 有权
标题翻译：缺陷源分析方法，缺陷源分析装置和半导体器件制造方法
公开(公告)号：US08073241B2
公开(公告)日：2011-12-06
申请号：US11397852
申请日：2006-04-05
申请人： Atsuo Fushida , Yasuo Matsumiya , Yasuhiro Suzuki , Akihiro Shimada
发明人： Atsuo Fushida , Yasuo Matsumiya , Yasuhiro Suzuki , Akihiro Shimada
IPC分类号： G06K9/00 , H01L21/66
CPC分类号： H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： An inspecting method increases the accuracy of a DSA (Defect Source Analysis) for thereby increasing the yield of semiconductor devices which are manufactured. For performing a DSA using data of a defect inspecting process obtained when wiring patterns are formed on a wafer and data of a VC (Voltage Contrast) inspecting process performed after the wiring patterns are formed, a rectangular DSA area is established in relation to a wiring pattern in which a nonconductive area is detected, based on the shape of the wiring pattern. For example, if three defects are detected in the defect inspecting process, then it is possible to select only at least one of those defects which affects the wiring pattern in the DSA area. Since fabrication steps can appropriately be evaluated based on the selected defect, suitable actions may be taken for any problematic fabrication step based on the evaluation of the fabrication steps.
摘要翻译：检查方法提高了DSA（缺陷源分析）的精度，从而提高了所制造的半导体器件的产量。为了使用在晶片上形成布线图案时获得的缺陷检查处理的数据和在形成布线图案之后执行的VC（电压对比度）检查处理的数据来执行DSA，建立与布线相关的矩形DSA区域基于布线图案的形状检测不导电区域的图案。例如，如果在缺陷检查过程中检测到三个缺陷，则可以仅选择影响DSA区域中的布线图案的那些缺陷中的至少一个。由于可以基于所选择的缺陷来适当地评估制造步骤，所以可以基于制造步骤的评估对任何有问题的制造步骤采取适当的动作。

7. 发明授权

US07592623B2 Semiconductor device including wiring connection testing structure 失效
标题翻译：半导体器件包括接线连接测试结构
公开(公告)号：US07592623B2
公开(公告)日：2009-09-22
申请号：US11115411
申请日：2005-04-27
申请人： Yasuo Matsumiya
发明人： Yasuo Matsumiya
IPC分类号： H01L23/58
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a substrate, a semiconductor element formed on the substrate, and a wiring connection testing structure which is formed on the substrate and which includes an electron beam irradiation area where an electron beam is irradiated so that a wiring connection is tested. The wiring connection testing structure includes an insulation layer formed on the substrate, a plurality of first pattern wirings which are formed on the insulation layer in parallel and which include the electron beam irradiation area, a second pattern wiring formed between the first pattern wirings, a third pattern wiring which is formed on a lower layer of the second pattern wiring and which is connected to the second pattern wiring, and a fourth pattern wiring which is formed on an upper layer of the third pattern wiring, is connected to the third pattern wiring, and has the electron beam irradiation area.
摘要翻译：半导体器件包括衬底，形成在衬底上的半导体元件和形成在衬底上并且包括电子束照射区域的电子束照射区域的布线连接测试结构，其中电子束被照射以便测试接线连接。布线连接测试结构包括形成在基板上的绝缘层，多个第一图案布线，其平行地形成在绝缘层上并且包括电子束照射区域，形成在第一图案布线之间的第二图案布线，形成在第二图案布线的下层并连接到第二图案布线的第三图案布线和形成在第三图案布线的上层上的第四图案布线连接到第三图案布线，并具有电子束照射区域。

8. 发明授权

US07538345B2 Inspection method of contact failure of semiconductor device and semiconductor device to which inspection method is applied 有权
标题翻译：应用检查方法的半导体器件和半导体器件的接触故障检查方法
公开(公告)号：US07538345B2
公开(公告)日：2009-05-26
申请号：US11368758
申请日：2006-03-07
申请人： Yasuo Matsumiya
发明人： Yasuo Matsumiya
IPC分类号： H01L23/58
CPC分类号： G01R31/305
摘要： A substrate inspection method includes forming, along a route extending from a peripheral portion to a central portion of an inspection area, a conducting path built up by combining a plurality of first conducting elements disposed in a first layer of a substrate, a plurality of second conducting elements disposed in a second layer of the substrate and contact holes connecting the first conducting elements and the second conducting elements between the first layer and the second layer, and detecting electrons emitted from the inspection area by irradiating the inspection area with electron beams.
摘要翻译：基板检查方法包括沿着从检查区域的周边部分延伸到中心部分的路线形成通过组合设置在基板的第一层中的多个第一导电元件而形成的导电路径，多个第二设置在基板的第二层中的导电元件和在第一层和第二层之间连接第一导电元件和第二导电元件的接触孔，并且通过用电子束照射检查区域来检测从检查区域发射的电子。

9. 发明申请

US20060175607A1 Semiconductor device, device forming substrate, wiring connection testing method, and manufacturing method of the semiconductor device 失效
标题翻译：半导体装置，器件形成基板，布线连接试验方法以及半导体装置的制造方法
公开(公告)号：US20060175607A1
公开(公告)日：2006-08-10
申请号：US11115411
申请日：2005-04-27
申请人： Yasuo Matsumiya
发明人： Yasuo Matsumiya
IPC分类号： H01L21/66 , H01L23/58
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a substrate, a semiconductor element formed on the substrate, and a wiring connection testing structure which is formed on the substrate and which includes an electron beam irradiation area where an electron beam is irradiated so that a wiring connection is tested. The wiring connection testing structure includes an insulation layer formed on the substrate, a plurality of first pattern wirings which are formed on the insulation layer in parallel and which include the electron beam irradiation area, a second pattern wiring formed between the first pattern wirings, a third pattern wiring which is formed on a lower layer of the second pattern wiring and which is connected to the second pattern wiring, and a fourth pattern wiring which is formed on an upper layer of the third pattern wiring, is connected to the third pattern wiring, and has the electron beam irradiation area.
摘要翻译：半导体器件包括衬底，形成在衬底上的半导体元件和形成在衬底上并且包括电子束照射区域的电子束照射区域的布线连接测试结构，其中电子束被照射以便测试接线连接。布线连接测试结构包括形成在基板上的绝缘层，多个第一图案布线，其平行地形成在绝缘层上并且包括电子束照射区域，形成在第一图案布线之间的第二图案布线，形成在第二图案布线的下层并连接到第二图案布线的第三图案布线和形成在第三图案布线的上层上的第四图案布线连接到第三图案布线，并具有电子束照射区域。

10. 发明授权

US4412261A Magnetic disk memory device 失效
标题翻译：磁盘存储设备
公开(公告)号：US4412261A
公开(公告)日：1983-10-25
申请号：US252816
申请日：1981-04-10
申请人： Kenichi Tateyama , Yasuo Matsumiya , Toshio Hishinuma
发明人： Kenichi Tateyama , Yasuo Matsumiya , Toshio Hishinuma
IPC分类号： G11B5/40 , G11B23/02 , G11B25/04 , G11B33/14 , G11B5/60
CPC分类号： G11B33/142 , G11B23/021 , G11B25/043 , G11B5/40
摘要： A magnetic disk memory device of the invention has a shroud accommodating replaceable or changeable disk packs and air passages through which air is circulated to cool the disk packs and the access mechanism. This air passage is formed, when a shroud cover for closing the space in the shroud is in the closing position, to recirculate the air through the space in the shroud, while, when the shroud cover is in the opening position, to discharge the air delivered by a blower to the outside of the shroud through the opening of the latter. The air passage has an air filter for filtrating the air.
摘要翻译：本发明的磁盘存储装置具有容纳可更换或可更换的盘组件和空气通道的护罩，通过该空气通道使空气循环以冷却盘组件和进入机构。当用于关闭护罩中的空间的护罩盖处于关闭位置时，空气通道形成为使空气通过护罩中的空间再循环，同时当护罩盖处于打开位置时，排出空气通过鼓风机的开口将其传送到护罩的外部。空气通道具有用于过滤空气的空气过滤器。

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