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    • 1. 发明授权
    • Spin injection device having semiconductor-ferromagnetic-semiconductor structure and spin transistor
    • 具有半导体 - 铁磁半导体结构和自旋晶体管的自旋注入装置
    • US08233315B2
    • 2012-07-31
    • US13350591
    • 2012-01-13
    • Ya-Hong Xie
    • Ya-Hong Xie
    • G11C11/00
    • H01L29/66984Y10S977/935
    • A spin injection device and spin transistor including a spin injection device. A spin injection device includes different semiconductor materials and a spin-polarizing ferromagnetic material there between. The semiconductor materials may have different crystalline structures, e.g., a first material can be polycrystalline or amorphous silicon, and a second material can be single crystalline silicon. Charge carriers are spin-polarized when the traverse the spin-polarizing ferromagnetic material and injected into the second semiconductor material. A Schottky barrier height between the first semiconductor and ferromagnetic materials is larger than a second Schottky barrier height between the ferromagnetic and second semiconductor materials. A spin injection device may be a source of a spin field effect transistor.
    • 一种自旋注入装置和包括自旋注入装置的自旋晶体管。 自旋注入装置包括不同的半导体材料和其间的自旋极化铁磁材料。 半导体材料可以具有不同的结晶结构,例如,第一材料可以是多晶或非晶硅,第二材料可以是单晶硅。 当穿过自旋极化铁磁材料并注入到第二半导体材料中时,电荷载体是自旋极化的。 第一半导体和铁磁材料之间的肖特基势垒高度大于铁磁和第二半导体材料之间的第二肖特基势垒高度。 自旋注入装置可以是自旋场效应晶体管的源。
    • 2. 发明申请
    • SPIN INJECTION DEVICE HAVING SEMICONDUCTOR-FERROMAGNETIC-SEMICONDUCTOR STRUCTURE AND SPIN TRANSISTOR
    • 具有半导体 - 半导体结构和旋转晶体管的旋转注入装置
    • US20120112189A1
    • 2012-05-10
    • US13350591
    • 2012-01-13
    • Ya-Hong Xie
    • Ya-Hong Xie
    • H01L29/78
    • H01L29/66984Y10S977/935
    • A spin injection device and spin transistor including a spin injection device. A spin injection device includes different semiconductor materials and a spin-polarizing ferromagnetic material there between. The semiconductor materials may have different crystalline structures, e.g., a first material can be polycrystalline or amorphous silicon, and a second material can be single crystalline silicon. Charge carriers are spin-polarized when the traverse the spin-polarizing ferromagnetic material and injected into the second semiconductor material. A Schottky barrier height between the first semiconductor and ferromagnetic materials is larger than a second Schottky barrier height between the ferromagnetic and second semiconductor materials. A spin injection device may be a source of a spin field effect transistor.
    • 一种自旋注入装置和包括自旋注入装置的自旋晶体管。 自旋注入装置包括不同的半导体材料和其间的自旋极化铁磁材料。 半导体材料可以具有不同的结晶结构,例如,第一材料可以是多晶或非晶硅,第二材料可以是单晶硅。 当穿过自旋极化铁磁材料并注入到第二半导体材料中时,电荷载体是自旋极化的。 第一半导体和铁磁材料之间的肖特基势垒高度大于铁磁和第二半导体材料之间的第二肖特基势垒高度。 自旋注入装置可以是自旋场效应晶体管的源。
    • 4. 发明申请
    • SPIN INJECTION DEVICE HAVING SEMICONDUCTOR-FERROMAGNETIC-SEMICONDUCTOR STRUCTURE AND SPIN TRANSISTOR
    • 具有半导体 - 半导体结构和旋转晶体管的旋转注入装置
    • US20100102319A1
    • 2010-04-29
    • US12307741
    • 2007-06-29
    • Ya-Hong Xie
    • Ya-Hong Xie
    • H01L29/04H01L29/78
    • H01L29/66984Y10S977/935
    • A spin injection device and spin transistor including a spin injection device. A spin injection device includes different semiconductor materials and a spin-polarizing ferromagnetic material there between. The semiconductor materials may have different crystalline structures, e.g., a first material can be polycrystalline or amorphous silicon, and a second material can be single crystalline silicon. Charge carriers are spin-polarized when the traverse the spin-polarizing ferromagnetic material and injected into the second semiconductor material. A Schottky barrier height between the first semiconductor and ferromagnetic materials is larger than a second Schottky barrier height between the ferromagnetic and second semiconductor materials. A spin injection device may be a source of a spin field effect transistor.
    • 一种自旋注入装置和包括自旋注入装置的自旋晶体管。 自旋注入装置包括不同的半导体材料和其间的自旋极化铁磁材料。 半导体材料可以具有不同的结晶结构,例如,第一材料可以是多晶或非晶硅,第二材料可以是单晶硅。 当穿过自旋极化铁磁材料并注入到第二半导体材料中时,电荷载体是自旋极化的。 第一半导体和铁磁材料之间的肖特基势垒高度大于铁磁和第二半导体材料之间的第二肖特基势垒高度。 自旋注入装置可以是自旋场效应晶体管的源。
    • 6. 发明申请
    • PHASE CHANGE MEMORY DEVICE AND METHOD OF MAKING SAME
    • 相变存储器件及其制造方法
    • US20070052009A1
    • 2007-03-08
    • US11470216
    • 2006-09-05
    • Ya-Hong XieTae-Sik YoonZuoming Zhao
    • Ya-Hong XieTae-Sik YoonZuoming Zhao
    • H01L29/788
    • H01L45/143H01L27/2436H01L45/06H01L45/1233H01L45/1246H01L45/144H01L45/1666H01L45/1683
    • A phase change random access memory (PRAM) element is provided that is driven by a MOSFET. The MOSFET includes, for example, a source region, a drain region, and a gate electrode disposed between the source region and the drain region. An insulator layer (e.g., oxide layer) separates the gate electrode from contact with the region of the substrate between the source and drain regions. A first electrode contact is coupled to the drain region of the MOSFET at one end and terminates at a surface. The surface of the first electrode contact is coated with a phase change material. A second electrode contact is provided having a surface coated with a layer of phase change material. The PRAM element includes at least one columnar member formed from a phase change material interposed between the phase change material layer of the first electrode and phase change material layer of the second electrode. In certain embodiments, a plurality of columnar members are interposed between the upper and lower layers of phase change material. Each of the columnar members are separated from one another via an insulator material.
    • 提供由MOSFET驱动的相变随机存取存储器(PRAM)元件。 MOSFET包括例如源极区域,漏极区域和设置在源极区域和漏极区域之间的栅极电极。 绝缘体层(例如,氧化物层)将栅电极与源极和漏极区之间的衬底区域接触。 第一电极触点在一端耦合到MOSFET的漏极区域并终止于表面。 第一电极接触面的表面涂有相变材料。 提供具有涂覆有相变材料层的表面的第二电极接触。 PRAM元件包括至少一个由相变材料形成的柱状构件,该相变材料插入在第一电极的相变材料层和第二电极的相变材料层之间。 在某些实施例中,多个柱状构件插入在相变材料的上层和下层之间。 每个柱状构件通过绝缘体材料彼此分离。
    • 7. 发明申请
    • Method for producing dislocation-free strained crystalline films
    • 无位错应变结晶膜的制备方法
    • US20060292822A1
    • 2006-12-28
    • US11168171
    • 2005-06-27
    • Ya-Hong Xie
    • Ya-Hong Xie
    • H01L21/30
    • H01L21/76254H01L21/187
    • A method for forming dislocation-free strained silicon thin film includes the step of providing two curved silicon substrates. One substrate is curved by the presence of silicon dioxide on a back surface. The other substrate is curved by the presence of a silicon nitride layer. One of the substrates is subject to hydrogen implantation and the two substrates are bonded to one another in an annealing process. The two substrates are separated, thereby leaving a layer of strained silicon on a front side of one of the substrates. A back side layer of silicon dioxide or silicon nitride is then removed to restore the substrate to a substantially planar state. The method may be employed to form dislocation-free strained silicon thin films. The films may be under tensile or compressive strain.
    • 用于形成无位错的应变硅薄膜的方法包括提供两个弯曲的硅衬底的步骤。 一个衬底由背面上二氧化硅的存在而弯曲。 另一个衬底由于存在氮化硅层而弯曲。 其中一个衬底经受氢注入,并且两个衬底在退火过程中彼此结合。 两个基板被分离,从而在一个基板的正面上留下一层应变硅。 然后去除二氧化硅或氮化硅的背面层,以使基板恢复到基本平坦的状态。 该方法可用于形成无位错的应变硅薄膜。 膜可能处于拉伸或压缩应变状态。
    • 9. 发明申请
    • Low crosstalk substrate for mixed-signal integrated circuits
    • 用于混合信号集成电路的低串扰基板
    • US20060255425A1
    • 2006-11-16
    • US11402209
    • 2006-04-10
    • Ya-Hong Xie
    • Ya-Hong Xie
    • H01L29/00
    • H01L27/1203H01L21/84H01L23/142H01L23/3736H01L23/552H01L23/645H01L23/66H01L29/78603H01L2223/6688H01L2924/0002H01L2924/19105H01L2924/3011H01L2924/00
    • An integrated circuit laminate with a metal substrate for use with high performance mixed signal integrated circuit applications. The metal substrate provides substantially improved crosstalk isolation, enhanced heat sinking and an easy access to a true low impedance ground. In one embodiment, the metal layer has regions with insulation filled channels or voids and a layer of insulator such as unoxidized porous silicon disposed between the metal substrate and a silicon integrated circuit layer. The laminate also has a plurality of metal walls or trenches mounted to the metal substrate and transacting the silicon and insulation layers thereby isolating noise sensitive elements from noise producing elements on the chip. In another embodiment, the laminate is mounted to a flexible base to limit the flexion of the chip.
    • 具有金属基板的集成电路层压板,用于与高性能混合信号集成电路应用。 金属基板提供了显着改进的串扰隔离,增强的散热和容易接近真正的低阻抗地。 在一个实施例中,金属层具有绝缘填充通道或空隙的区域以及设置在金属基板和硅集成电路层之间的诸如未氧化的多孔硅之类的绝缘体层。 层压板还具有安装到金属基底上的多个金属壁或沟槽,并且交互硅和绝缘层,从而将噪声敏感元件与芯片上产生噪声的元件隔离。 在另一个实施例中,层压板安装到柔性基座以限制芯片的弯曲。
    • 10. 发明授权
    • Method and apparatus for controlling nucleation in self-assembled films
    • 用于控制自组装膜中成核的方法和装置
    • US07118784B1
    • 2006-10-10
    • US11168266
    • 2005-06-27
    • Ya-Hong Xie
    • Ya-Hong Xie
    • B05D3/02
    • B05D3/0218B05D1/185B05D1/208B05D3/0254B05D3/10B82Y30/00B82Y40/00G03F7/0002Y10T156/17
    • A method of forming a self-assembled film with periodic nanometer dimension features (e.g., holes) on a substrate includes the steps of providing film precursors on the substrate, wherein the film precursors are maintained in an amorphous state. Where the film precursors are block copolymers, a heating member is provided. The substrate and the heating member are then moved relative to one another so as to raise the temperature of a portion of the film precursor on the substrate above its glass transition temperature. Relative movement between the substrate and heating member continues until a self-assembled crystalline film is formed over the surface of the substrate. In an alternative embodiment, a pH dispensing member is provided to dispense a pH adjusting agent onto the substrate that promotes self-assembly of a crystalline film.
    • 在衬底上形成具有周期性纳米尺寸特征(例如,孔)的自组装膜的方法包括在衬底上提供膜前体的步骤,其中膜前体保持在非晶状态。 当膜前体是嵌段共聚物时,提供加热构件。 然后使衬底和加热构件相对于彼此移动,以便将衬底上的膜前体的一部分的温度升高到其玻璃化转变温度以上。 基板和加热部件之间的相对运动继续进行,直到在基板的表面上形成自组装的晶体膜。 在替代实施例中,提供pH分配构件以将pH调节剂分配到促进结晶膜自组装的衬底上。