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1. 发明授权

US07450418B2 Non-volatile memory and operating method thereof 有权
标题翻译：非易失性存储器及其操作方法
公开(公告)号：US07450418B2
公开(公告)日：2008-11-11
申请号：US11403437
申请日：2006-04-12
申请人： Hong-Yi Liao , Wu-Chang Chang , Ching-Yuan Lin
发明人： Hong-Yi Liao , Wu-Chang Chang , Ching-Yuan Lin
IPC分类号： G11C11/34
CPC分类号： G11C16/0416 , G11C16/0433 , H01L27/115 , H01L27/11568
摘要： An operating method of a non-volatile memory is provided. The non-volatile memory includes plural memory cells. Each memory cell includes a charge storage structure, a gate, and a source and a drain disposed in the well on the both sides of the gate. During an erasing operation, a first voltage is applied to the source of the selected memory cell, a second voltage is applied to the gate of each selected memory cell, and a third voltage is applied to the well; and the drain of the selected memory cell is floated, so that the selected memory cell is erased. In the meantime, the fourth voltage is applied to the drain of each unselected memory cell, the fifth voltage is applied to the gate of the unselected memory cell, and the source of the unselected memory cell is floated to prevent the unselected memory cell from being erased.
摘要翻译：提供了一种非易失性存储器的操作方法。非易失性存储器包括多个存储单元。每个存储单元包括电荷存储结构，栅极以及设置在栅极两侧的阱中的源极和漏极。在擦除操作期间，将第一电压施加到所选择的存储单元的源极，将第二电压施加到每个选择的存储单元的栅极，并将第三电压施加到阱; 并且所选择的存储单元的漏极浮动，使得所选存储单元被擦除。同时，将第四电压施加到每个未选择的存储单元的漏极，第五电压被施加到未选择的存储单元的栅极，并且未选择的存储单元的源被浮置以防止未选择的存储单元擦除

2. 发明申请

US20060061410A1 Charge pump circuit 有权
标题翻译：电荷泵电路
公开(公告)号：US20060061410A1
公开(公告)日：2006-03-23
申请号：US10947677
申请日：2004-09-23
申请人： Liang-Hsiang Chiu , Wu-Chang Chang
发明人： Liang-Hsiang Chiu , Wu-Chang Chang
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , H02M2003/075 , H03K2217/0018
摘要： A charge pump circuit has an input stage, an output stage and multiple boosting stages coupled between the input stage and the output stage. The boosting stages are driven by four phase clock signals. Each boosting stage has two branch charge pumps, wherein each branch charge pump at least has a main pass transistor, a pre-charge transistor, two substrate transistors and capacitors. The substrate transistors and the main pass transistor are operated in association with the four phase clock signals to keep a potential of the body of the main pass transistors at a low level thus mitigating the body effect.
摘要翻译：电荷泵电路具有输入级，输出级和耦合在输入级和输出级之间的多级升压级。升压级由四相时钟信号驱动。每个升压级具有两个分支电荷泵，其中每个分支电荷泵至少具有主传输晶体管，预充电晶体管，两个基板晶体管和电容器。衬底晶体管和主通道晶体管与四个相位时钟信号相关联地操作，以将主通道晶体管的主体的电位保持在低水平，从而减轻身体效应。

3. 发明授权

US07576593B2 Two-phase charge pump circuit without body effect 有权
标题翻译：两相电荷泵电路无体效应
公开(公告)号：US07576593B2
公开(公告)日：2009-08-18
申请号：US12222811
申请日：2008-08-18
申请人： Wu-Chang Chang , Yin-Chang Chen
发明人： Wu-Chang Chang , Yin-Chang Chen
IPC分类号： G05F1/10 , G05F3/02
CPC分类号： H02M3/073 , H02M2003/078
摘要： A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is connected to an NMOS switch. The body of each PMOS transistor is connected to a PMOS switch. By providing an appropriate driving signal to each NMOS or PMOS switch, the body of each NMOS transistor can be switched to a lower voltage level and the body of each PMOS transistor is switched to a higher voltage level. This can prevent the body effect from occurring.
摘要翻译：没有体效应的两相电荷泵电路包括升压级，连接到升压级的输入级和连接到输入级的高压发生器。每个电路可以由NMOS或PMOS晶体管组成。每个NMOS晶体管的主体连接到NMOS开关。每个PMOS晶体管的主体连接到PMOS开关。通过向每个NMOS或PMOS开关提供适当的驱动信号，每个NMOS晶体管的主体可以被切换到较低的电压电平，并且每个PMOS晶体管的主体被切换到更高的电压电平。这可以防止身体的影响发生。

4. 发明申请

US20070242523A1 Non-volatile memory and operating method thereof 有权
标题翻译：非易失性存储器及其操作方法
公开(公告)号：US20070242523A1
公开(公告)日：2007-10-18
申请号：US11403437
申请日：2006-04-12
申请人： Hong-Yi Liao , Wu-Chang Chang , Ching-Yuan Lin
发明人： Hong-Yi Liao , Wu-Chang Chang , Ching-Yuan Lin
IPC分类号： G11C16/04
CPC分类号： G11C16/0416 , G11C16/0433 , H01L27/115 , H01L27/11568
摘要： An operating method of a non-volatile memory is provided. The non-volatile memory includes plural memory cells. Each memory cell includes a charge storage structure, a gate, and a source and a drain disposed in the well on the both sides of the gate. During an erasing operation, a first voltage is applied to the source of the selected memory cell, a second voltage is applied to the gate of each selected memory cell, and a third voltage is applied to the well; and the drain of the selected memory cell is floated, so that the selected memory cell is erased. In the meantime, the fourth voltage is applied to the drain of each unselected memory cell, the fifth voltage is applied to the gate of the unselected memory cell, and the source of the unselected memory cell is floated to prevent the unselected memory cell from being erased.
摘要翻译：提供了一种非易失性存储器的操作方法。非易失性存储器包括多个存储单元。每个存储单元包括电荷存储结构，栅极以及设置在栅极两侧的阱中的源极和漏极。在擦除操作期间，将第一电压施加到所选择的存储单元的源极，将第二电压施加到每个选择的存储单元的栅极，并将第三电压施加到阱; 并且所选择的存储单元的漏极浮动，使得所选存储单元被擦除。同时，将第四电压施加到每个未选择的存储单元的漏极，第五电压被施加到未选择的存储单元的栅极，并且未选择的存储单元的源被浮置以防止未选择的存储单元擦除

5. 发明授权

US07123077B2 Four-phase charge pump circuit with reduced body effect 有权
标题翻译：四相电荷泵电路具有减少的身体效应
公开(公告)号：US07123077B2
公开(公告)日：2006-10-17
申请号：US10947677
申请日：2004-09-23
申请人： Liang-Hsiang Chiu , Wu-Chang Chang
发明人： Liang-Hsiang Chiu , Wu-Chang Chang
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , H02M2003/075 , H03K2217/0018
摘要： A charge pump circuit has an input stage, an output stage and multiple boosting stages coupled between the input stage and the output stage. The boosting stages are driven by four phase clock signals. Each boosting stage has two branch charge pumps, wherein each branch charge pump at least has a main pass transistor, a pre-charge transistor, two substrate transistors and capacitors. The substrate transistors and the main pass transistor are operated in association with the four phase clock signals to keep a potential of the body of the main pass transistors at a low level thus mitigating the body effect.
摘要翻译：电荷泵电路具有输入级，输出级和耦合在输入级和输出级之间的多级升压级。升压级由四相时钟信号驱动。每个升压级具有两个分支电荷泵，其中每个分支电荷泵至少具有主传输晶体管，预充电晶体管，两个基板晶体管和电容器。衬底晶体管和主通道晶体管与四个相位时钟信号相关联地操作，以将主通道晶体管的主体的电位保持在低水平，从而减轻身体效应。

6. 发明申请

US20080309399A1 Two-phase charge pump circuit without body effect 有权
标题翻译：两相电荷泵电路无体效应
公开(公告)号：US20080309399A1
公开(公告)日：2008-12-18
申请号：US12222811
申请日：2008-08-18
申请人： Wu-Chang Chang , Yin-Chang Chen
发明人： Wu-Chang Chang , Yin-Chang Chen
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , H02M2003/078
摘要： A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is connected to an NMOS switch. The body of each PMOS transistor is connected to a PMOS switch. By providing an appropriate driving signal to each NMOS or PMOS switch, the body of each NMOS transistor can be switched to a lower voltage level and the body of each PMOS transistor is switched to a higher voltage level. This can prevent the body effect from occurring.
摘要翻译：没有体效应的两相电荷泵电路包括升压级，连接到升压级的输入级和连接到输入级的高压发生器。每个电路可以由NMOS或PMOS晶体管组成。每个NMOS晶体管的主体连接到NMOS开关。每个PMOS晶体管的主体连接到PMOS开关。通过向每个NMOS或PMOS开关提供适当的驱动信号，每个NMOS晶体管的主体可以被切换到较低的电压电平，并且每个PMOS晶体管的主体被切换到更高的电压电平。这可以防止身体的影响发生。

7. 发明申请

US20080246536A1 Two-phase charge pump circuit without body effect 审中-公开
公开(公告)号：US20080246536A1
公开(公告)日：2008-10-09
申请号：US11730955
申请日：2007-04-05
申请人： Wu-Chang Chang , Yin-Chang Chen
发明人： Wu-Chang Chang , Yin-Chang Chen
IPC分类号： G05F3/02
CPC分类号： H02M3/073 , H02M2003/078
摘要： A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is connected to an NMOS switch. The body of each PMOS transistor is connected to a PMOS switch. By providing an appropriate driving signal to each NMOS or PMOS switch, the body of each NMOS transistor can be switched to a lower voltage level and the body of each PMOS transistor is switched to a higher voltage level. This can prevent the body effect from occurring.

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