专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110024919A1 WIRING SUBSTRATE FOR A SEMICONDUCTOR CHIP AND SEMICONDUCTOR PACKAGE HAVING THE WIRING SUBSTRATE 审中-公开
标题翻译：具有导线基板的半导体芯片和半导体封装的配线基板
公开(公告)号：US20110024919A1
公开(公告)日：2011-02-03
申请号：US12841310
申请日：2010-07-22
申请人： Tae-Gyu Kang , Wha-Su Sin , Jun-Soo Han
发明人： Tae-Gyu Kang , Wha-Su Sin , Jun-Soo Han
IPC分类号： H01L23/488 , H05K1/18
CPC分类号： H05K1/111 , H01L23/13 , H01L23/49838 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/32225 , H01L2224/4809 , H01L2224/48091 , H01L2224/48108 , H01L2224/4824 , H01L2224/48465 , H01L2224/49171 , H01L2224/73215 , H01L2924/00014 , H01L2924/01006 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10161 , H01L2924/10253 , H05K2201/09381 , H05K2201/094 , H05K2201/09709 , H05K2203/049 , Y02P70/611 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/85399 , H01L2224/05599
摘要： A wiring substrate for a semiconductor chip includes a substrate having a first face and a second face opposite to the first face. The substrate has a window from the first face to the second face that exposes chip pads of a semiconductor chip adherable to the first face. A first bonding pad is arranged on the second face along a side portion of the window. The first bonding pad is connected to a bonding wire drawn from the chip pad through the window at a predetermined angle with respect to the side portion. A second bonding pad is adjacent to the first bonding pad on the second face. The second bonding pad includes an end portion having an inclined side portion at an angle corresponding to the drawn angle of the first bonding wire for avoiding an overlap of the second bonding pad with the first bonding wire.
摘要翻译：用于半导体芯片的布线基板包括具有与第一面相对的第一面和第二面的基板。衬底具有从第一面到第二面的窗口，其暴露可粘附到第一面的半导体芯片的芯片焊盘。第一接合焊盘沿着窗口的侧部布置在第二面上。第一接合焊盘通过窗口以相对于侧部以预定角度从芯片焊盘拉出的接合线连接。第二接合焊盘与第二面上的第一接合焊盘相邻。所述第二接合焊盘包括端部，所述端部具有与所述第一接合线的拉拔角度对应的倾斜侧部，以避免所述第二接合焊盘与所述第一接合线的重叠。

2. 发明授权

US07713788B2 Method of manufacturing semiconductor package using redistribution substrate 有权
标题翻译：使用再分布基板制造半导体封装的方法
公开(公告)号：US07713788B2
公开(公告)日：2010-05-11
申请号：US12197067
申请日：2008-08-22
申请人： Jun-Young Ko , Dae-Sang Chan , Heui-Seog Kim , Wha-Su Sin , Jae-Yong Park
发明人： Jun-Young Ko , Dae-Sang Chan , Heui-Seog Kim , Wha-Su Sin , Jae-Yong Park
IPC分类号： H01L21/44
CPC分类号： H01L23/3128 , H01L23/49833 , H01L23/5389 , H01L24/24 , H01L25/0657 , H01L2224/24226 , H01L2224/82039 , H01L2225/06527 , H01L2225/06541 , H01L2225/06582 , H01L2924/01029 , H01L2924/01033 , H01L2924/15311
摘要： An inexpensive method of manufacturing a semiconductor package using a redistribution substrate that is relatively thin. The method includes: attaching a semiconductor chip to a redistribution substrate; attaching the redistribution substrate to which the semiconductor chip is attached to a printed circuit board; removing a support substrate of the redistribution substrate; forming via holes to expose a bond pad of the semiconductor chip and a bond finger of the printed circuit board; and filling the via holes with a conductive material. Meanwhile, a redistribution substrate to which at least one other semiconductor chip may be mounted on the redistribution substrate.
摘要翻译：使用相对薄的再分布基板制造半导体封装的廉价方法。该方法包括：将半导体芯片附接到再分布基板; 将安装有半导体芯片的再分布基板附着到印刷电路板上; 去除所述再分布基板的支撑基板; 形成通孔以暴露所述半导体芯片的接合焊盘和所述印刷电路板的接合指状物; 并用导电材料填充通孔。同时，可以将至少一个其它半导体芯片安装在再分布基板上的再分布基板。

3. 发明授权

US07696615B2 Semiconductor device having pillar-shaped terminal 有权
标题翻译：具有柱状端子的半导体器件
公开(公告)号：US07696615B2
公开(公告)日：2010-04-13
申请号：US11776497
申请日：2007-07-11
申请人： Jun-Young Ko , Dae-Sang Chan , Wha-Su Sin
发明人： Jun-Young Ko , Dae-Sang Chan , Wha-Su Sin
IPC分类号： H01L23/02 , H01L23/34 , H01L23/48 , H01L23/52 , H01L29/40 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L25/0657 , H01L23/49838 , H01L24/16 , H01L24/24 , H01L24/82 , H01L2224/13022 , H01L2224/16 , H01L2224/24011 , H01L2224/2518 , H01L2225/06513 , H01L2225/06517 , H01L2225/06524 , H01L2225/06527 , H01L2225/06541 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/00
摘要： A semiconductor device and a method of forming the same are provided. A semiconductor chip included in the semiconductor device includes a pillar-shaped terminal and a pad-shaped terminal in a terminal region. The pillar-shaped terminal is exposed at a first surface of a chip substrate in the terminal region and the pad-shaped terminal is exposed at a second surface of the chip substrate in the terminal region, where the first surface and the second surface of the chip substrate in the terminal region face oppositely from each other.
摘要翻译：提供半导体器件及其形成方法。包括在半导体器件中的半导体芯片包括在端子区域中的柱状端子和衬垫形端子。柱状端子在端子区域中的芯片基板的第一表面处露出，并且在端子区域中的衬底基板的第二表面处露出垫状端子，其中第一表面和第二表面端子区域中的芯片衬底彼此相对地面对。

4. 发明申请

US20090200362A1 METHOD OF MANUFACTURING A SEMICONDUCTOR PACKAGE 审中-公开
标题翻译：制造半导体封装的方法
公开(公告)号：US20090200362A1
公开(公告)日：2009-08-13
申请号：US12369257
申请日：2009-02-11
申请人： Ky-Hyun JUNG , Jae-Yong Park , Heui-Seog Kim , Wha-Su Sin , Jung-Hyeon Kim
发明人： Ky-Hyun JUNG , Jae-Yong Park , Heui-Seog Kim , Wha-Su Sin , Jung-Hyeon Kim
IPC分类号： B23K31/02 , B23K1/20
CPC分类号： B23K1/0016 , B23K1/0053 , B23K1/008 , B23K1/206 , B23K2101/42 , H01L23/49816 , H01L24/13 , H01L24/16 , H01L25/105 , H01L2224/05568 , H01L2224/05573 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01077 , H01L2924/01079 , H01L2924/01327 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/19041 , H01L2924/19043 , H01L2924/3651 , H05K3/3436 , H05K3/3463 , H05K2201/10734 , H01L2224/05599
摘要： In a lead-free solder, a semiconductor package and a method of manufacturing the semiconductor package, the lead-free solder includes about 3.5 percent by weight to about 6 percent by weight of silver, about 0.05 percent by weight to about 0.5 percent by weight of copper and a remainder of tin. The lead-free solder is employed in the semiconductor package. The lead-free solder has high impact resistance and high heat resistance to reduce failures of the semiconductor package.
摘要翻译：在无铅焊料，半导体封装和半导体封装的制造方法中，无铅焊料包括约3.5重量％至约6重量％的银，约0.05重量％至约0.5重量％的铜和余下的锡。在半导体封装中采用无铅焊料。无铅焊料具有高抗冲击性和高耐热性，以减少半导体封装的故障。

5. 发明申请

US20090053858A1 METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE USING REDISTRIBUTION SUBSTRATE 有权
标题翻译：使用重分配衬底制造半导体封装的方法
公开(公告)号：US20090053858A1
公开(公告)日：2009-02-26
申请号：US12197067
申请日：2008-08-22
申请人： Jun-Young KO , Dae-Sang CHAN , Heui-Seog KIM , Wha-Su SIN , Jae-Yong PARK
发明人： Jun-Young KO , Dae-Sang CHAN , Heui-Seog KIM , Wha-Su SIN , Jae-Yong PARK
IPC分类号： H01L21/50
CPC分类号： H01L23/3128 , H01L23/49833 , H01L23/5389 , H01L24/24 , H01L25/0657 , H01L2224/24226 , H01L2224/82039 , H01L2225/06527 , H01L2225/06541 , H01L2225/06582 , H01L2924/01029 , H01L2924/01033 , H01L2924/15311
摘要： An inexpensive method of manufacturing a semiconductor package using a redistribution substrate that is relatively thin. The method includes: attaching a semiconductor chip to a redistribution substrate; attaching the redistribution substrate to which the semiconductor chip is attached to a printed circuit board; removing a support substrate of the redistribution substrate; forming via holes to expose a bond pad of the semiconductor chip and a bond finger of the printed circuit board; and filling the via holes with a conductive material. Meanwhile, a redistribution substrate to which at least one other semiconductor chip may be mounted on the redistribution substrate.
摘要翻译：使用相对薄的再分布基板制造半导体封装的廉价方法。该方法包括：将半导体芯片附接到再分布基板; 将附着有半导体芯片的再分布基板安装到印刷电路板上; 去除所述再分布基板的支撑基板; 形成通孔以暴露所述半导体芯片的接合焊盘和所述印刷电路板的接合指状物; 并用导电材料填充通孔。同时，可以将至少一个其它半导体芯片安装在再分布基板上的再分布基板。

6. 发明申请

US20080251949A1 Molding apparatus, molded semiconductor package using multi-layered film, fabricating and molding method for fabricating the same 审中-公开
标题翻译：成型装置，使用多层膜的模制半导体封装，其制造和模制方法
公开(公告)号：US20080251949A1
公开(公告)日：2008-10-16
申请号：US12078801
申请日：2008-04-04
申请人： Wha-Su Sin , Heui-Seog Kim , Jong-Keun Jeon
发明人： Wha-Su Sin , Heui-Seog Kim , Jong-Keun Jeon
IPC分类号： H01L21/56 , H01L21/67 , H01L23/28
CPC分类号： H01L23/3128 , H01L21/566 , H01L23/544 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2223/54406 , H01L2223/54486 , H01L2224/32225 , H01L2224/45139 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/01014 , H01L2924/01079 , H01L2924/10253 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Example embodiments include molding apparatuses, semiconductor packages, a fabricating methods for fabricating the same. The molding apparatus may include a first mold die for adhering a partially completed package, a second mold die including a cavity formed such that the partially completed package is positioned inside the cavity and a molding resin for encapsulating the partially completed package inserted into the cavity, and a multi-layered film supply unit for supplying a multi-layered film to the cavity of the second mold die. The semiconductor package may include a substrate, a semiconductor chip electrically connected to the substrate, a molding resin for encapsulating the semiconductor chip and an electrical portion of the substrate, and a marking film, adhered to an outer surface of the molding resin such that a mark is marked in the marking film.
摘要翻译：示例性实施例包括模制设备，半导体封装，其制造方法。模制装置可以包括用于粘附部分完成的包装的第一模具模具，包括形成为使得部分完成的包装件位于空腔内部的空腔的第二模具模具和用于封装插入到模腔中的部分完成的包装的模制树脂，以及用于将多层膜供应到第二模具模具的空腔的多层膜供给单元。半导体封装可以包括基板，与基板电连接的半导体芯片，用于封装半导体芯片的模制树脂和基板的电气部分，以及附着到模制树脂的外表面上的标记膜，使得标记被标记在标记胶片中。

7. 发明授权

US07863161B2 Method of cutting a wafer 有权
标题翻译：切割晶片的方法
公开(公告)号：US07863161B2
公开(公告)日：2011-01-04
申请号：US12138646
申请日：2008-06-13
申请人： Dae-Sang Chan , Jun-Young Ko , Wha-Su Sin , Jae-Yong Park
发明人： Dae-Sang Chan , Jun-Young Ko , Wha-Su Sin , Jae-Yong Park
IPC分类号： H01L21/00
CPC分类号： H01L21/78
摘要： In a method of cutting a wafer, a supporting member is attached to an upper surface of the wafer on which semiconductor chips are formed. An opening is formed at a lower surface of the wafer along a scribe lane of the wafer. The lower surface of the wafer may be plasma-etched to reduce a thickness of the wafer. A tensile tape may be attached to the lower surface of the wafer. Here, the tensile tape includes sequentially stacked tensile films having different tensile modules. The supporting member is then removed. The tensile tape is cooled to increase the tensile modules between the tensile films. The tensile tape is tensed until the tensile films are cut using the tensile modules difference to separate the tensile tape from the semiconductor chips. Thus, the lower surface of the wafer may be plasma-etched without using an etching mask.
摘要翻译：在切割晶片的方法中，支撑构件附接到其上形成有半导体芯片的晶片的上表面。在晶片的下表面沿着晶片的划线通道形成开口。可以等离子体蚀刻晶片的下表面以减小晶片的厚度。拉伸带可以附接到晶片的下表面。这里，拉伸带包括具有不同拉伸模块的顺序堆叠的拉伸膜。然后移除支撑构件。拉伸带被冷却以增加拉伸膜之间的拉伸模块。将拉伸带拉紧直到使用拉伸模块差来切割拉伸膜，以将拉伸带与半导体芯片分离。因此，可以不使用蚀刻掩模来等离子体蚀刻晶片的下表面。

8. 发明申请

US20090278249A1 Printed circuit board and method thereof and a solder ball land and method thereof 有权
标题翻译：印刷电路板及其方法和焊球地及其方法
公开(公告)号：US20090278249A1
公开(公告)日：2009-11-12
申请号：US12458429
申请日：2009-07-13
申请人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
发明人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
IPC分类号： H01L23/498 , H05K1/11 , H01B5/00
CPC分类号： H05K3/282 , H01L21/4853 , H01L23/49816 , H01L23/49838 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05548 , H01L2224/05567 , H01L2224/16503 , H01L2224/32057 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83102 , H01L2224/83385 , H01L2224/92125 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H05K3/243 , H05K3/3457 , H05K2201/0391 , H05K2201/0989 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance. A second example method may include first treating a solder ball land to increase a first type of resistance and second treating the solder ball land to increase a second type of resistance other than the first type of resistance.
摘要翻译：一种印刷电路板及其方法和焊球地及其方法。示例性印刷电路板（PCB）可以包括具有构造成用于第一类型电阻的第一表面处理部分的第一焊球焊盘和具有被配置为用于第二类型电阻的第二表面处理部分的第二焊球焊盘。示例性焊球焊盘可以包括被配置为用于第一类型电阻的第一表面处理部分和被配置用于第二类型电阻的第二表面处理部分。第一示例性方法可以包括首先处理第一焊球焊盘的第一表面以增加第一类型的电阻，并且第二处理第二焊球焊盘的第二表面以增加除第一类型电阻之外的第二类型的电阻。第二示例性方法可以包括首先处理焊球焊盘以增加第一类型的电阻，并且第二次处理焊球焊盘以增加除第一类型电阻之外的第二类型的电阻。

9. 发明授权

US07576438B2 Printed circuit board and method thereof and a solder ball land and method thereof 有权
公开(公告)号：US07576438B2
公开(公告)日：2009-08-18
申请号：US11486064
申请日：2006-07-14
申请人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
发明人： Ky-hyun Jung , Heui-seog Kim , Sang-jun Kim , Wha-su Sin , Ho-geon Song , Jun-young Ko
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H05K3/282 , H01L21/4853 , H01L23/49816 , H01L23/49838 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05001 , H01L2224/05008 , H01L2224/05548 , H01L2224/05567 , H01L2224/16503 , H01L2224/32057 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83102 , H01L2224/83385 , H01L2224/92125 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H05K3/243 , H05K3/3457 , H05K2201/0391 , H05K2201/0989 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board and method thereof and a solder ball land and method thereof. The example printed circuit board (PCB) may include a first solder ball land having a first surface treatment portion configured for a first type of resistance and a second solder ball land having a second surface treatment portion configured for a second type of resistance. The example solder ball land may include a first surface treatment portion configured for a first type of resistance and a second surface treatment portion configured for a second type of resistance. A first example method may include first treating a first surface of a first solder ball land to increase a first type of resistance and second treating a second surface of a second solder ball land to increase a second type of resistance other than the first type of resistance. A second example method may include first treating a solder ball land to increase a first type of resistance and second treating the solder ball land to increase a second type of resistance other than the first type of resistance.

10. 发明申请

US20080311727A1 METHOD OF CUTTING A WAFER 有权
标题翻译：切割方法
公开(公告)号：US20080311727A1
公开(公告)日：2008-12-18
申请号：US12138646
申请日：2008-06-13
申请人： Dae-Sang CHAN , Jun-Young Ko , Wha-Su Sin , Jae-Yong Park
发明人： Dae-Sang CHAN , Jun-Young Ko , Wha-Su Sin , Jae-Yong Park
IPC分类号： H01L21/302
CPC分类号： H01L21/78
摘要： In a method of cutting a wafer, a supporting member is attached to an upper surface of the wafer on which semiconductor chips are formed. An opening is formed at a lower surface of the wafer along a scribe lane of the wafer. The lower surface of the wafer may be plasma-etched to reduce a thickness of the wafer. A tensile tape may be attached to the lower surface of the wafer. Here, the tensile tape includes sequentially stacked tensile films having different tensile modules. The supporting member is then removed. The tensile tape is cooled to increase the tensile modules between the tensile films. The tensile tape is tensed until the tensile films are cut using the tensile modules difference to separate the tensile tape from the semiconductor chips. Thus, the lower surface of the wafer may be plasma-etched without using an etching mask.
摘要翻译：在切割晶片的方法中，支撑构件附接到其上形成有半导体芯片的晶片的上表面。在晶片的下表面沿着晶片的划线通道形成开口。可以等离子体蚀刻晶片的下表面以减小晶片的厚度。拉伸带可以附接到晶片的下表面。这里，拉伸带包括具有不同拉伸模块的顺序堆叠的拉伸膜。然后移除支撑构件。拉伸带被冷却以增加拉伸膜之间的拉伸模块。将拉伸带拉紧直到使用拉伸模块差来切割拉伸膜，以将拉伸带与半导体芯片分离。因此，可以不使用蚀刻掩模来等离子体蚀刻晶片的下表面。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式