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1. 发明授权

US07049053B2 Supercritical carbon dioxide to reduce line edge roughness 失效
标题翻译：超临界二氧化碳减少线边缘粗糙度
公开(公告)号：US07049053B2
公开(公告)日：2006-05-23
申请号：US10458850
申请日：2003-06-11
申请人： Vijayakumar Ramachandrarao , Hyun-Mog Park , Subramanyam Iyer , Bob Turkot
发明人： Vijayakumar Ramachandrarao , Hyun-Mog Park , Subramanyam Iyer , Bob Turkot
IPC分类号： G03F7/00
CPC分类号： G03F7/168 , G03F7/40
摘要： Polymer aggregates in a photoresist layer may be dissolved or reduced in dimension by treatment with supercritical carbon dioxide. The supercritical carbon dioxide may be used before and/or after development of the photoresist. The SCCO2 treatment causes swelling of the photoresist and may allow polymer aggregates in the photoresist to be dissolved. Controlled release of the carbon dioxide de-swells the photoresist, resulting in reduced line edge roughness of openings in the photoresist and reduced resistance of metal lines formed in the openings.
摘要翻译：光致抗蚀剂层中的聚合物聚集体可以通过用超临界二氧化碳处理而溶解或减小尺寸。超临界二氧化碳可以在光致抗蚀剂显影之前和/或之后使用。 SCCO 2处理引起光致抗蚀剂的溶胀，并且可以使光致抗蚀剂中的聚合物聚集体溶解。二氧化碳的控制释放促使光致抗蚀剂膨胀，导致光致抗蚀剂中开口的线边缘粗糙度降低，并减少在开口中形成的金属线的电阻。

2. 发明申请

US20050054201A1 Filling small dimension vias using supercritical carbon dioxide 有权
标题翻译：使用超临界二氧化碳填充小尺寸通孔
公开(公告)号：US20050054201A1
公开(公告)日：2005-03-10
申请号：US10943634
申请日：2004-09-17
申请人： Vijayakumar Ramachandrarao , Robert Turkot
发明人： Vijayakumar Ramachandrarao , Robert Turkot
IPC分类号： H01L21/768 , H01L21/302 , H01L21/461
CPC分类号： H01L21/76808
摘要： Suitable particles may be deposited within an extremely small high-aspect ratio via by flowing the particles in a suspension using supercritical carbon dioxide. The particles may be made up of diblock copolymers or silesquioxane-based materials or oligomers of phobic homopolymers or pre-formed silica-based particles stabilized using diblock copolymers and may include chemical initiators to permit in situ polymerization within the via.
摘要翻译：通过使用超临界二氧化碳使悬浮液中的颗粒流动，可以将非常小的高纵横比通过沉积合适的颗粒。颗粒可以由二嵌段共聚物或倍半硅氧烷基材料或使用二嵌段共聚物稳定的疏水均聚物或预形成的二氧化硅基颗粒的低聚物组成，并且可以包括化学引发剂以允许通孔内原位聚合。

3. 发明申请

US20080000875A1 Aluminum incorporation in porous dielectric for improved mechanical properties of patterned dielectric 有权
公开(公告)号：US20080000875A1
公开(公告)日：2008-01-03
申请号：US11479519
申请日：2006-06-30
申请人： Vijayakumar Ramachandrarao , Grant Kloster
发明人： Vijayakumar Ramachandrarao , Grant Kloster
IPC分类号： B31D3/00 , C03C25/68
CPC分类号： C03C17/007 , C03C2217/425
摘要： A porous dielectric layer is formed on a substrate. Aluminum is incorporated in the porous dielectric layer with a pattern process using an Aluminum gas precursor. The incorporated Aluminum improves the mechanical properties of the porous dielectric layer.

4. 发明申请

US20060102204A1 Method for removing a residue from a substrate using supercritical carbon dioxide processing 审中-公开
标题翻译：使用超临界二氧化碳处理从底物中除去残余物的方法
公开(公告)号：US20060102204A1
公开(公告)日：2006-05-18
申请号：US10987594
申请日：2004-11-12
申请人： Gunilla Jacobson , Bentley Palmer , Shan Clark , Vijayakumar Ramachandrarao , Subramanyam Iyer , Robert Turkot
发明人： Gunilla Jacobson , Bentley Palmer , Shan Clark , Vijayakumar Ramachandrarao , Subramanyam Iyer , Robert Turkot
IPC分类号： C23G1/00 , B08B3/00
CPC分类号： B08B7/0021 , C23G5/00 , G03F7/427 , H01L21/02063 , H01L21/02101 , H01L21/31133
摘要： A method for cleaning a substrate containing a micro-feature having a residue thereon. The method includes treating the substrate with a supercritical carbon dioxide cleaning solution containing a peroxide to remove the residue from the micro-feature, where the supercritical carbon dioxide cleaning solution is maintained at a temperature between about 35° C. and about 80° C. According an embodiment of the invention, the supercritical carbon dioxide cleaning solution can further contain ozone. According to another embodiment of the invention, the substrate can be pre-treated with an ozone processing environment.
摘要翻译：一种清洗含有残留物的微特征的基材的方法。该方法包括用含有过氧化物的超临界二氧化碳清洗溶液处理底物以从微特征中除去残余物，其中超临界二氧化碳清洗溶液保持在约35℃至约80℃的温度。根据本发明的一个实施方案，超临界二氧化碳清洗溶液可以进一步含有臭氧。根据本发明的另一个实施例，可以用臭氧处理环境预处理衬底。

5. 发明申请

US20050221581A1 Wafer stacking using copper structures of substantially uniform height 有权
标题翻译：使用基本均匀高度的铜结构的晶片堆叠
公开(公告)号：US20050221581A1
公开(公告)日：2005-10-06
申请号：US10814498
申请日：2004-03-31
申请人： Vijayakumar RamachandraRao , Shriram Ramanathan
发明人： Vijayakumar RamachandraRao , Shriram Ramanathan
IPC分类号： H01L21/30 , H01L21/768 , H01L21/98 , H01L25/065
CPC分类号： H01L24/11 , H01L21/76885 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/81 , H01L24/94 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05572 , H01L2224/05647 , H01L2224/08148 , H01L2224/13147 , H01L2224/16148 , H01L2224/81013 , H01L2224/81801 , H01L2224/81895 , H01L2225/06513 , H01L2924/0002 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01072 , H01L2924/14 , H01L2924/00014 , H01L2924/00012 , H01L2224/05552
摘要： Wafer stacking employing substantially uniform copper structures is described herein.
摘要翻译：本文描述了采用基本均匀的铜结构的晶片堆叠。

6. 发明申请

US20070155161A1 Selective removal of sacrificial light absorbing material over porous dielectric 审中-公开
标题翻译：通过多孔介质选择性去除牺牲光吸收材料
公开(公告)号：US20070155161A1
公开(公告)日：2007-07-05
申请号：US11322898
申请日：2005-12-30
申请人： Vijayakumar Ramachandrarao , Kim-Khanh Ho
发明人： Vijayakumar Ramachandrarao , Kim-Khanh Ho
IPC分类号： H01L21/20 , H01L21/4763
CPC分类号： H01L21/31144 , H01L21/02063 , H01L21/31111 , H01L21/31138 , H01L21/76808
摘要： A method of forming a semiconductor device. The method comprises forming a conductive layer on a substrate, forming a porous dielectric layer on the conductive layer, and forming a first etched region by removing a first portion of the porous dielectric layer. The first etched region is then filled with a sacrificial light absorbing material. A layer of photoresist is then patterned to define a second region to be etched. A second region is then etched by removing part of the sacrificial light absorbing material and a second portion of the porous dielectric layer. The layer of photoresist is then removed. The remaining portions of the sacrificial light absorbing material is then removed selectively using an anhydrous solvent comprising fluoride and a solvent having molecules with at least one —OH group and three to six carbons, wherein the sacrificial light absorbing material is selectively removed over the porous dielectric layer.
摘要翻译：一种形成半导体器件的方法。该方法包括在衬底上形成导电层，在导电层上形成多孔介电层，并通过去除多孔电介质层的第一部分形成第一蚀刻区域。然后用牺牲光吸收材料填充第一蚀刻区域。然后将一层光致抗蚀剂图案化以限定待蚀刻的第二区域。然后通过去除部分牺牲光吸收材料和多孔介电层的第二部分来蚀刻第二区域。然后去除光致抗蚀剂层。然后使用包含氟化物和具有至少一个-OH基团和3-6个碳原子的分子的溶剂的无水溶剂选择性除去剩余部分的牺牲光吸收材料，其中牺牲光吸收材料在多孔电介质上选择性地除去层。

7. 发明授权

US07214605B2 Deposition of diffusion barrier 有权
标题翻译：沉积扩散屏障
公开(公告)号：US07214605B2
公开(公告)日：2007-05-08
申请号：US10683202
申请日：2003-10-09
申请人： Shriram Ramanathan , Grant Kloster , Patrick Morrow , Vijayakumar RamachandraRao , Scott List
发明人： Shriram Ramanathan , Grant Kloster , Patrick Morrow , Vijayakumar RamachandraRao , Scott List
IPC分类号： H01L21/44
CPC分类号： H01L24/12 , H01L24/11 , H01L24/16 , H01L24/81 , H01L25/0657 , H01L2224/11822 , H01L2224/13099 , H01L2224/81191 , H01L2224/81193 , H01L2224/81801 , H01L2224/81894 , H01L2225/06513 , H01L2225/06527 , H01L2225/06582 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/14
摘要： The invention provides a stacked wafer structure with decreased failures. In one embodiment, there is a barrier layer deposited on exposed surfaces of conductors that extend across a distance between first and second device structures. The barrier layer may prevent diffusion and electromigration of the conductor material, which may decrease incidences of shorts and voids in the stacked wafer structure.
摘要翻译：本发明提供了具有降低的故障的堆叠晶片结构。在一个实施例中，存在沉积在导体的暴露表面上的阻挡层，其延伸跨越第一和第二器件结构之间的距离。阻挡层可以防止导体材料的扩散和电迁移，这可能降低层叠晶片结构中的短路和空隙的发生。

8. 发明申请

US20050274690A1 Via etch process 有权
标题翻译：通过蚀刻工艺
公开(公告)号：US20050274690A1
公开(公告)日：2005-12-15
申请号：US10854541
申请日：2004-05-25
申请人： Hyun-Mog Park , Vijayakumar Ramachandrarao
发明人： Hyun-Mog Park , Vijayakumar Ramachandrarao
IPC分类号： B44C1/22 , H01L21/306 , H01L21/311 , H01L21/768
CPC分类号： H01L21/31116 , H01L21/76804 , Y10S438/978
摘要： Systems and techniques relating to etching vias in integrated circuit devices, in one implementation, include: providing a dielectric material and a conductive material, removing a first portion of the dielectric material to form a hole in the dielectric material, performing a tapering etch that removes a second portion of the dielectric material to form a via that touches down on the conductive material, and laterally expanding a bottom dimension of the via without a significant increase in a depth of the via. The technique can also include: providing a substrate with the dielectric material and the conductive material attached without an associated etch stop layer, removing the first portion at a high etch rate, controlling ion bombardment and plasma chemistry to form a sloped bottom of the via, and performing an intensive ion bombarding plasma etch, laterally expanding the via bottom.
摘要翻译：在一个实施方案中，与集成电路器件中的蚀刻通孔相关的系统和技术包括：提供介电材料和导电材料，去除电介质材料的第一部分以在电介质材料中形成孔，执行去除电介质材料的第二部分以形成在导电材料上接触的通孔，并且横向膨胀通孔的底部尺寸，而不会明显增加通孔的深度。该技术还可以包括：提供具有介电材料和导电材料的基底，没有相关联的蚀刻停止层，以高蚀刻速率去除第一部分，控制离子轰击和等离子体化学以形成通孔的倾斜底部，并执行强烈的离子轰击等离子体蚀刻，横向扩展通孔底部。

9. 发明申请

US20050017365A1 Replenishment of surface carbon and surface passivation of low-k porous silicon-based dielectric materials 失效
标题翻译：补充表面碳和低k多孔硅基介电材料的表面钝化
公开(公告)号：US20050017365A1
公开(公告)日：2005-01-27
申请号：US10919773
申请日：2004-08-16
申请人： Vijayakumar RamachandraRao , David Gracias
发明人： Vijayakumar RamachandraRao , David Gracias
IPC分类号： B32B3/00 , H01L21/302 , H01L21/31 , H01L21/461 , H01L21/4763 , H01L21/768
CPC分类号： H01L21/76808 , H01L21/76826 , H01L21/76831 , Y10T428/24802 , Y10T428/256
摘要： Processing problems associated with porous low-k dielectric materials are often severe. Exposure of low-k materials to plasma during feature etching, ashing, and priming steps has deleterious consequences. For porous, silicon-based low-k dielectric materials, the plasma depletes a surface organic group, raising the dielectric constant of the material. In the worst case, the damaged dielectric is destroyed during the wet etch removal of the antireflective coating in the via-first copper dual-damascene integration scheme. This issue is addressed by exposing the dielectric to silane coupling agents at various stages of etching and cleaning. Chemical reactions with the silane coupling agent both replenish the dielectric surface organic group and passivate the dielectric surface relative to the surface of the antireflective coating.
摘要翻译：与多孔低k电介质材料相关的加工问题通常是严重的。在特征蚀刻，灰化和引发步骤期间，低k材料暴露于等离子体具有有害的后果。对于多孔的硅基低k电介质材料，等离子体消耗了表面有机基团，提高了材料的介电常数。在最坏的情况下，在通孔 - 第一铜双镶嵌集成方案中的抗反射涂层的湿蚀刻去除期间损坏的电介质被破坏。通过在不同的蚀刻和清洁阶段将电介质暴露于硅烷偶联剂来解决这个问题。与硅烷偶联剂的化学反应都补充电介质表面有机基团并相对于抗反射涂层的表面钝化电介质表面。

10. 发明申请

US20090324928A1 Forming ultra low dielectric constant porous dielectric films and structures formed thereby 审中-公开
标题翻译：形成由此形成的超低介电常数多孔绝缘膜和结构
公开(公告)号：US20090324928A1
公开(公告)日：2009-12-31
申请号：US12215522
申请日：2008-06-26
申请人： Vijayakumar Ramachandrarao , Grant Kloster , Boyan Boyanov
发明人： Vijayakumar Ramachandrarao , Grant Kloster , Boyan Boyanov
IPC分类号： G21G5/00 , B32B5/18
CPC分类号： H01L21/3105 , Y10T428/249953 , Y10T428/249978
摘要： Methods of forming a microelectronic structure are described. Embodiments of those methods include removing a portion of at least one of Si—C bonds and CHx bonds in a dielectric material comprising a porogen material by reaction with a wet chemical, wherein the portion of Si—C and CHx bonds are converted to Si—H bonds. The Si—H bonds may be further hydrolyzed to form SiOH linkages. The SiOH linkages may then be removed by a radiation based cure, wherein a portion of the porogen material is also removed.
摘要翻译：描述形成微电子结构的方法。这些方法的实施方案包括通过与湿化学品反应除去包含致孔剂材料的电介质材料中的至少一个Si-C键和CHx键的一部分，其中Si-C和CHx键的部分转化为Si- H债券。可以进一步水解Si-H键以形成SiOH键。然后可以通过基于辐射的固化来除去SiOH键，其中一部分致孔剂材料也被除去。

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