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1. 发明授权

US09082965B2 Memory device and CBRAM memory with improved reliability 有权
标题翻译：内存设备和CBRAM内存，可靠性提高
公开(公告)号：US09082965B2
公开(公告)日：2015-07-14
申请号：US13055146
申请日：2009-07-27
申请人： Cyril Dressler , Veronique Sousa
发明人： Cyril Dressler , Veronique Sousa
IPC分类号： H01L45/00 , G11C13/00
CPC分类号： H01L45/1233 , G11C13/0011 , H01L45/085 , H01L45/1266 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1658 , H01L45/1675
摘要： A memory device including: one inert electrode including an electrically conductive material, a part of at least one material of resistivity higher than that of the material of the inert electrode, positioned around the inert electrode, a solid electrolyte positioned on at least one part of the inert electrode and of the part of electrically insulating material, and including metal ions originating from an ionizable metal part positioned on the solid electrolyte. The ratio between the coefficient of electrical resistivity of the material of resistivity higher than that of the material of the inert electrode and the coefficient of electrical resistivity of the material of the inert electrode is equal to or higher than approximately 100, and the coefficient of thermal conductivity of the electrically insulating material is equal to or higher than approximately 10 W·m−1·K−1.
摘要翻译：一种存储装置，包括：一个惰性电极，包括导电材料，至少一种电阻率高于惰性电极材料的电阻的一部分，位于惰性电极周围，固定电解质位于至少一部分惰性电极和电绝缘材料的一部分，并且包括源自位于固体电解质上的可电离金属部件的金属离子。电阻率高于惰性电极材料的电阻系数与惰性电极材料的电阻系数之比等于或大于约100，而热系数电绝缘材料的导电率等于或大于约10W·m-1·K-1。

2. 发明授权

US08021953B2 Method for making PMC type memory cells 有权
标题翻译：制作PMC型存储单元的方法
公开(公告)号：US08021953B2
公开(公告)日：2011-09-20
申请号：US12790024
申请日：2010-05-28
申请人： Cyril Dressler , Veronique Sousa
发明人： Cyril Dressler , Veronique Sousa
IPC分类号： H01L21/20
CPC分类号： G11C13/0011 , G11C2213/55 , H01L45/085 , H01L45/1233 , H01L45/141 , H01L45/1641
摘要： A microelectronic device includes: at least one cell or element including at least one first electrode, at least one second electrode, and at least one stack of thin layers between the first electrode and the second electrode. The stack includes at least one doped chalcogenide layer capable of forming a solid electrolyte, the doped chalcogenide layer being provided on and in contact with the first electrode; at least one interface layer provided on and in contact with the doped chalcogenide layer, the interface layer being based on a material different from the chalcogenide, the material being carbon or carbon comprising a metallic additive or a semiconducting additive; and at least one metallic ion donor layer provided on and in contact with the interface layer, the metallic ion donor layer being an ion source for the solid electrolyte.
摘要翻译：微电子器件包括：在第一电极和第二电极之间的至少一个电池或元件，其包括至少一个第一电极，至少一个第二电极和至少一个薄层堆叠。所述堆叠包括能够形成固体电解质的至少一个掺杂的硫族化物层，所述掺杂的硫族化物层设置在所述第一电极上并与所述第一电极接触; 至少一个界面层，其设置在掺杂的硫族化物层上并与掺杂的硫族化物层接触，所述界面层基于不同于硫族化物的材料，所述材料是包含金属添加剂或半导体添加剂的碳或碳; 以及设置在所述界面层上并与所述界面层接触的至少一个金属离子供体层，所述金属离子供体层是用于固体电解质的离子源。

3. 发明申请

US20110121254A1 MEMORY DEVICE AND CBRAM MEMORY WITH IMPROVED RELIABILITY 有权
标题翻译：具有改进可靠性的存储器件和CBRAM存储器
公开(公告)号：US20110121254A1
公开(公告)日：2011-05-26
申请号：US13055146
申请日：2009-07-27
申请人： Cyril Dressler , Veronique Sousa
发明人： Cyril Dressler , Veronique Sousa
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L45/1233 , G11C13/0011 , H01L45/085 , H01L45/1266 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1658 , H01L45/1675
摘要： A memory device including: one inert electrode including an electrically conductive material, a part of at least one material of resistivity higher than that of the material of the inert electrode, positioned around the inert electrode, a solid electrolyte positioned on at least one part of the inert electrode and of the part of electrically insulating material, and including metal ions originating from an ionizable metal part positioned on the solid electrolyte. The ratio between the coefficient of electrical resistivity of the material of resistivity higher than that of the material of the inert electrode and the coefficient of electrical resistivity of the material of the inert electrode is equal to or higher than approximately 100, and the coefficient of thermal conductivity of the electrically insulating material is equal to or higher than approximately 10 W·m−1·K−1.
摘要翻译：一种存储装置，包括：一个惰性电极，包括导电材料，至少一种电阻率高于惰性电极材料的电阻的一部分，位于惰性电极周围，固定电解质位于至少一部分惰性电极和电绝缘材料的一部分，并且包括源自位于固体电解质上的可电离金属部件的金属离子。电阻率高于惰性电极材料的电阻系数与惰性电极材料的电阻系数之比等于或大于约100，而热系数电绝缘材料的导电率等于或大于约10W·m-1·K-1。

4. 发明授权

US07876605B2 Phase change memory, phase change memory assembly, phase change memory cell, 2D phase change memory cell array, 3D phase change memory cell array and electronic component 有权
标题翻译：相变存储器，相变存储器组件，相变存储单元，2D相变存储单元阵列，3D相变存储单元阵列和电子元件
公开(公告)号：US07876605B2
公开(公告)日：2011-01-25
申请号：US10576760
申请日：2004-10-19
申请人： Peter Haring Bolivar , Bernard Bechevet , Veronique Sousa , Dae-Hwang Kim , Heinrich Kurz , Florian Merget
发明人： Peter Haring Bolivar , Bernard Bechevet , Veronique Sousa , Dae-Hwang Kim , Heinrich Kurz , Florian Merget
IPC分类号： G11C11/00 , H01L29/02
CPC分类号： H01L27/2436 , H01L27/2409 , H01L27/2481 , H01L45/06 , H01L45/1226 , H01L45/1246 , H01L45/144 , H01L45/1675
摘要： A phase change memory having a memory material layer consisting of a phase change material, and a first and second electrical contact which are located at a distance from one another and via which a switching zone of the memory material layer can be traversed by a current signal, wherein the current signal can be used to induce a reversible phase change between a crystalline phase and an amorphous phase and thus a change in resistance of the phase change material in the switching zone. The invention also relates to a phase change memory assembly, a phase change memory cell, a 2D phase change memory cell array, a 3D phase change memory cell array and an electronic component.
摘要翻译：一种相变存储器，具有由相变材料构成的存储材料层，以及位于彼此间隔一定距离的第一和第二电接点，存储材料层的开关区域可以通过电流信号其中电流信号可用于在晶相和非晶相之间引起可逆相变，从而在开关区中引起相变材料的电阻变化。本发明还涉及相变存储器组件，相变存储单元，2D相变存储单元阵列，3D相变存储单元阵列和电子组件。

5. 发明申请

US20100134196A1 SPIN-VALVE OR TUNNEL-JUNCTION RADIO-FREQUENCY OSCILLATOR 有权
标题翻译：旋转阀或隧道式无线电频率振荡器
公开(公告)号：US20100134196A1
公开(公告)日：2010-06-03
申请号：US12620922
申请日：2009-11-18
申请人： Marie-Claire Cyrille , Bertrand Delaet , Jean-Francois Nodin , Veronique Sousa
发明人： Marie-Claire Cyrille , Bertrand Delaet , Jean-Francois Nodin , Veronique Sousa
IPC分类号： H03B5/40
CPC分类号： H01F41/305 , B82Y25/00 , B82Y40/00 , H01F10/3259 , H01F10/3268 , H01F10/3286 , H01L43/08 , H03B15/006
摘要： This radio-frequency oscillator includes a magnetoresistive device in which an electric current is able to flow. The magnetoresistive device includes a first magnetic layer, known as a “trapped layer”, whereof the magnetization is of fixed direction. The magnetoresistive device further includes a second magnetic layer known as a “free layer” and a non-magnetic layer, known as an “intermediate layer”, interposed between the first and second layer, known as the intermediate layer. The oscillator further includes means capable of causing an electron current to flow in said layers constituting the aforementioned stack and in a direction perpendicular to the plane which contains said layers. One of the three layers constituting the magnetoresistive device includes at least one constriction zone of the electric current passing through it.
摘要翻译：该射频振荡器包括其中电流能够流动的磁阻器件。磁阻器件包括称为“俘获层”的第一磁性层，其磁化方向为固定方向。磁阻器件还包括被称为“自由层”的第二磁性层和被称为“中间层”的非磁性层，介于第一和第二层之间，被称为中间层。振荡器还包括能够使电子流在构成上述叠层的层中并且在垂直于包含所述层的平面的方向上流动的装置。构成磁阻器件的三层之一包括至少一个通过它的电流的收缩区域。

6. 发明授权

US07279418B2 Plastically deformable irreversible storage medium and method of producing one such medium 失效
标题翻译：塑性变形不可逆存储介质及其制造方法
公开(公告)号：US07279418B2
公开(公告)日：2007-10-09
申请号：US10579623
申请日：2004-12-02
申请人： Bernard Bechevet , Pierre Gaud , Veronique Sousa
发明人： Bernard Bechevet , Pierre Gaud , Veronique Sousa
IPC分类号： H01L21/44
CPC分类号： H01L27/101 , H01L23/5252 , H01L2924/0002 , H01L2924/00
摘要： The storage medium comprises an array of memory cells (3) which can be addressed by first (1) and second (2) conductors. Each memory cell (3) comprises one zone (10) of an active layer (8) which is initially electrically insulating and which can be made electrically conductive by means of localized plastic deformation (4), such as to selectively connect the first (1) and second (2) associated conductors. Binary information stored in the memory cell (3) is determined by the electrical conducting state of the corresponding zone (10) of the active layer (8). The active layer (8) can be formed using a charged resin. The medium production method comprises assembly of a blank storage medium having an active layer (8) which is in the initial insulating state, production of a stamping die having a stamping pattern that corresponds to the information to be stored, and stamping of the storage medium using the stamping die.
摘要翻译：存储介质包括可由第一（1）和第二（2）导体寻址的存储器单元阵列（3）。每个存储单元（3）包括有源层（8）的一个区域（10），其最初是电绝缘的并且可以通过局部塑性变形（4）制成导电的，例如选择性地将第一（1））和第二（2）个相关导体。存储在存储单元（3）中的二进制信息由有源层（8）的相应区域（10）的导电状态确定。活性层（8）可以使用带电树脂形成。介质制备方法包括组装具有处于初始绝缘状态的活性层（8）的空白存储介质，制造具有对应于要存储的信息的冲压图案的冲压模具以及存储介质的冲压使用冲压模具。

7. 发明申请

US20070072125A1 Phase change memory element with improved cyclability 有权
标题翻译：相变记忆元件具有改善的循环性
公开(公告)号：US20070072125A1
公开(公告)日：2007-03-29
申请号：US10577159
申请日：2004-11-02
申请人： Veronique Sousa , Pierre Desre
发明人： Veronique Sousa , Pierre Desre
IPC分类号： G11B7/24 , H01L29/94
CPC分类号： G11C13/0004 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/148 , H01L45/1675
摘要： A phase-change memory cell including, between two electrical contacts, a portion in a memory material with amorphous-crystalline phase-change and vice versa, as a stack with a central area located between two outmost areas. An interface, inert or quasi-inert from a physico-chemical point of view, is present between the active central area and each passive outmost area. Each passive outmost area is made in a material having a melting temperature higher than that of the material of the active central area.
摘要翻译：一种相变存储单元，在两个电触点之间包括存储材料中具有非晶态相变的部分，反之亦然，作为具有位于两个最外部区域之间的中心区域的叠层。从物理化学角度来看，惰性或惰性惰性的界面存在于活性中心区域和每个被动最外区域之间。每个被动最外面的区域由具有高于活性中心区域的材料的熔化温度的材料制成。

8. 发明授权

US08098105B2 Spin-valve or tunnel-junction radio-frequency oscillator 有权
标题翻译：旋转阀或隧道结射频振荡器
公开(公告)号：US08098105B2
公开(公告)日：2012-01-17
申请号：US12620922
申请日：2009-11-18
申请人： Marie-Claire Cyrille , Bertrand Delaet , Jean-Francois Nodin , Veronique Sousa
发明人： Marie-Claire Cyrille , Bertrand Delaet , Jean-Francois Nodin , Veronique Sousa
IPC分类号： H01S1/00 , H01L29/82 , H03B5/40
CPC分类号： H01F41/305 , B82Y25/00 , B82Y40/00 , H01F10/3259 , H01F10/3268 , H01F10/3286 , H01L43/08 , H03B15/006
摘要： This radio-frequency oscillator includes a magnetoresistive device in which an electric current is able to flow. The magnetoresistive device includes a first magnetic layer, known as a “trapped layer”, whereof the magnetization is of fixed direction. The magnetoresistive device further includes a second magnetic layer known as a “free layer” and a non-magnetic layer, known as an “intermediate layer”, interposed between the first and second layer, known as the intermediate layer. The oscillator further includes means capable of causing an electron current to flow in said layers constituting the aforementioned stack and in a direction perpendicular to the plane which contains said layers. One of the three layers constituting the magnetoresistive device includes at least one constriction zone of the electric current passing through it.
摘要翻译：该射频振荡器包括其中电流能够流动的磁阻器件。磁阻器件包括称为“俘获层”的第一磁性层，其磁化方向为固定方向。磁阻器件还包括被称为“自由层”的第二磁性层和被称为“中间层”的非磁性层，介于第一和第二层之间，被称为中间层。振荡器还包括能够使电子流在构成上述叠层的层中并且在垂直于包含所述层的平面的方向上流动的装置。构成磁阻器件的三层之一包括至少一个通过它的电流的收缩区域。

9. 发明申请

US20080101109A1 Phase Change Memory, Phase Change Memory Assembly, Phase Change Memory Cell, 2D Phase Change Memory Cell Array, 3D Phase Change Memory Cell Array and Electronic Component 有权
标题翻译：相变存储器，相变存储器组件，相变存储器单元，2D相变存储器单元阵列，3D相变存储器单元阵列和电子部件
公开(公告)号：US20080101109A1
公开(公告)日：2008-05-01
申请号：US10576760
申请日：2004-10-19
申请人： Peter Haring-Bolivar , Bernard Bechevet , Veronique Sousa , Dae-Hwang Kim , Heinrich Kurz , Florian Merget
发明人： Peter Haring-Bolivar , Bernard Bechevet , Veronique Sousa , Dae-Hwang Kim , Heinrich Kurz , Florian Merget
IPC分类号： G11C11/00
CPC分类号： H01L27/2436 , H01L27/2409 , H01L27/2481 , H01L45/06 , H01L45/1226 , H01L45/1246 , H01L45/144 , H01L45/1675
摘要： A phase change memory having a memory material layer consisting of a phase change material, and a first and second electrical contact which are located at a distance from one another and via which a switching zone of the memory material layer can be traversed by a current signal, wherein the current signal can be used to induce a reversible phase change between a crystalline phase and an amorphous phase and thus a change in resistance of the phase change material in the switching zone. The invention also relates to a phase change memory assembly, a phase change memory cell, a 2D phase change memory cell array, a 3D phase change memory cell array and an electronic component.
摘要翻译：一种相变存储器，具有由相变材料构成的存储材料层，以及位于彼此间隔一定距离的第一和第二电接点，存储材料层的开关区域可以通过电流信号其中电流信号可用于在晶相和非晶相之间引起可逆相变，从而在开关区中引起相变材料的电阻变化。本发明还涉及相变存储器组件，相变存储单元，2D相变存储单元阵列，3D相变存储单元阵列和电子组件。

10. 发明申请

US20080007997A1 Pmc Memory With Improved Retention Time And Writing Speed 有权
标题翻译： Pmc内存提高了保留时间和写入速度
公开(公告)号：US20080007997A1
公开(公告)日：2008-01-10
申请号：US11722761
申请日：2005-12-20
申请人： Veronique Sousa
发明人： Veronique Sousa
IPC分类号： G11C16/02
CPC分类号： G11C13/0011 , G11C13/0069 , G11C2013/008 , G11C2213/79 , H01L27/2436 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/1286 , H01L45/142 , H01L45/143 , H01L45/146 , H01L45/1658
摘要： The invention concerns a PMC memory comprising a memory cell (4, 6, 8, 10) and means (16, 18, 20) for heating the cell when being written into the memory.
摘要翻译：本发明涉及一种包含存储单元（4,6,8,10）的PMC存储器和用于在写入存储器时加热单元的装置（16,18,20）。

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