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1. 发明申请

WO2006031425A2 CMOS DEVICE HAVING DIFFERENT NITROGEN AMOUNTS IN NMOS AND PMOS GATE DIELECTRIC LAYERS 审中-公开
标题翻译：在NMOS和PMOS栅介质层中具有不同氮元素的CMOS器件
公开(公告)号：WO2006031425A2
公开(公告)日：2006-03-23
申请号：PCT/US2005/030690
申请日：2005-08-29
申请人： TEXAS INSTRUMENTS INCORPORATED , VARGHESE, Ajith , ALSHAREEF, Husam , KHAMANKAR, Rajesh
发明人： VARGHESE, Ajith , ALSHAREEF, Husam , KHAMANKAR, Rajesh
IPC分类号： H01L29/76
CPC分类号： H01L21/28202 , H01L21/823857 , H01L29/513 , H01L29/518
摘要： The present invention provides a complementary metal oxide semiconductor (CMOS) device, a method of manufacture therefor, and an integrated circuit including the same. The CMOS device (100), in an example embodiment of the present invention, includes a p-channel metal oxide semiconductor (PMOS) device (120) having a first gate dielectric layer (133) and a first gate electrode layer (138) located over a substrate (110), wherein the first gate dielectric layer (133) has an amount of nitrogen located therein. In addition to the PMOS device (120), the CMOS device further includes an n-channel metal oxide semiconductor (NMOS) device (160) having a second gate dielectric layer (173) and a second gate electrode layer (178) located over the substrate (110), wherein the second gate dielectric layer (173) has a different amount of nitrogen located therein. Accordingly, the present invention allows for the individual tuning of the threshold voltages for the PMOS device (120) and the NMOS device (160).
摘要翻译：本发明提供了一种互补金属氧化物半导体（CMOS）器件及其制造方法，以及包括该互补金属氧化物半导体器件的集成电路。在本发明的示例性实施例中，CMOS器件（100）包括具有第一栅极介电层（133）和位于第一栅极电极层（138）的p沟道金属氧化物半导体（PMOS）器件（120）在衬底（110）上，其中第一栅极电介质层（133）具有位于其中的一定量的氮。除了PMOS器件（120）之外，CMOS器件还包括具有第二栅极电介质层（173）和第二栅电极层（178）的n沟道金属氧化物半导体（NMOS）器件（160）衬底（110），其中所述第二栅极电介质层（173）具有位于其中的不同量的氮。因此，本发明允许对PMOS器件（120）和NMOS器件（160）的阈值电压进行单独调谐。

2. 发明申请

WO2006031425A3 CMOS DEVICE HAVING DIFFERENT NITROGEN AMOUNTS IN NMOS AND PMOS GATE DIELECTRIC LAYERS 审中-公开
标题翻译：在NMOS和PMOS栅介质层中具有不同氮元素的CMOS器件
公开(公告)号：WO2006031425A3
公开(公告)日：2009-04-16
申请号：PCT/US2005030690
申请日：2005-08-29
申请人： TEXAS INSTRUMENTS INC , VARGHESE AJITH , ALSHAREEF HUSAM , KHAMANKAR RAJESH
发明人： VARGHESE AJITH , ALSHAREEF HUSAM , KHAMANKAR RAJESH
IPC分类号： H01L27/10
CPC分类号： H01L21/28202 , H01L21/823857 , H01L29/513 , H01L29/518
摘要： The present invention provides a complementary metal oxide semiconductor (CMOS) device, a method of manufacture therefor, and an integrated circuit including the same. The CMOS device (100), in an example embodiment of the present invention, includes a p-channel metal oxide semiconductor (PMOS) device (120) having a first gate dielectric layer (133) and a first gate electrode layer (138) located over a substrate (110), wherein the first gate dielectric layer (133) has an amount of nitrogen located therein. In addition to the PMOS device (120), the CMOS device further includes an n-channel metal oxide semiconductor (NMOS) device (160) having a second gate dielectric layer (173) and a second gate electrode layer (178) located over the substrate (110), wherein the second gate dielectric layer (173) has a different amount of nitrogen located therein. Accordingly, the present invention allows for the individual tuning of the threshold voltages for the PMOS device (120) and the NMOS device (160).
摘要翻译：本发明提供了一种互补金属氧化物半导体（CMOS）器件及其制造方法，以及包括该互补金属氧化物半导体器件的集成电路。在本发明的示例性实施例中，CMOS器件（100）包括具有第一栅极介电层（133）和位于第一栅极电极层（138）的p沟道金属氧化物半导体（PMOS）器件（120）在衬底（110）上，其中第一栅极电介质层（133）具有位于其中的一定量的氮。除了PMOS器件（120）之外，CMOS器件还包括具有第二栅极电介质层（173）和第二栅电极层（178）的n沟道金属氧化物半导体（NMOS）器件（160）衬底（110），其中所述第二栅极电介质层（173）具有位于其中的不同量的氮。因此，本发明允许对PMOS器件（120）和NMOS器件（160）的阈值电压进行单独调谐。

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