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1. 发明申请

WO2009016589A2 TAMPER-RESISTANT SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THEREOF 审中-公开
标题翻译：防篡改的半导体器件及其制造方法
公开(公告)号：WO2009016589A2
公开(公告)日：2009-02-05
申请号：PCT/IB2008/053047
申请日：2008-07-29
申请人： NXP B.V. , VAN GELOVEN, Johannes, A., J. , TUYLS, Pim, T. , WOLTERS, Robertus, A., M. , VERHAEGH, Nynke
发明人： VAN GELOVEN, Johannes, A., J. , TUYLS, Pim, T. , WOLTERS, Robertus, A., M. , VERHAEGH, Nynke
CPC分类号： H01L23/576 , H01L24/73 , H01L2224/48091 , H01L2224/73265 , H01L2924/09701 , H01L2924/14 , H01L2924/3011 , H01L2924/00014 , H01L2924/00
摘要： The invention relates to a tamper-resistant semiconductor device comprising a substrate (5) comprising an electronic circuit arranged on a first side thereof. An electrically- conductive protection layer (50, 50a, 50b) is arranged on a second side of the substrate (5) opposite to the first side. At least three through-substrate electrically-conductive connections (45) extend from the first side of the substrate (5) into the substrate (5) and in electrical contact with the electrically- conductive protection layer (50, 50a, 50b) on the second side of the substrate (5). A security circuit is arranged on the first side connected to the through- substrate electrically-conductive connections (45) and is arranged for measuring at least two resistance values (R12, R23, R34, R14, R13, R24) of the electrically- conductive protection layer (50, 50a, 50b) through the through-substrate electrically-conductive connections (45). The security circuit is further arranged for comparing the measured resistance values (R12, R23, R34, R14, R13, R24) with reference resistance values.
摘要翻译：本发明涉及一种防篡改半导体器件，其包括衬底（5），该衬底（5）包括布置在其第一侧上的电子电路。导电保护层（50,50a，50b）被布置在衬底（5）的与第一侧相对的第二侧上。至少三个贯穿基板的导电连接（45）从基板（5）的第一侧延伸到基板（5）中并且与基板（5）上的导电保护层（50,50a，50b）电接触（5）的第二侧。安全电路布置在连接到衬底直通导电连接（45）的第一侧上并且布置成用于测量导电的导电连接（45）的至少两个电阻值（R12，R23，R34，R14，R13，R24）保护层（50,50a，50b）通过贯穿衬底的导电连接（45）。安全电路还被布置为将测量的电阻值（R12，R23，R34，R14，R13，R24）与参考电阻值进行比较。

2. 发明申请

WO2009016589A3 TAMPER-RESISTANT SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THEREOF 审中-公开
标题翻译：耐冲击半导体器件及其制造方法
公开(公告)号：WO2009016589A3
公开(公告)日：2009-10-15
申请号：PCT/IB2008053047
申请日：2008-07-29
申请人： NXP BV , VAN GELOVEN JOHANNES A J , TUYLS PIM T , WOLTERS ROBERTUS A M , VERHAEGH NYNKE
发明人： VAN GELOVEN JOHANNES A J , TUYLS PIM T , WOLTERS ROBERTUS A M , VERHAEGH NYNKE
IPC分类号： G06K19/073 , G08B29/04 , H01L23/58
CPC分类号： H01L23/576 , H01L24/73 , H01L2224/48091 , H01L2224/73265 , H01L2924/09701 , H01L2924/14 , H01L2924/3011 , H01L2924/00014 , H01L2924/00
摘要： The invention relates to a tamper-resistant semiconductor device comprising a substrate (5) comprising an electronic circuit arranged on a first side thereof. An electrically- conductive protection layer (50, 50a, 50b) is arranged on a second side of the substrate (5) opposite to the first side. At least three through-substrate electrically-conductive connections (45) extend from the first side of the substrate (5) into the substrate (5) and in electrical contact with the electrically- conductive protection layer (50, 50a, 50b) on the second side of the substrate (5). A security circuit is arranged on the first side connected to the through- substrate electrically-conductive connections (45) and is arranged for measuring at least two resistance values (R12, R23, R34, R14, R13, R24) of the electrically- conductive protection layer (50, 50a, 50b) through the through-substrate electrically-conductive connections (45). The security circuit is further arranged for comparing the measured resistance values (R12, R23, R34, R14, R13, R24) with reference resistance values.
摘要翻译：本发明涉及一种防篡改半导体器件，其包括基板（5），该基板包括布置在其第一侧上的电子电路。导电保护层（50,50a，50b）布置在与第一侧相对的基板（5）的第二侧上。至少三个贯穿基板的导电连接（45）从基板（5）的第一侧延伸到基板（5）中并与导电保护层（50,50a，50b）电接触基板（5）的第二侧。安全电路布置在连接到贯通基板导电连接件（45）的第一侧上，并布置成用于测量导电的至少两个电阻值（R12，R23，R34，R14，R13，R24）保护层（50,50a，50b）穿过贯通基板导电连接（45）。安全电路还被布置为将测得的电阻值（R12，R23，R34，R14，R13，R24）与参考电阻值进行比较。

3. 发明申请

WO2008093273A3 SENSING CIRCUIT FOR DEVICES WITH PROTECTIVE COATING 审中-公开
标题翻译：具有防护涂层的设备的感测电路
公开(公告)号：WO2008093273A3
公开(公告)日：2008-11-06
申请号：PCT/IB2008050292
申请日：2008-01-28
申请人： NXP BV , VAN GELOVEN JOHANNES A J , WOLTERS ROBERTUS A M , VERHAEGH NYNKE
发明人： VAN GELOVEN JOHANNES A J , WOLTERS ROBERTUS A M , VERHAEGH NYNKE
IPC分类号： H01L23/58
CPC分类号： H01L23/576 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An integrated circuit has an inhomogeneous protective layer or coating over a circuit to be protected, and a sensing circuit (80) arranged to sense a first impedance of a part of the protective coating compared to a reference impedance (CO) located on the integrated circuit. The sensing circuit is able to measure a change in the first impedance, e.g. caused by tampering. The sensing circuit has an amplifier (OTA) having a feedback loop, such that the impedance being sensed is in the feedback loop. The sensing circuit can be incorporated in an oscillator circuit (OTA, Comp) so that the frequency depends on the impedance. Where the impedance is a capacitance, sensing electrodes adjacent to the protective layer or coating, form the capacitance. The electrodes can be arranged as selectable interdigitated comb structures, so that the protective layer or coating extends in between the teeth of the comb structures.
摘要翻译：集成电路在要保护的电路上具有不均匀的保护层或涂层，并且感测电路（80）被布置为感测与位于集成电路上的参考阻抗（CO）相比的保护涂层的一部分的第一阻抗。感测电路能够测量第一阻抗的变化，例如，由篡改引起的。感测电路具有具有反馈回路的放大器（OTA），使得感测的阻抗位于反馈回路中。感应电路可以包含在振荡器电路（OTA，Comp）中，以便频率取决于阻抗。在阻抗是电容的情况下，感测邻近保护层或涂层的电极，形成电容。电极可以布置成可选择的交叉梳状结构，使得保护层或涂层在梳状结构的齿之间延伸。

4. 发明申请

WO2008099348A3 SEMICONDUCTOR DEVICE IDENTIFIER GENERATION 审中-公开
公开(公告)号：WO2008099348A3
公开(公告)日：2008-08-21
申请号：PCT/IB2008/050515
申请日：2008-02-13
申请人： NXP B.V. , ZIEREN, Victor , VAN GELOVEN, Johannes, A., J. , WOLTERS, Robertus, A., M.
发明人： ZIEREN, Victor , VAN GELOVEN, Johannes, A., J. , WOLTERS, Robertus, A., M.
IPC分类号： G11C7/20 , G11C11/4072 , G11C7/10 , H01L23/58 , G11C7/24 , G11C7/04
摘要： The present invention relates to a semiconductor device (11) for generating an identifier comprising a volatile memory (13) having a plurality of memory cells (21), to a method of generating an identifier using such a semiconductor device (11) and to a method of detecting a tampering on said semiconductor device (11). Providing a layer (27) comprising conductive and non conductive materials (28, 29) with said semiconductor device allows for a cooperation between elements or properties of a memory cell (21) which are responsible for the assuming of a random state by the memory cell (21) during initialization and the layer (27) acting as stray capacitances (26, 26 ). From the random states of the memory cells (21) a key or identifier can be generated. Due to said cooperation, i.e. the influence of the stray capacitances (26, 26 ) formed by the layer, the key or identifier can be generated more reliably over a wider range of operation parameters. Further, a tampering on said layer (27) leads to a change to the stray capacitances (26, 26 ) and thus changes the identifier or key.

5. 发明申请

WO2008099348A2 SEMICONDUCTOR DEVICE IDENTIFIER GENERATION 审中-公开
标题翻译：半导体器件识别器生成
公开(公告)号：WO2008099348A2
公开(公告)日：2008-08-21
申请号：PCT/IB2008050515
申请日：2008-02-13
申请人： NXP BV , ZIEREN VICTOR , VAN GELOVEN JOHANNES A J , WOLTERS ROBERTUS A M
发明人： ZIEREN VICTOR , VAN GELOVEN JOHANNES A J , WOLTERS ROBERTUS A M
IPC分类号： G11C7/20 , G11C7/04 , G11C7/10 , G11C7/24 , G11C11/4072 , H01L23/58
CPC分类号： G11C7/20 , G11C7/04 , G11C7/1006 , G11C7/24 , G11C11/4072 , H01L23/576 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： The present invention relates to a semiconductor device (11) for generating an identifier comprising a volatile memory (13) having a plurality of memory cells (21), to a method of generating an identifier using such a semiconductor device (11) and to a method of detecting a tampering on said semiconductor device (11). Providing a layer (27) comprising conductive and non conductive materials (28, 29) with said semiconductor device allows for a cooperation between elements or properties of a memory cell (21) which are responsible for the assuming of a random state by the memory cell (21) during initialization and the layer (27) acting as stray capacitances (26, 26 ). From the random states of the memory cells (21) a key or identifier can be generated. Due to said cooperation, i.e. the influence of the stray capacitances (26, 26 ) formed by the layer, the key or identifier can be generated more reliably over a wider range of operation parameters. Further, a tampering on said layer (27) leads to a change to the stray capacitances (26, 26 ) and thus changes the identifier or key.
摘要翻译：本发明涉及一种用于生成包括具有多个存储单元（21）的易失性存储器（13）的标识符的半导体器件（11），涉及使用这种半导体器件（11）产生标识符的方法和检测所述半导体器件（11）上的篡改的方法。提供包括与所述半导体器件的导电和非导电材料（28,29）的层（27）允许存储单元（21）的元件或属性之间的协作，所述存储单元（21）负责由存储器单元假定随机状态（21），并且所述层（27）用作杂散电容（26,26）。从存储器单元（21）的随机状态可以生成键或标识符。由于所述协调，即由层形成的杂散电容（26,26）的影响，可以在较宽的操作参数范围内更可靠地产生密钥或标识符。此外，所述层（27）上的篡改导致杂散电容（26,26）的改变，从而改变标识符或密钥。

6. 发明申请

WO2008093273A2 SENSING CIRCUIT FOR DEVICES WITH PROTECTIVE COATING 审中-公开
标题翻译：用于具有防护涂层的设备的感应电路
公开(公告)号：WO2008093273A2
公开(公告)日：2008-08-07
申请号：PCT/IB2008/050292
申请日：2008-01-28
申请人： NXP B.V. , VAN GELOVEN, Johannes, A., J. , WOLTERS, Robertus, A., M. , VERHAEGH, Nynke
发明人： VAN GELOVEN, Johannes, A., J. , WOLTERS, Robertus, A., M. , VERHAEGH, Nynke
IPC分类号： H01L23/58
CPC分类号： H01L23/576 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： An integrated circuit has an inhomogeneous protective layer or coating over a circuit to be protected, and a sensing circuit (80) arranged to sense a first impedance of a part of the protective coating compared to a reference impedance (CO) located on the integrated circuit. The sensing circuit is able to measure a change in the first impedance, e.g. caused by tampering. The sensing circuit has an amplifier (OTA) having a feedback loop, such that the impedance being sensed is in the feedback loop. The sensing circuit can be incorporated in an oscillator circuit (OTA, Comp) so that the frequency depends on the impedance. Where the impedance is a capacitance, sensing electrodes adjacent to the protective layer or coating, form the capacitance. The electrodes can be arranged as selectable interdigitated comb structures, so that the protective layer or coating extends in between the teeth of the comb structures.
摘要翻译：集成电路在要保护的电路上具有不均匀的保护层或涂层;以及感测电路（80），其布置成与位于集成电路上的参考阻抗（CO）相比感应保护涂层的一部分的第一阻抗。感测电路能够测量第一阻抗的变化，例如，造成篡改。感测电路具有具有反馈回路的放大器（OTA），使得被感测的阻抗处于反馈回路中。感测电路可以结合在振荡器电路（OTA，Comp）中，使得频率取决于阻抗。在阻抗为电容的地方，与保护层或涂层相邻的感应电极形成电容。电极可以被布置为可选择的叉指梳状结构，使得保护层或涂层在梳结构的齿之间延伸。

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