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1. 发明申请

US20100247773A1 ALLOY SUSCEPTOR WITH IMPROVED PROPERTIES FOR FILM DEPOSITION 有权
标题翻译：具有改善薄膜沉积性能的合金SUSCEPTOR
公开(公告)号：US20100247773A1
公开(公告)日：2010-09-30
申请号：US12412186
申请日：2009-03-26
申请人： Shuo-Jieh Wu , Hsu Chun Yuan , Tung-Li Lee , Steven Lin , Hs Chiu , Yen-Yu Chen , Alan Chen , Ming Jie He , Yu-Wei Hsueh
发明人： Shuo-Jieh Wu , Hsu Chun Yuan , Tung-Li Lee , Steven Lin , Hs Chiu , Yen-Yu Chen , Alan Chen , Ming Jie He , Yu-Wei Hsueh
IPC分类号： B05D1/36 , B05C11/00 , H01L21/46
CPC分类号： H01L21/68757 , C23C16/4581
摘要： Provided is a method for processing a wafer that includes providing an alloy susceptor including an exterior surface and a wafer contact surface. The exterior surface of the alloy susceptor is treated to produce a roughness of the exterior surface. The roughened exterior surface of is coated with a ceramic material. The alloy susceptor including the ceramic-coated roughened exterior surface is positioned in a wafer process chamber. A plurality of layers of a film are deposited on the ceramic-coated roughened exterior surface of the alloy susceptor, wherein a first adhesion exists between the plurality of layers of the film and the ceramic material coated on the roughened exterior surface of the alloy susceptor that is greater than a second adhesion that would exist between the plurality of layers of the film and a non-roughened exterior surface of the alloy susceptor without the ceramic material.
摘要翻译：提供一种处理晶片的方法，其包括提供包括外表面和晶片接触表面的合金基座。处理合金基座的外表面以产生外表面的粗糙度。粗糙的外表面涂有陶瓷材料。包括陶瓷涂覆的粗糙外表面的合金感受器位于晶片处理室中。多层膜沉积在合金感受体的陶瓷涂覆的粗糙化的外表面上，其中在多层薄膜和涂覆在合金感受体粗糙化的外表面上的陶瓷材料之间存在第一粘附，大于在该多层薄膜和不具有陶瓷材料的合金基座的非粗糙化外表面之间将存在的第二粘合。

2. 发明授权

US08147909B2 Method of making and using alloy susceptor with improved properties for film deposition 有权
标题翻译：制造和使用具有改善的薄膜沉积性能的合金感受器的方法
公开(公告)号：US08147909B2
公开(公告)日：2012-04-03
申请号：US12412186
申请日：2009-03-26
申请人： Shuo-Jieh Wu , Hsu Chun Yuan , Tung-Li Lee , Steven Li , Hs Chiu , Yen-Yu Chen , Alan Chen , Ming Jie He , Yu-Wei Hsueh
发明人： Shuo-Jieh Wu , Hsu Chun Yuan , Tung-Li Lee , Steven Li , Hs Chiu , Yen-Yu Chen , Alan Chen , Ming Jie He , Yu-Wei Hsueh
IPC分类号： C23C16/00
CPC分类号： H01L21/68757 , C23C16/4581
摘要： Provided is a method for processing a wafer that includes providing an alloy susceptor including an exterior surface and a wafer contact surface. The exterior surface of the alloy susceptor is treated to produce a roughness of the exterior surface. The roughened exterior surface of is coated with a ceramic material. The alloy susceptor including the ceramic-coated roughened exterior surface is positioned in a wafer process chamber. A plurality of layers of a film are deposited on the ceramic-coated roughened exterior surface of the alloy susceptor, wherein a first adhesion exists between the plurality of layers of the film and the ceramic material coated on the roughened exterior surface of the alloy susceptor that is greater than a second adhesion that would exist between the plurality of layers of the film and a non-roughened exterior surface of the alloy susceptor without the ceramic material.
摘要翻译：提供一种处理晶片的方法，其包括提供包括外表面和晶片接触表面的合金基座。处理合金基座的外表面以产生外表面的粗糙度。粗糙的外表面涂有陶瓷材料。包括陶瓷涂覆的粗糙外表面的合金感受器位于晶片处理室中。多层膜沉积在合金感受体的陶瓷涂覆的粗糙化的外表面上，其中在多层薄膜和涂覆在合金感受体粗糙化的外表面上的陶瓷材料之间存在第一粘附，大于在该多层薄膜和不具有陶瓷材料的合金基座的非粗糙化外表面之间将存在的第二粘合。

3. 发明授权

US06646752B2 Method and apparatus for measuring thickness of a thin oxide layer 有权
标题翻译：用于测量薄氧化物层厚度的方法和装置
公开(公告)号：US06646752B2
公开(公告)日：2003-11-11
申请号：US10080432
申请日：2002-02-22
申请人： Pu Fang Chen , Tung Li Lee , Bing Huei Perng , Chao Po Leu
发明人： Pu Fang Chen , Tung Li Lee , Bing Huei Perng , Chao Po Leu
IPC分类号： G01B1106
CPC分类号： G01B11/0616
摘要： A method and an apparatus for measuring thicknesses of ultra-thin gate oxide layers are provided. In the method, a substrate that has a thin gate oxide layer formed on top is first heat treated at a temperature between about 400° C. and about 800° C. under a sub-atmospheric pressure for at least 10 seconds. The substrate is then immediately transferred, i.e., within 10 minutes, to a thickness measuring device for the accurate measurement of the thickness of the gate oxide layer. The apparatus can be provided by mounting a heating chamber juxtaposed to a thickness measuring device, such as an ellipsometer so that substrate can be immediately transferred therein between after a heat treatment step is completed. The heat treatment step of the present invention novel method is efficient in preventing the deposition of moisture and organic residue onto the surface of the thin gate oxide layer.
摘要翻译：提供了一种用于测量超薄栅极氧化物层的厚度的方法和装置。在该方法中，首先在大气压下在约400℃和约800℃之间的温度下对在顶部形成有薄的栅氧化层的基板进行热处理至少10秒。然后将衬底立即转移，即在10分钟内转移到厚度测量装置，以准确测量栅极氧化物层的厚度。该装置可以通过将加热室安装在厚度测量装置（例如椭圆偏振计）上来提供，使得在完成热处理步骤之后可以立即将基板转移到其中。本发明新方法的热处理步骤有效地防止了水分和有机残留物沉积到薄栅氧化层的表面上。

4. 发明申请

US20080041758A1 Wafer carrier 审中-公开
标题翻译：晶圆载体
公开(公告)号：US20080041758A1
公开(公告)日：2008-02-21
申请号：US11504594
申请日：2006-08-16
申请人： Yen-Fei Lin , Hui-Wen Chou , Wen-Yu Ku , Pu-Fang Chen , Tung-Li Lee , Jih-Hwa Wang
发明人： Yen-Fei Lin , Hui-Wen Chou , Wen-Yu Ku , Pu-Fang Chen , Tung-Li Lee , Jih-Hwa Wang
IPC分类号： B65D85/00
CPC分类号： H01L21/67366 , H01L21/67393
摘要： A wafer carrier. The wafer carrier includes a container and a plate, wherein the container has an inner wall and the plate is disposed in the vicinity of the inner wall of an upper portion of the container.
摘要翻译：晶圆载体。晶片载体包括容器和板，其中所述容器具有内壁，并且所述板设置在所述容器的上部的内壁附近。

5. 发明授权

US06678581B2 Method of calibrating a wafer edge gripping end effector 有权
标题翻译：校准晶片边缘夹持端部执行器的方法
公开(公告)号：US06678581B2
公开(公告)日：2004-01-13
申请号：US10047331
申请日：2002-01-14
申请人： Kwun-Goo Hung , Tung-Li Lee , Ko-Chin Chung , Fan-Lin Lu
发明人： Kwun-Goo Hung , Tung-Li Lee , Ko-Chin Chung , Fan-Lin Lu
IPC分类号： G06F1900
CPC分类号： H01L21/68707
摘要： A method of calibrating a wafer edge gripping end effector. A wafer calibration tool is held in a stationary position simulating the position of a semiconductor wafer to be picked up by the wafer edge gripping end effector. A controller associated with a robot having an end effector attached to a robot arm thereto is turned off. The robot arm and end effector are moved to position where the first and second clamp structures on the end effector each engage a respective inner edge that in part defines a notch formed in the wafer calibration tool. An actuator driven movable clamp structure is manually advanced so that the movable clamp structure engages an inner edge that in part defines one of the notches formed in the wafer calibration tool. The controller is turned on and data regarding the location of robot arm, end effector and movable clamp structure is stored.
摘要翻译：一种校准晶片边缘夹持端部执行器的方法。晶片校准工具被保持在模拟由晶片边缘夹持端部执行器拾取的半导体晶片的位置的静止位置。关闭与机器人相关联的控制器，其具有附接到机器人手臂的末端执行器。机器人臂和末端执行器被移动到位于末端执行器上的第一和第二夹紧结构各自接合相应的内边缘的位置，该内边缘部分地限定在晶片校准工具中形成的切口。致动器驱动的可动夹紧结构被手动推进，使得可移动夹具结构接合内边缘，该内边缘部分地限定在晶片校准工具中形成的凹口中的一个。打开控制器，并存储关于机器人臂，末端执行器和可移动夹具结构的位置的数据。

6. 发明授权

US5951196A Frictional mount for engaging a monitor in a process chamber and method of using 失效
标题翻译：用于使处理室中的监视器接合的摩擦安装和使用方法
公开(公告)号：US5951196A
公开(公告)日：1999-09-14
申请号：US74872
申请日：1998-05-08
申请人： Chih-Yuan Ke , Tung-Li Lee , Chien-Rong Huang , Sheng-Kuo Huang
发明人： Chih-Yuan Ke , Tung-Li Lee , Chien-Rong Huang , Sheng-Kuo Huang
IPC分类号： H01J37/32 , E04H17/14
CPC分类号： H01J37/32458 , H01J37/32935 , Y10T403/455 , Y10T403/557 , Y10T403/7069
摘要： The present invention discloses a frictional mount for engaging a monitor to a process chamber by utilizing a base member that has at least three apertures therethrough adapted for mounting at least one monitor and two fastening devices, a compressible member formed of a deformable material that has at least three apertures adapted for the at least one monitor and the two fastening devices to pass through, the compressible member is positioned in intimate contact with the base member, and a pressing member that is in intimate contact with the compressible member and has at least one aperture adapted for the at least one monitor to be mounted therethrough and two apertures adapted for receiving two fastening devices such that when the two fastening devices are engaged, the compressible member expands in a lateral direction and frictionally engages the internal peripheral surfaces of a recessed window in the process chamber.
摘要翻译：本发明公开了一种用于通过利用具有至少三个穿过其中的孔的基座构件将监视器接合到处理室的摩擦支架，其适于安装至少一个监视器和两个紧固装置，由可变形材料形成的可压缩构件，该可变形材料具有至少三个孔适于所述至少一个监视器并且所述两个紧固装置通过，所述可压缩构件定位成与所述基座构件紧密接触;以及按压构件，其与所述可压缩构件紧密接触并且具有至少一个适于至少一个监视器安装的孔，以及两个适于接收两个紧固装置的孔，使得当两个紧固装置接合时，可压缩构件沿横向方向膨胀并且摩擦地接合凹入窗的内周面在处理室中。

7. 发明授权

US07518129B2 Preventing dosage drift with duplicate dose integrators 有权
标题翻译：用重复剂量积分器预防剂量漂移
公开(公告)号：US07518129B2
公开(公告)日：2009-04-14
申请号：US11416874
申请日：2006-05-03
申请人： Jih-Hwa Wang , Otto Chen , Fang-Chi Chien , Tung-Li Lee , Pu-Fang Chen
发明人： Jih-Hwa Wang , Otto Chen , Fang-Chi Chien , Tung-Li Lee , Pu-Fang Chen
IPC分类号： G21K5/00
CPC分类号： H01J37/3171 , H01J37/304 , H01J2237/30433 , H01J2237/30455 , H01J2237/31703
摘要： A method for identifying a drifted dose integrator in an implantation system and an implantation system are provided. The implantation system includes a first dose integrator and a second dose integrator. The first dose integrator includes a first input configured to receive a first current generated from charges carried by implanted ions in a wafer, and a first output configured to output a first accumulated dosage value. The second dose integrator includes a second dose integrator including a second input configured to receive a second current generated from the charges carried by the implanted ions in the wafer, and a second output configured to output a second accumulated dosage value. The implantation system further includes a processing unit comparing the first accumulated dosage value and the second accumulated dosage value to detect a drift in one of the first and the second dose integrators.
摘要翻译：提供了一种用于在植入系统和植入系统中识别漂移剂量积分器的方法。植入系统包括第一剂量积分器和第二剂量积分器。第一剂量积分器包括被配置为接收由晶片中的注入离子携带的电荷产生的第一电流的第一输入和被配置为输出第一累积剂量值的第一输出。所述第二剂量积分器包括第二剂量积分器，所述第二剂量积分器包括被配置为接收从由所述晶片中的所述注入离子携带的电荷产生的第二电流的第二输入，以及被配置为输出第二累积剂量值的第二输出。植入系统还包括处理单元，比较第一累积剂量值和第二累积剂量值，以检测第一和第二剂量积分器之一中的漂移。

8. 发明授权

US07446056B2 Method for increasing polysilicon grain size 有权
标题翻译：增加多晶硅粒度的方法
公开(公告)号：US07446056B2
公开(公告)日：2008-11-04
申请号：US11293709
申请日：2005-12-01
申请人： Yao-Hui Huang , Tung-Li Lee , Chih-Hao Lin , Yen-Fei Lin , James Sun , Chen Pu-Fang , David Huang
发明人： Yao-Hui Huang , Tung-Li Lee , Chih-Hao Lin , Yen-Fei Lin , James Sun , Chen Pu-Fang , David Huang
IPC分类号： H01L21/44 , H01L21/31 , H01L21/469
CPC分类号： C23C16/0218 , C23C16/24 , H01L21/28525
摘要： The present invention relates to a method for increasing the grain size of a polysilicon layer, which includes exposing a silicon oxide wafer in a deposition chamber to an amount, effective for the purpose, of nitrogen at a flow rate of at least about 240 standard liters per minute (slm). The instant invention further relates to a method for inhibiting the formation of a polysilicon seed in a furnace, which includes the treatment as noted above. The invention also relates to a method for forming a polysilicon layer, including: forming a silicon oxide layer on a substrate, the silicon oxide layer having a plurality of oxygen molecules therein; exposing the silicon oxide layer to a predetermined amount of nitrogen-containing gas in a furnace, whereby a plurality of nitrogen molecules in the nitrogen-containing gas replaces at least part of the oxygen molecules in the silicon oxide layer; and forming a polysilicon layer on the silicon oxide layer.
摘要翻译：本发明涉及一种用于增加多晶硅层的晶粒尺寸的方法，该方法包括将沉积室中的氧化硅晶片暴露于至少约240标准升的流速下的氮的有效量每分钟（slm）。本发明还涉及一种用于抑制在炉中形成多晶硅种子的方法，其包括如上所述的处理。本发明还涉及一种用于形成多晶硅层的方法，包括：在衬底上形成氧化硅层，所述氧化硅层中具有多个氧分子; 在炉中将氧化硅层暴露于预定量的含氮气体，由此在含氮气体中的多个氮分子取代氧化硅层中的至少一部分氧分子; 以及在所述氧化硅层上形成多晶硅层。

9. 发明申请

US20070257210A1 Preventing dosage drift with duplicate dose integrators 有权
标题翻译：用重复剂量积分器预防剂量漂移
公开(公告)号：US20070257210A1
公开(公告)日：2007-11-08
申请号：US11416874
申请日：2006-05-03
申请人： Jih-Hwa Wang , Otto Chen , Fang-Chi Chien , Tung-Li Lee , Pu-Fang Chen
发明人： Jih-Hwa Wang , Otto Chen , Fang-Chi Chien , Tung-Li Lee , Pu-Fang Chen
IPC分类号： H01J37/317
CPC分类号： H01J37/3171 , H01J37/304 , H01J2237/30433 , H01J2237/30455 , H01J2237/31703
摘要： A method for identifying a drifted dose integrator in an implantation system and an implantation system are provided. The implantation system includes a first dose integrator and a second dose integrator. The first dose integrator includes a first input configured to receive a first current generated from charges carried by implanted ions in a wafer, and a first output configured to output a first accumulated dosage value. The second dose integrator includes a second dose integrator including a second input configured to receive a second current generated from the charges carried by the implanted ions in the wafer, and a second output configured to output a second accumulated dosage value. The implantation system further includes a processing unit comparing the first accumulated dosage value and the second accumulated dosage value to detect a drift in one of the first and the second dose integrators.
摘要翻译：提供了一种用于在植入系统和植入系统中识别漂移剂量积分器的方法。植入系统包括第一剂量积分器和第二剂量积分器。第一剂量积分器包括被配置为接收由晶片中的注入离子携带的电荷产生的第一电流的第一输入和被配置为输出第一累积剂量值的第一输出。所述第二剂量积分器包括第二剂量积分器，所述第二剂量积分器包括被配置为接收从由所述晶片中的所述注入离子携带的电荷产生的第二电流的第二输入，以及被配置为输出第二累积剂量值的第二输出。植入系统还包括处理单元，比较第一累积剂量值和第二累积剂量值，以检测第一和第二剂量积分器之一中的漂移。

10. 发明申请

US20060134926A1 Method for increasing polysilicon grain size 有权
标题翻译：增加多晶硅粒度的方法
公开(公告)号：US20060134926A1
公开(公告)日：2006-06-22
申请号：US11293709
申请日：2005-12-01
申请人： Yao-Hui Huang , Tung-Li Lee , Chih-Hao Lin , Yen-Fei Lin , James Sun , Chen Pu-Fang , David Huang
发明人： Yao-Hui Huang , Tung-Li Lee , Chih-Hao Lin , Yen-Fei Lin , James Sun , Chen Pu-Fang , David Huang
IPC分类号： H01L21/31
CPC分类号： C23C16/0218 , C23C16/24 , H01L21/28525
摘要： The present invention relates to a method for increasing the grain size of a polysilicon layer, which includes exposing a silicon oxide wafer in a deposition chamber to an amount, effective for the purpose, of nitrogen at a flow rate of at least about 240 standard liters per minute (slm). The instant invention further relates to a method for inhibiting the formation of a polysilicon seed in a furnace, which includes the treatment as noted above. The invention also relates to a method for forming a polysilicon layer, including: forming a silicon oxide layer on a substrate, the silicon oxide layer having a plurality of oxygen molecules therein; exposing the silicon oxide layer to a predetermined amount of nitrogen-containing gas in a furnace, whereby a plurality of nitrogen molecules in the nitrogen-containing gas replaces at least part of the oxygen molecules in the silicon oxide layer; and forming a polysilicon layer on the silicon oxide layer.
摘要翻译：本发明涉及一种用于增加多晶硅层的晶粒尺寸的方法，该方法包括将沉积室中的氧化硅晶片暴露于至少约240标准升的流速下的氮的有效量每分钟（slm）。本发明还涉及一种用于抑制在炉中形成多晶硅种子的方法，其包括如上所述的处理。本发明还涉及一种用于形成多晶硅层的方法，包括：在衬底上形成氧化硅层，所述氧化硅层中具有多个氧分子; 在炉中将氧化硅层暴露于预定量的含氮气体，由此在含氮气体中的多个氮分子取代氧化硅层中的至少一部分氧分子; 以及在所述氧化硅层上形成多晶硅层。

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