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    • 3. 发明申请
    • Matrix microprocessor and method of operation
    • 矩阵微处理器和操作方法
    • US20100180100A1
    • 2010-07-15
    • US12319934
    • 2009-01-13
    • Tsung-Hsin LuCarl AlberolaRajesh ChhabriaZhenyu Zhou
    • Tsung-Hsin LuCarl AlberolaRajesh ChhabriaZhenyu Zhou
    • G06F15/76G06F9/30
    • G06F9/30032G06F9/30036G06F9/30105G06F9/30109G06F9/3013G06F9/30141G06F9/3824G06F9/3828G06F12/0862G06F13/28
    • A microprocessor includes a direct access memory (DMA) engine which is responsive to pairs of block indices associated with one or more blocks in a first logical plane and transfers the one or more blocks between the first logical plane, a second logical plane, and a physical memory space according to the pairs of block indices. The logical planes represent two dimensional fields of data such as those found in images and videos. The microprocessor further comprises cache memory which updates its content with one or more cache-blocks which are in the neighborhood of the one or more blocks improving the operation of the cache memory by increasing cache hits. The DMA engine may further operate on n-dimensional blocks in a n-dimensional logical space. The microprocessor further includes special-purpose instructions, operative on a single-instruction-multiple-data (SIMD) computation unit, especially tailored to perform matrix operations. The SIMD may share scalar operands with an onboard single-instruction-single-data (SISD) computation unit.
    • 微处理器包括直接访问存储器(DMA)引擎,其响应于与第一逻辑平面中的一个或多个块相关联的块索引对,并且在第一逻辑平面,第二逻辑平面和第二逻辑平面之间传送一个或多个块 物理内存空间根据块索引对。 逻辑平面表示数据的二维字段,例如在图像和视频中找到的数据。 微处理器还包括高速缓存存储器,其通过一个或多个块附近的一个或多个高速缓存块更新其内容,通过增加高速缓存命中来改善高速缓冲存储器的操作。 DMA引擎还可以在n维逻辑空间中对n维块进行操作。 微处理器还包括在单指令多数据(SIMD)计算单元上操作的特殊用途指令,特别适于执行矩阵操作。 SIMD可以与板载单指令单数据(SISD)计算单元共享标量操作数。