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1. 发明申请

US20110256739A1 RECEPTACLE, PRINTED WIRING BOARD, AND ELECTRONIC DEVICE 失效
标题翻译：插座，印刷线路板和电子设备
公开(公告)号：US20110256739A1
公开(公告)日：2011-10-20
申请号：US12991442
申请日：2010-04-08
申请人： Toshiyuki Nakaie , Hirotsugu Fusayasu , Shouichi Mimura , Masafumi Kumoi , Ryo Matsubara
发明人： Toshiyuki Nakaie , Hirotsugu Fusayasu , Shouichi Mimura , Masafumi Kumoi , Ryo Matsubara
IPC分类号： H01R12/70 , H05K1/11
CPC分类号： H01R13/6467 , H01R12/724 , H01R13/6471 , H05K1/111 , H05K1/117 , H05K1/141 , H05K2201/09409 , H05K2201/09727 , H05K2201/1034 , H05K2201/10825
摘要： A receptacle includes a signal terminal, a ground terminal, and a signal terminal. A second portion of the ground terminal is distanced from a first portion of the signal terminal in an extension direction. A third portion of the signal terminal is distanced from the first portion of the signal terminal in the extension direction.
摘要翻译：插座包括信号端子，接地端子和信号端子。接地端子的第二部分在延伸方向上远离信号端子的第一部分。信号端子的第三部分在延伸方向上远离信号端子的第一部分。

2. 发明申请

US20100090710A1 IMPULSE IMMUNITY TEST APPARATUS 失效
标题翻译：刺激免疫测试装置
公开(公告)号：US20100090710A1
公开(公告)日：2010-04-15
申请号：US12530168
申请日：2008-03-06
申请人： Tsuneo Tsukagoshi , Takeshi Watanabe , Toshiyuki Nakaie , Nobuchika Matsui
发明人： Tsuneo Tsukagoshi , Takeshi Watanabe , Toshiyuki Nakaie , Nobuchika Matsui
IPC分类号： G01R27/28
CPC分类号： G01R31/002 , G01R31/2841 , G01R31/3004
摘要： The application methods in the related art cannot apply a sufficient voltage with a rectangular wave having a short rise time to an electronic circuit. Furthermore, electrostatic discharge test can apply a sufficient voltage but can only apply an oscillating waveform.A TLP generator is used as a rectangular wave generator. The sum of an injection resistance and a matching resistance is set so as to match the characteristic impedance of a transmission line for transmitting a rectangular wave to a test target. A capacitor is connected to a return line of the applied rectangular wave. With this configuration, stable application can be achieved. An error observation function of an electronic circuit gradually increases a peak value of the rectangular wave and determines the immunity based on an application voltage to cause an error for the first time.
摘要翻译：现有技术中的应用方法不能将具有上升时间短的矩形波的足够电压应用于电子电路。此外，静电放电试验可以施加足够的电压，但只能施加振荡波形。 TLP发生器用作矩形波发生器。将注入电阻和匹配电阻的和设定为与用于将矩形波发送到测试对象的传输线的特性阻抗相匹配。电容器连接到所施加的矩形波的返回线。利用这种配置，可以实现稳定的应用。电子电路的误差观察功能逐渐增加矩形波的峰值，并且基于施加电压确定第一次引起误差的抗扰度。

3. 发明申请

US20090251390A1 PLASMA DISPLAY DEVICE 审中-公开
标题翻译：等离子体显示设备
公开(公告)号：US20090251390A1
公开(公告)日：2009-10-08
申请号：US12404393
申请日：2009-03-16
申请人： Masafumi Kumoi , Hirotsugu Fusayasu , Hiroshi Kunimoto , Kei Ichikawa , Shouichi Mimura , Ryo Matsubara , Masato Tobinaga , Toshiyuki Nakaie
发明人： Masafumi Kumoi , Hirotsugu Fusayasu , Hiroshi Kunimoto , Kei Ichikawa , Shouichi Mimura , Ryo Matsubara , Masato Tobinaga , Toshiyuki Nakaie
IPC分类号： G09G3/28
CPC分类号： H05K9/0054 , G09G3/294 , G09G2330/06
摘要： A plasma display device including a plasma display panel having electrodes through which a driving current flows; a chassis conductor holding the plasma display panel and provided with a return circuit of the driving current; a conductive case enclosing the plasma display panel and the chassis conductor; and a binding portion for binding the chassis conductor and the conductive case to each other and having a connection state different depending upon a frequency of flowing current. The binding portion has a connection state in which an amount of flowing current is less than a half of that in a short-circuited state and a connection state in which the amount is not less than a half of that in a short-circuited state.
摘要翻译：一种等离子体显示装置，包括具有驱动电流流过的电极的等离子体显示面板; 保持等离子体显示面板并设置有驱动电流的回路的底架导体; 包围等离子体显示面板和底盘导体的导电壳体; 以及用于将底盘导体和导电壳体彼此结合并具有取决于流动电流频率而不同的连接状态的装订部分。装订部分具有其中流动电流量小于短路状态的一半的连接状态和其量不小于短路状态的一半的连接状态。

4. 发明申请

US20080004820A1 METHOD OF MEASURING CHARACTERISTIC IMPEDANCE OF ELECTROSTATIC DISCHARGE PROTECTING CIRCUIT AND APPARATUS FOR REALIZING THE SAME 有权
标题翻译：静电放电保护电路的特性阻抗测量方法及其实现方法
公开(公告)号：US20080004820A1
公开(公告)日：2008-01-03
申请号：US11749912
申请日：2007-05-17
申请人： Toshiyuki NAKAIE , Masanori SAWADA , Taizo SHINTANI , Natarajan Mahadeva IYER , David Eric TREMOUILLES
发明人： Toshiyuki NAKAIE , Masanori SAWADA , Taizo SHINTANI , Natarajan Mahadeva IYER , David Eric TREMOUILLES
IPC分类号： G01R27/08
CPC分类号： G01R27/04 , G01R31/2827
摘要： A method of quickly measuring a characteristic impedance of an ESD protecting circuit by applying a discharge voltage to the ESD protecting circuit, includes the steps of measuring a variation in discharge voltage applied to and a variation in discharge current caused to flow through the ESD protecting circuit with time, grasping a state until both the discharge voltage and discharge current corresponding to each other whenever a predetermined common time elapses comes to an attenuation process after both the discharge voltage and discharge current sequentially rise to come individually to respective peak values based on an input to or an output from a computer; and taking a ratio of the variation of discharge voltage to the variation of discharge current in the attenuation process as an impedance value when the ratio is nearly constant as well as an apparatus for realizing the same.
摘要翻译：通过向ESD保护电路施加放电电压来快速测量ESD保护电路的特性阻抗的方法包括以下步骤：测量施加的放电电压的变化和通过ESD保护电路流过的放电电流的变化随着时间的推移，掌握状态直到当预定的公共时间过去时彼此对应的放电电压和放电电流到达放电电压和放电电流顺序上升之后的衰减处理，以分别基于输入的各个峰值到或来自计算机的输出; 并且当该比率几乎恒定时，将放电电压的变化与衰减处理中的放电电流的变化的比率以及实现该比率的装置进行比较。

5. 发明授权

US4677375A Apparatus for testing integrated circuit 失效
标题翻译：集成电路测试装置
公开(公告)号：US4677375A
公开(公告)日：1987-06-30
申请号：US745265
申请日：1985-06-14
申请人： Toshiyuki Nakaie , Akira Yoshino
发明人： Toshiyuki Nakaie , Akira Yoshino
IPC分类号： G01R31/28 , G01R31/26 , G01R1/04
CPC分类号： G01R31/2886
摘要： An apparatus for testing plug-in type integrated circuits by applying a potential across their input and output terminals, utilizing a socket board with a plurality of sockets bored therein to receive respective input and output terminals of an integrated circuit. A pair of first and second groups of fixed contacts are located in the socket board, arranged in two concentric circles enclosing the sockets. Each fixed contact in each group is individually connected to one of the sockets through a conductor. A pair of coaxial first and second moving contact pins is rotatably disposed below the socket board. The first contact pin rotates to follow the first circle while sequentially contacting the contacts of the first group. The second contact pin follows the second circle, making sequential contact with the fixed contacts of the second group. It is so arranged that, when both contact pins are brought into contact with a selected pair of contacts from the two groups, one contact pin connects an input terminal while the other contact pin connects an output terminal, or vice versa, of the integrated circuit mounted on the socket board. In doing so, the contact pins pass current across the output and input terminals for a test.
摘要翻译：一种用于通过在其输入和输出端子上施加电位来测试插入式集成电路的装置，利用其中钻有多个插座的插座板来接收集成电路的相应输入和输出端子。一对第一组和第二组固定触点位于插座板中，布置成包围插座的两个同心圆。每个组中的每个固定触点通过导体单独连接到一个插座。一对同轴的第一和第二移动接触销可旋转地设置在插座板下方。第一接触销旋转以跟随第一圆，同时顺序地接触第一组的触点。第二接触针跟随第二个圆，与第二组的固定触点顺序接触。这样布置使得当两个接触销与两组中所选择的一对触点接触时，一个触针连接输入端，而另一个触针连接集成电路的输出端，反之亦然安装在插座板上。在这样做时，触点引脚将通过输出和输入端子的电流进行测试。

6. 发明授权

US08829972B2 Integral value measuring circuit 有权
标题翻译：积分值测量电路
公开(公告)号：US08829972B2
公开(公告)日：2014-09-09
申请号：US13542999
申请日：2012-07-06
申请人： Toshiyuki Nakaie , Joji Kayano
发明人： Toshiyuki Nakaie , Joji Kayano
IPC分类号： G06F7/64 , G01R22/08 , G01R19/00
CPC分类号： G01R22/08 , G01R19/0023
摘要： An integral value measuring circuit includes an operational amplifier and a capacitor connected between input and output sides thereof, an electric potential of an output terminal where a predetermined resistance element connected to an output side of the operational amplifier is being zero, positive and negative DC voltage generating circuits which comprise positive and negative power sources, respectively, at the output side of the operational amplifier, the positive and negative DC voltage generating circuits and being connected to positive and negative power terminals, respectively, of the operational amplifier through switches, and a connection line between the negative power terminal and one switch and a connection line between the positive power terminal and another switch being connected to the positive and negative power terminals, respectively, of the operational amplifier through cross resistance elements having resistance values negligible compared to a leakage resistance value of the switches.
摘要翻译：积分值测量电路包括运算放大器和连接在其输入和输出侧之间的电容器，连接到运算放大器的输出侧的预定电阻元件为零的输出端子的电位为正，负直流电压分别在运算放大器的输出侧，正和负的直流电压产生电路分别包括正电源和负电源的发电电路，分别通过开关连接到运算放大器的正和负电源端子，以及负电源端子和一个开关之间的连接线和正电源端子和另一个开关之间的连接线分别通过具有与泄漏相比可忽略的电阻值的交叉电阻元件分别连接到运算放大器的正电源端子和负电源端子阻力v 开关的名称。

7. 发明授权

US08162671B2 Receptacle structure, printed wiring board structure, and electronic device 有权
标题翻译：插座结构，印刷线路板结构和电子设备
公开(公告)号：US08162671B2
公开(公告)日：2012-04-24
申请号：US12837517
申请日：2010-07-16
申请人： Ryou Matsubara , Shouichi Mimura , Hirotsugu Fusayasu , Masafumi Kumoi , Toshiyuki Nakaie
发明人： Ryou Matsubara , Shouichi Mimura , Hirotsugu Fusayasu , Masafumi Kumoi , Toshiyuki Nakaie
IPC分类号： H01R12/00
CPC分类号： H01R43/16 , H01R12/724 , H01R13/6582 , H05K1/111 , H05K1/141 , H05K3/3426 , H05K2201/0373 , H05K2201/09709 , H05K2201/09727 , H05K2201/1034 , H05K2201/10757 , H05K2201/10818 , Y02P70/611
摘要： A receptacle structure includes a housing structure, a terminal insulating board, a first terminal and a second terminal. The housing structure is configured to be mounted on a printed wiring board and to accommodate a plug. The terminal insulating board includes a top face and a bottom face that is opposite to the top face. The terminal insulating board is disposed inside the housing structure with the bottom face facing towards the printed wiring board. The first terminal is connected to the printed wiring board via the first rear connection part and to the terminal insulating board. The second terminal is connected to the printed wiring board via the first front connection part and to the terminal insulating board. The first front connection part has a width narrower than the first rear connection part and is connected to the printed wiring board away from the first rear connection part.
摘要翻译：插座结构包括壳体结构，端子绝缘板，第一端子和第二端子。壳体结构被配置为安装在印刷线路板上并容纳插头。端子绝缘板包括顶面和与顶面相对的底面。端子绝缘板设置在壳体结构内部，底面朝向印刷线路板。第一端子经由第一后连接部和端子绝缘板与印刷电路板连接。第二端子经由第一前连接部和端子绝缘板与印刷电路板连接。第一前连接部分具有比第一后连接部分窄的宽度，并且与第一后连接部分连接到印刷线路板。

8. 发明授权

US07609076B2 Method of measuring characteristic impedance of electrostatic discharge protecting circuit and apparatus for realizing the same 有权
标题翻译：测量静电放电保护电路的特性阻抗的方法及其实现方法
公开(公告)号：US07609076B2
公开(公告)日：2009-10-27
申请号：US11749912
申请日：2007-05-17
申请人： Toshiyuki Nakaie , Masanori Sawada , Taizo Shintani , Natarajan Mahadeva Iyer , David Eric Tremouilles
发明人： Toshiyuki Nakaie , Masanori Sawada , Taizo Shintani , Natarajan Mahadeva Iyer , David Eric Tremouilles
IPC分类号： G01R27/08
CPC分类号： G01R27/04 , G01R31/2827
摘要： A method of quickly measuring a characteristic impedance of an ESD protecting circuit by applying a discharge voltage to the ESD protecting circuit, includes the steps of measuring a variation in discharge voltage applied to and a variation in discharge current caused to flow through the ESD protecting circuit with time; simultaneously detecting a state when both the discharge voltage and discharge current corresponding to each other are attenuated, after both the discharge voltage and discharge current sequentially rise to arrive individually to respective peak values based on an input to or an output from a computer; and taking a ratio of the variation of discharge voltage to the variation of discharge current during the attenuation as an impedance value when the ratio is nearly constant as well as an apparatus for realizing the same.
摘要翻译：通过向ESD保护电路施加放电电压来快速测量ESD保护电路的特性阻抗的方法包括以下步骤：测量施加的放电电压的变化和通过ESD保护电路流过的放电电流的变化随着时间的推移; 同时检测放电电压和放电电流两者彼此衰减时的状态，在放电电压和放电电流两者依次从计算机输入或从计算机输出之后依次上升到相应的峰值时; 并且当该比率几乎恒定时，将放电电压的变化与衰减期间的放电电流的变化的比率以及实现该比率的装置进行比较。

9. 发明申请

US20090237907A1 Plasma display device 失效
标题翻译：等离子显示装置
公开(公告)号：US20090237907A1
公开(公告)日：2009-09-24
申请号：US12404388
申请日：2009-03-16
申请人： Hiroshi Kunimoto , Hirotsugu Fusayasu , Shouichi Mimura , Kei Ichikawa , Masafumi Kumoi , Ryo Matsubara , Masato Tobinaga , Toshiyuki Nakaie
发明人： Hiroshi Kunimoto , Hirotsugu Fusayasu , Shouichi Mimura , Kei Ichikawa , Masafumi Kumoi , Ryo Matsubara , Masato Tobinaga , Toshiyuki Nakaie
IPC分类号： H05K9/00
CPC分类号： H05K9/0054
摘要： A plasma display device capable of reducing an electromagnetic interference wave due to a driving current flowing in a plasma display panel is provided. The plasma display device includes a plasma display panel having electrodes that are parallel to each other, a driver circuit board for applying a voltage to the electrodes, a chassis conductor holding the plasma display panel and to which a ground of the driver circuit board is connected, and a first additional conductor plate provided to the chassis conductor via an insulating layer and to which grounds of at least one circuit board in circuit boards other than the driver circuit board are attached.
摘要翻译：提供一种等离子体显示装置，其能够减少由于在等离子体显示面板中流动的驱动电流引起的电磁干扰波。等离子体显示装置包括具有彼此平行的电极的等离子体显示面板，用于向电极施加电压的驱动电路板，保持等离子体显示面板并且驱动电路板的接地连接到其上的底座导体以及第一附加导体板，其经由绝缘层设置到机架导体，并且除了驱动器电路板之外的电路板中的至少一个电路板的接地附接到该第一附加导体板。

10. 发明申请

US20090231238A1 Plasma display device 审中-公开
标题翻译：等离子显示装置
公开(公告)号：US20090231238A1
公开(公告)日：2009-09-17
申请号：US12404383
申请日：2009-03-16
申请人： Hirotsugu Fusayasu , Shouichi Mimura , Hiroshi Kunimoto , Kei Ichikawa , Masafumi Kumoi , Ryo Matsubara , Masato Tobinaga , Toshiyuki Nakaie
发明人： Hirotsugu Fusayasu , Shouichi Mimura , Hiroshi Kunimoto , Kei Ichikawa , Masafumi Kumoi , Ryo Matsubara , Masato Tobinaga , Toshiyuki Nakaie
IPC分类号： G09G3/28
CPC分类号： H01J11/46 , H01J11/12 , H05K9/0096
摘要： A plasma display device includes a plasma display module having a plasma display panel provided with a plurality of parallel electrodes, a circuit board for applying a voltage to the electrodes, and a chassis conductor configured to hold the plasma display panel and to which a ground of a circuit board is coupled, and further includes a cylindrical conductor portion configured to surround the plasma display module.
摘要翻译：等离子体显示装置包括等离子体显示模块，其具有设置有多个平行电极的等离子体显示面板，用于向电极施加电压的电路板以及配置成保持等离子体显示面板的底板导体，电路板被耦合，并且还包括构造成围绕等离子体显示模块的圆柱形导体部分。

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