专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07589549B2 Driver circuit and test apparatus 失效
标题翻译：驱动电路和测试仪器
公开(公告)号：US07589549B2
公开(公告)日：2009-09-15
申请号：US11941083
申请日：2007-11-16
申请人： Kensuke Kamo , Takashi Sekino , Toshiaki Awaji
发明人： Kensuke Kamo , Takashi Sekino , Toshiaki Awaji
IPC分类号： G01R31/26
CPC分类号： G01R31/31924
摘要： Provided is a driver circuit that includes a first operational mode and a second operational mode and outputs an output signal according to an input signal, including a first driver section that, in the first operational mode, generates and outputs the output signal according to the input signal and, in the second operational mode, outputs a power supply power having a predetermined voltage and a second driver section that, in the first operational mode, receives the output signal output by the first driver section and outputs the received signal to the outside and, in the second operational mode, generates the output signal according to the input signal and outputs the thus generated signal to the outside. The second driver section includes a first transistor that, in the second operational mode, generates the output signal by operating according to the input signal and receives the power supply power from the first driver section and a second transistor that, in the second operational mode, operates differentially with respect to the first transistor and receives the power supply power from the first driver section commonly with the first transistor.
摘要翻译：提供了包括第一操作模式和第二操作模式的驱动器电路，并且根据输入信号输出输出信号，该输入信号包括第一驱动器部分，其在第一操作模式中产生并根据输入输出输出信号信号，并且在第二操作模式中，输出具有预定电压的电源电力和第二驱动器部分，其在第一操作模式中接收由第一驱动器部分输出的输出信号并将接收的信号输出到外部，在第二操作模式中，根据输入信号产生输出信号，并将这样生成的信号输出到外部。第二驱动器部分包括第一晶体管，其在第二操作模式中通过根据输入信号进行操作并且从第一驱动器部分接收电源功率并且在第二操作模式中接收第二晶体管来产生输出信号，相对于第一晶体管工作差分地接收来自与第一晶体管共同的第一驱动器部分的电源功率。

2. 发明申请

US20090128182A1 DRIVER CIRCUIT AND TEST APPARATUS 失效
标题翻译：驱动电路和测试装置
公开(公告)号：US20090128182A1
公开(公告)日：2009-05-21
申请号：US11941086
申请日：2007-11-16
申请人： KENSUKE KAMO , TAKASHI SEKINO , TOSHIAKI AWAJI
发明人： KENSUKE KAMO , TAKASHI SEKINO , TOSHIAKI AWAJI
IPC分类号： G01R31/26 , H03K3/00
CPC分类号： G01R31/31924
摘要： Provided is a driver circuit that has a first operational mode and a second operational mode and outputs an output signal according to an input signal. The driver circuit includes a first driver section that, in the first operational mode, generates and outputs the output signal according to the input signal and, in the second operational mode, is controlled to be disabled; a high precision driver section that, in the first operational mode, is controlled to be disabled and, in the second operational mode, outputs a source power having a predetermined voltage; and a second driver section that, in the first operational mode, receives the output signal output by the first driver section and outputs the received signal to the outside and, in the second operational mode, receives the source power from the high precision driver section, generates the output signal according to the input signal, and outputs the thus generated signal to the outside.
摘要翻译：提供了具有第一操作模式和第二操作模式的驱动器电路，并且根据输入信号输出输出信号。驱动器电路包括第一驱动器部分，其在第一操作模式中根据输入信号产生并输出输出信号，并且在第二操作模式中被控制为禁用; 高精度驱动器部分，其在第一操作模式中被控制为禁用，并且在第二操作模式中，输出具有预定电压的源电源; 以及第二驱动器部，其在第一操作模式中接收由第一驱动器部分输出的输出信号并将接收到的信号输出到外部，并且在第二操作模式中，从高精度驱动器部分接收源功率，根据输入信号生成输出信号，并将这样生成的信号输出到外部。

3. 发明申请

US20080120059A1 Test apparatus and test method 有权
公开(公告)号：US20080120059A1
公开(公告)日：2008-05-22
申请号：US11600676
申请日：2006-11-16
申请人： Toshiaki Awaji , Takashi Sekino , Takayuki Nakamura
发明人： Toshiaki Awaji , Takashi Sekino , Takayuki Nakamura
IPC分类号： G01R31/3183
CPC分类号： G01R31/31922 , G01R31/3016 , G01R31/31725 , G01R31/31727
摘要： There is provided a test apparatus that decides the good or bad of an electronic device adopting source synchronous clocking with high precision. The test apparatus according to this invention includes: a reference clock generator that generates a reference clock for the test apparatus; a first variable delay circuit that delays a data signal output from the device under test by a designated time to output the delayed signal as a delay data signal; a second variable delay circuit that delays a clock signal showing a timing at which the data signal should be acquired, which is output from the device under test, by a designated time to output the delayed clock signal as a first delay clock signal; a first flip-flop that acquires the delay data signal at a timing based on the reference clock; a second flip-flop that acquires the first delay clock signal at a timing based on the reference clock; a first delay adjusting section that adjust a delay amount of at least one of the first variable delay circuit and the second variable delay circuit so that the first flip-flop and the second flip-flop acquire the delay data signal and the first delay clock signal at a timing at which the signals are changed; a third variable delay circuit that delays the clock signal by a designated time to output the delayed clock signal as a second delay clock signal; a second delay adjusting section that adjusts a delay amount of the third variable delay circuit based on a result obtained by acquiring the first delay clock signal of which a phase is adjusted by the first delay adjusting section at a timing at which the second delay clock signal is changed, in order to adjust a phase difference between the first delay clock signal and the second delay clock signal to a desired phase difference; and a deciding section that decides the good or bad of the signal output from the device under test based on a result obtained by acquiring the delay data signal at a timing at which the second delay clock signal is changed.

4. 发明授权

US07208982B2 Sampling circuit 有权
标题翻译：采样电路
公开(公告)号：US07208982B2
公开(公告)日：2007-04-24
申请号：US11271132
申请日：2005-11-10
申请人： Masahiro Yamakawa , Yoshiharu Umemura , Toshiaki Awaji , Satoshi Shiwa
发明人： Masahiro Yamakawa , Yoshiharu Umemura , Toshiaki Awaji , Satoshi Shiwa
IPC分类号： G11C27/02
CPC分类号： H03M1/1245
摘要： A sampling circuit for compensating the phase difference of a sampling pulse due to a temperature variation to accurately sample input signals is provided. The sampling circuit samples received input signals. The sampling circuit includes a pulse generator for generating a pulse signal according to a timing at which an input signal should be sampled, a step recovery diode for outputting a sampling pulse responsive to the pulse signal, a detector for detecting the value for the input signal according to the sampling pulse, a temperature detecting circuit for detecting the temperature around the step recovery diode and a temperature compensating unit for controlling a timing at which the step recovery diode outputs the sampling pulse based on the temperature detected by the temperature detecting circuit.
摘要翻译：提供了一种用于补偿由于温度变化导致的采样脉冲的相位差以准确采样输入信号的采样电路。采样电路对接收到的输入信号进行采样。采样电路包括脉冲发生器，用于根据输入信号应采样的定时产生脉冲信号;步骤恢复二极管，用于响应脉冲信号输出采样脉冲;检测器，用于检测输入信号的值根据采样脉冲，用于检测阶梯恢复二极管周围的温度的温度检测电路和温度补偿单元，用于根据由温度检测电路检测的温度来控制阶梯恢复二极管输出采样脉冲的定时。

5. 发明申请

US20100001776A1 DIFFERENTIAL SIGNAL TRANSMITTING APPARATUS AND A TEST APPARATUS 有权
标题翻译：差分信号发送装置和测试装置
公开(公告)号：US20100001776A1
公开(公告)日：2010-01-07
申请号：US12204814
申请日：2008-09-05
申请人： TAKAYUKI NAKAMURA , TOSHIAKI AWAJI
发明人： TAKAYUKI NAKAMURA , TOSHIAKI AWAJI
IPC分类号： H03H11/16 , H03K5/13
CPC分类号： G01R31/31917 , G01R31/3191 , H04L25/0272
摘要： Provided is a differential signal transmission apparatus that transmits a differential signal expressed by a potential difference between a positive signal and a negative signal, including a positive signal transmission line that transmits the positive signal; a negative signal transmission line that transmits the negative signal; and a delay compensating circuit that compensates for a time difference between the positive signal and the negative signal with a variable compensation time.
摘要翻译：提供一种差分信号发送装置，其发送由正信号和负信号之间的电位差表示的差分信号，包括发送正信号的正信号传输线; 发送负信号的负信号传输线; 以及延迟补偿电路，其以可变的补偿时间补偿正信号和负信号之间的时间差。

6. 发明申请

US20090209210A1 DRIVER CIRCUIT AND TEST APPARATUS 有权
标题翻译：驱动电路和测试装置
公开(公告)号：US20090209210A1
公开(公告)日：2009-08-20
申请号：US12030878
申请日：2008-02-14
申请人： Kensuke Kamo , Takashi Sekino , Toshiaki Awaji
发明人： Kensuke Kamo , Takashi Sekino , Toshiaki Awaji
IPC分类号： H04B17/00
CPC分类号： H04L1/244 , H04L25/028 , H04L25/03343 , H04L25/03878
摘要： Provided is a driver circuit that outputs a transmission signal according to a reception signal received from outside, including a first driver that outputs a voltage according to an input first signal; a second driver that receives the voltage output by the first driver as a power supply voltage and outputs the transmission signal according to the power supply voltage and an input second signal; and a control section that delays both the first signal and the second signal, according to a change of the reception signal, and causes the transmission signal according to the reception signal to be output from the second driver.
摘要翻译：提供一种驱动电路，其根据从外部接收的接收信号输出发送信号，包括根据输入的第一信号输出电压的第一驱动器; 第二驱动器，接收由第一驱动器输出的电压作为电源电压，并根据电源电压和输入的第二信号输出发送信号; 以及根据接收信号的变化来延迟第一信号和第二信号两者的控制部分，并且根据接收信号使发送信号从第二驱动器输出。

7. 发明申请

US20060097898A1 Sampling circuit 有权
标题翻译：采样电路
公开(公告)号：US20060097898A1
公开(公告)日：2006-05-11
申请号：US11271132
申请日：2005-11-10
申请人： Masahiro Yamakawa , Yoshiharu Umemura , Toshiaki Awaji , Satoshi Shiwa
发明人： Masahiro Yamakawa , Yoshiharu Umemura , Toshiaki Awaji , Satoshi Shiwa
IPC分类号： H03M1/10
CPC分类号： H03M1/1245
摘要： A sampling circuit for compensating the phase difference of a sampling pulse due to a temperature variation to accurately sample input signals is provided. The sampling circuit samples received input signals. The sampling circuit includes a pulse generator for generating a pulse signal according to a timing at which an input signal should be sampled, a step recovery diode for outputting a sampling pulse responsive to the pulse signal, a detector for detecting the value for the input signal according to the sampling pulse, a temperature detecting circuit for detecting the temperature around the step recovery diode and a temperature compensating unit for controlling a timing at which the step recovery diode outputs the sampling pulse based on the temperature detected by the temperature detecting circuit.
摘要翻译：提供了一种用于补偿由于温度变化导致的采样脉冲的相位差以准确采样输入信号的采样电路。采样电路对接收到的输入信号进行采样。采样电路包括脉冲发生器，用于根据输入信号应采样的定时产生脉冲信号;步骤恢复二极管，用于响应脉冲信号输出采样脉冲;检测器，用于检测输入信号的值根据采样脉冲，用于检测阶梯恢复二极管周围的温度的温度检测电路和温度补偿单元，用于根据由温度检测电路检测到的温度来控制阶梯恢复二极管输出采样脉冲的定时。

8. 发明申请

US20050243906A1 Test device and setting method 有权
标题翻译：测试装置和设定方法
公开(公告)号：US20050243906A1
公开(公告)日：2005-11-03
申请号：US11094325
申请日：2005-03-30
申请人： Toshiaki Awaji , Takashi Sekino
发明人： Toshiaki Awaji , Takashi Sekino
IPC分类号： G01R31/28 , G01R31/319 , H04B17/00
CPC分类号： G01R31/31924
摘要： A testing apparatus for testing a device under test is provided, wherein the testing apparatus includes: a comparator for receiving a signal output from the device under test and converting the signal into a logic signal by comparing the signal with a first reference voltage; a driver for amplifying a logic signal to be output to the device under test on the basis of a second reference voltage and outputting to the device under test; a comparator setting unit for determining the first reference voltage so as to compensate for a delay amount of a reception signal received from the device under test and setting the comparator to be the first reference voltage; and a driver setting unit for determining the second reference voltage on the basis of the reference voltage of the comparator and setting the driver to be the second reference voltage.
摘要翻译：提供了一种用于测试被测器件的测试装置，其中测试装置包括：比较器，用于接收从被测器件输出的信号，并将该信号与第一参考电压进行比较，将该信号转换成逻辑信号; 驱动器，用于基于第二参考电压放大要输出到被测器件的逻辑信号并输出到被测器件; 比较器设置单元，用于确定第一参考电压，以补偿从被测器件接收的接收信号的延迟量，并将比较器设置为第一参考电压; 以及驱动器设置单元，用于基于比较器的参考电压来确定第二参考电压，并将驱动器设置为第二参考电压。

9. 发明授权

US5699001A Driver circuit for semiconductor test system 失效
标题翻译：半导体测试系统的驱动电路
公开(公告)号：US5699001A
公开(公告)日：1997-12-16
申请号：US728831
申请日：1996-10-10
申请人： Toshiaki Awaji , Masakazu Ando
发明人： Toshiaki Awaji , Masakazu Ando
IPC分类号： G01R31/319 , H03K17/00 , H03K17/66 , H03K1/00 , H03K17/74
CPC分类号： H03K17/667 , G01R31/31924 , H03K2217/0036
摘要： A driver circuit for a semiconductor test system significantly reduces power consumption and limits current flowing from a power-supply. The driver circuit provides a test signal having predetermined voltage levels to a semiconductor test under test by switching diode bridges connected with high and low reference voltages. When receiving a switching signal, transistor circuits drive the diode bridge so that a test signal having the reference voltage is supplied to an output driver through the selected diode bridge. The output driver then supplies the test signal to the semiconductor device under test. The transistor circuits drive the diode bridge by supplying bridge current to ON/OFF control the diode bridges. Each of the diode bridges has a plurality of diodes connected symmetrically and an output of the diode bridge is taken from a point shifted by one diode from a center the diode bridge. The output driver is formed of a first and second pairs of transistors each pair of transistors are connected in a current Miller fashion, and the first pair of transistors are NPN transistors and the second pair of transistors are PNP transistors.
摘要翻译：用于半导体测试系统的驱动器电路显着地降低功耗并限制从电源流出的电流。驱动器电路通过与高和低参考电压连接的二极管桥提供具有预定电压电平的测试信号到被测半导体测试。当接收到开关信号时，晶体管电路驱动二极管桥，使得具有参考电压的测试信号通过选定的二极管桥提供给输出驱动器。然后，输出驱动器将测试信号提供给被测半导体器件。晶体管电路通过提供桥接电流来驱动二极管桥，以对二极管桥进行ON / OFF控制。每个二极管桥具有对称连接的多个二极管，并且二极管桥的输出是从二极管桥的中心从一个二极管偏移的点取得的。输出驱动器由第一和第二对晶体管形成，每对晶体管以当前的米勒方式连接，第一对晶体管是NPN晶体管，第二对晶体管是PNP晶体管。

10. 发明授权

US07512872B2 Test apparatus and test method 有权
标题翻译：试验装置及试验方法
公开(公告)号：US07512872B2
公开(公告)日：2009-03-31
申请号：US11600676
申请日：2006-11-16
申请人： Toshiaki Awaji , Takashi Sekino , Takayuki Nakamura
发明人： Toshiaki Awaji , Takashi Sekino , Takayuki Nakamura
IPC分类号： G11B27/00 , H03M13/00 , G01R31/28
CPC分类号： G01R31/31922 , G01R31/3016 , G01R31/31725 , G01R31/31727
摘要： The apparatus includes a first variable delay circuit that delays a data signal from a device under test (DUT) to output a delay data signal; a second variable delay circuit that delays a clock signal to output a first delay clock signal; a first FF that acquires the delay data signal based on a reference clock; a second FF that acquires the first delay clock signal based on the clock; a first delay adjusting section that adjusts a delay amount of at least one of the first and second variable delay circuits so that the first and second FFs acquire the delay data signal and the first delay clock signal when the signals are changed; a third variable delay circuit that delays the clock signal to output a second delay clock signal; a second delay adjusting section that adjusts a delay amount of the third variable delay circuit based on the acquired first delay clock signal of which a phase is adjusted by the first delay adjusting section when the second delay clock is changed, in order to adjust a phase difference between the first and second delay clock signals to a desired phase difference; a deciding section that decides the quality of the data signal from the DUT based on a result obtained by acquiring the delay data signal when the second delay clock signal is changed.
摘要翻译：该装置包括：第一可变延迟电路，用于延迟来自被测器件（DUT）的数据信号以输出延迟数据信号; 延迟时钟信号以输出第一延迟时钟信号的第二可变延迟电路; 基于参考时钟获取延迟数据信号的第一FF; 第二FF，其基于时钟获取第一延迟时钟信号; 第一延迟调整部分，调整第一和第二可变延迟电路中的至少一个的延迟量，使得当信号改变时第一和第二FF获取延迟数据信号和第一延迟时钟信号; 第三可变延迟电路，延迟所述时钟信号以输出第二延迟时钟信号; 第二延迟调整部分，当第二延迟时钟改变时，基于所获取的第一延迟时钟信号调整第三可变延迟电路的延迟量，该第一延迟时钟信号由第一延迟调整部分调整相位，以便调整相位第一和第二延迟时钟信号之间的差异达到期望的相位差; 判定部，其基于当所述第二延迟时钟信号改变时通过获取所述延迟数据信号获得的结果来决定来自所述DUT的数据信号的质量。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式