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1. 发明申请

US20120313065A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20120313065A1
公开(公告)日：2012-12-13
申请号：US13431330
申请日：2012-03-27
申请人： Jun NISHIMURA , Nobuaki YASUTAKE , Takayuki OKAMURA
发明人： Jun NISHIMURA , Nobuaki YASUTAKE , Takayuki OKAMURA
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L27/1021 , H01L27/2409 , H01L27/2481 , H01L29/868 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： A semiconductor memory device includes a cell array layer including a first wire, a memory cell stacked on the first wire, and a second wire formed on the memory cell. The memory cell includes a variable resistance element and a current control element The current control element includes a first conductivity-type semiconductor into which a first impurity is doped, an i-type semiconductor in contact with the first conductivity-type semiconductor, a second conductivity-type semiconductor into which a second impurity is doped, and an impact ionization acceleration unit being formed between the i-type semiconductor and one of the first conductivity-type semiconductor and the second conductivity-type semiconductor.
摘要翻译：一种半导体存储器件包括：单元阵列层，包括第一布线，堆叠在第一布线上的存储单元和形成在存储单元上的第二布线。存储单元包括可变电阻元件和电流控制元件电流控制元件包括掺杂有第一杂质的第一导电型半导体，与第一导电型半导体接触的i型半导体，第二导电型型半导体，其中第二杂质被掺杂到其中，并且冲击电离加速单元形成在i型半导体与第一导电型半导体和第二导电型半导体之一之间。

2. 发明授权

US07960779B2 Nonvolatile semiconductor memory and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US07960779B2
公开(公告)日：2011-06-14
申请号：US12393186
申请日：2009-02-26
申请人： Takayuki Toba , Takayuki Okamura , Moto Yabuki
发明人： Takayuki Toba , Takayuki Okamura , Moto Yabuki
IPC分类号： H01L29/792 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/11573
摘要： A nonvolatile semiconductor memory of an aspect of the invention includes memory cells in the memory cell forming area, and select gate transistors in the select gate forming area. Each memory cell has two first diffusion layers formed in a semiconductor substrate, a first gate insulating film formed on the semiconductor substrate, a charge storage layer formed on the first gate insulating film, a first intermediate insulating film formed on the charge storage layer and a first gate electrode formed on the first intermediate insulating film. Each select gate transistor has two second diffusion layers formed in the semiconductor substrate, a second gate insulating film formed on the semiconductor substrate, a second intermediate insulating film formed in direct contact with the second gate insulating film and having the same structure as the first intermediate insulating film, and a second gate electrode formed on the second intermediate insulating film.
摘要翻译：本发明的一个方面的非易失性半导体存储器包括存储单元形成区域中的存储单元，并且在选择栅极形成区域中选择栅极晶体管。每个存储单元具有形成在半导体衬底中的两个第一扩散层，形成在半导体衬底上的第一栅极绝缘膜，形成在第一栅极绝缘膜上的电荷存储层，形成在电荷存储层上的第一中间绝缘膜和第一栅电极，形成在第一中间绝缘膜上。每个选择晶体管具有形成在半导体衬底中的两个第二扩散层，形成在半导体衬底上的第二栅极绝缘膜，与第二栅极绝缘膜直接接触形成并具有与第一中间层相同结构的第二中间绝缘膜绝缘膜和形成在第二中间绝缘膜上的第二栅电极。

3. 发明授权

US07872296B2 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US07872296B2
公开(公告)日：2011-01-18
申请号：US12166635
申请日：2008-07-02
申请人： Takayuki Okamura
发明人： Takayuki Okamura
IPC分类号： H01L29/788
CPC分类号： H01L29/42336 , H01L21/28273 , H01L21/28282 , H01L27/11521 , H01L27/11568 , H01L29/42352
摘要： A semiconductor memory device includes a semiconductor substrate having a projection, an upper end portion of the projection being curved, a first element isolation insulating film formed on the substrate surface at the root of the projection, having an upper surface lower than an upper surface of the projection, a second element isolation insulating film formed in the projection, a gate insulating film formed on the projection, and including a charge storage layer, and a gate electrode formed on the gate insulating film. A height of a first portion where the gate electrode is in contact with the gate insulating film above the upper surface of the first element isolation insulating film is smaller than that of a second portion where the gate electrode is in contact with the gate insulating film above an upper end of the second element isolation insulating film.
摘要翻译：半导体存储器件包括具有突起的半导体衬底，所述突起的上端部弯曲，形成在所述突起根部的所述衬底表面上的第一元件隔离绝缘膜，所述第一元件隔离绝缘膜的上表面低于所述突起的上表面突起部，形成在突起中的第二元件隔离绝缘膜，形成在突起上的栅极绝缘膜，并且包括电荷存储层，以及形成在栅极绝缘膜上的栅电极。栅极与第一元件隔离绝缘膜的上表面之上的栅极绝缘膜接触的第一部分的高度小于栅电极与上述栅极绝缘膜接触的第二部分的高度第二元件隔离绝缘膜的上端。

4. 发明申请

US20100315857A1 RESISTANCE CHANGE MEMORY 审中-公开
标题翻译：电阻变化记忆
公开(公告)号：US20100315857A1
公开(公告)日：2010-12-16
申请号：US12755891
申请日：2010-04-07
申请人： Takeshi SONEHARA , Takayuki OKAMURA , Takashi SHIGEOKA , Masaki KONDO
发明人： Takeshi SONEHARA , Takayuki OKAMURA , Takashi SHIGEOKA , Masaki KONDO
IPC分类号： G11C11/00 , H01L45/00
CPC分类号： G11C13/0004 , B82Y10/00 , G11C13/0007 , G11C13/003 , G11C13/025 , G11C2013/0073 , G11C2213/71 , G11C2213/72 , G11C2213/76 , H01L27/2409 , H01L27/2418 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/1233
摘要： A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectifying element connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a voltage to change a resistance of the memory element between first and second values reversibly. The rectifying element is a diode including an anode layer, a cathode layer and an insulating layer therebetween.
摘要翻译：电阻变化存储器包括沿第一方向延伸的第一导电线，在与第一方向交叉的第二方向上延伸的第二导线，包括存储元件和整流元件的电池单元，串联连接在第一和第第二导线，以及连接到第一和第二导线两者的控制电路。控制电路控制电压以可逆地改变第一和第二值之间的存储元件的电阻。整流元件是包括阳极层，阴极层和绝缘层的二极管。

5. 发明申请

US20100219538A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100219538A1
公开(公告)日：2010-09-02
申请号：US12776454
申请日：2010-05-10
申请人： Masaru KITO , Hideaki Aochi , Takayuki Okamura
发明人： Masaru KITO , Hideaki Aochi , Takayuki Okamura
IPC分类号： H01L23/538
CPC分类号： H01L21/3086 , H01L21/3088 , H01L27/105 , H01L27/1052 , H01L27/11524
摘要： A semiconductor device comprises a semiconductor layer including a plurality of paralleled linear straight sections extending in a first direction. The layer also includes a plurality of connecting sections each having a width in the first direction sufficient to form a wire-connectable contact therein and arranged to connect between adjacent ones of the straight sections in a second direction. The connecting sections have respective ends formed aligned with a first straight line parallel to the second direction.
摘要翻译：半导体器件包括半导体层，该半导体层包括在第一方向上延伸的多个平行的线性直线部分。该层还包括多个连接部分，每个连接部分具有在第一方向上的宽度，足以在其中形成可接线的触点，并且布置成在第二方向上在相邻的直部分之间连接。连接部具有与平行于第二方向的第一直线对准的各自的端部。

6. 发明授权

US4725483A Copolyester film and a method for production thereof 失效
标题翻译：共聚酯膜及其制备方法
公开(公告)号：US4725483A
公开(公告)日：1988-02-16
申请号：US865969
申请日：1986-05-22
申请人： Masao Ishii , Takayuki Okamura , Keishiro Igi , Osamu Kusudo , Yoshito Hamamoto
发明人： Masao Ishii , Takayuki Okamura , Keishiro Igi , Osamu Kusudo , Yoshito Hamamoto
IPC分类号： C09J7/02 , B29C47/88 , B32B15/08 , B32B15/09 , C08G63/00 , C08G63/18 , C08G63/181 , C08G63/183 , C08G63/672 , C08J5/18 , C09J7/00 , C09J167/00 , C09J167/02 , B32B7/00 , B32B27/06 , B32B27/36
CPC分类号： C08J5/18 , B29C47/0021 , B29C47/8805 , B29C47/8845 , C08G63/672 , C09J7/00 , C08J2367/02 , Y10T428/31786
摘要： A copolyester film is disclosed which comprises a copolyester in which the dicarboxylic acid component comprises 100 to 85 mole percent of terephthalic acid and the diol component comprises 65 to 97 mole percent of 1,4-butanediol and 3 to 35 mole percent of a polyethylene glycol with a molecular weight of 106 to 550. The copolyester has a reduced viscosity in the range of 0.8 to 1.4 dl/g as measured at a concentration of 0.5 g/dl in a 1:1 (by weight) solvent mixture of phenol and tetrachloroethane at 30.degree. C. The copolyester has a main endothermic peak with a peak maximum temperature of 160.degree. C. to 200.degree. C. and at least one subsidiary endothermic peak with a peak maximum temperature of 30.degree. C. to 80.degree. C. in differential scanning calorimetry with the ratio (R) of the area occupying not less than 40.degree. C. in the subsidiary endothermic peak, the main endothermic peak area being within the range of 3 percent to 20 percent.A hot melt adhesive comprising the copolyester film and a method for producing the copolyester film are also disclosed. The hot melt adhesive has a high initial modulus of elasticity at high temperature (30.degree.-50.degree. C.) and features improved processability or workability while retaining the required properties of a hot melt adhesive.
摘要翻译：公开了一种共聚酯膜，其包含共聚酯，其中二羧酸组分包含100至85摩尔％的对苯二甲酸，并且二醇组分包含65至97摩尔％的1,4-丁二醇和3至35摩尔％的聚乙二醇分子量为106至550.共聚酯的浓度为0.5至1.4dl / g，浓度为0.5g / dl，苯酚和四氯乙烷的1:1（重量）溶剂混合物中的比浓粘度共聚多酯具有主峰吸收峰，最高峰最高温度为160℃至200℃，至少一个辅助吸热峰的峰值最高温度为30℃至80℃。差示扫描量热法在辅助吸热峰中占据不小于40℃的面积比（R），主吸热峰面积在3％至20％的范围内。还公开了包含共聚酯膜的热熔粘合剂和共聚酯膜的制备方法。热熔粘合剂在高温（30℃-50℃）下具有高的初始弹性模量，并且具有改进的加工性或加工性，同时保持热熔粘合剂所需的性能。

7. 发明授权

US4657973A Polycarbonate resin composition 失效
标题翻译：聚碳酸酯树脂组合物
公开(公告)号：US4657973A
公开(公告)日：1987-04-14
申请号：US817064
申请日：1986-01-08
申请人： Hideki Endo , Kazuto Hashimoto , Kenji Tanaka , Takeshi Matsumoto , Keishiro Igi , Takayuki Okamura , Shunro Taniguchi , Masao Ishii , Yoshifumi Murata , Shinichi Yokota
发明人： Hideki Endo , Kazuto Hashimoto , Kenji Tanaka , Takeshi Matsumoto , Keishiro Igi , Takayuki Okamura , Shunro Taniguchi , Masao Ishii , Yoshifumi Murata , Shinichi Yokota
IPC分类号： C08L67/02 , C08L69/00
CPC分类号： C08L69/00 , C08L67/025
摘要： Polycarbonate resin compositions are disclosed, comprising: (1) (A) a polycarbonate resin and (B) polyesterether elastomer, said elastomer composing of a bifunctional carboxylic acid component and a glycol component comprising polyalkylene glycol and ethylene glycol, or (2) the components (A) and (B), and (C) a rubber-like elastomer, or (3) the components (A) and (B), and (D) a polyester resin, or (4) the components (A), (B), (C) and (D). These compositions are excellent in solvent resistance and so forth, and further possess excellent physical and thermal properties characteristic of a polycarbonate resin. Thus the compositions are useful for use in production of industrial and electrical articles, such as a car bumper in the field of car industry.
摘要翻译：公开了聚碳酸酯树脂组合物，其包括：（A）聚碳酸酯树脂和（B）聚醚醚弹性体，由双官能羧酸组分构成的弹性体和包含聚亚烷基二醇和乙二醇的二醇组分，或（2）组分（A）和（B），（C）橡胶状弹性体，或（3）成分（A）和（B）和（D）聚酯树脂，或（4）成分（A）（B），（C）和（D）。这些组合物的耐溶剂性等优异，并且还具有优异的聚碳酸酯树脂的物理和热特性。因此，组合物可用于制造工业和电气制品，例如汽车工业领域的汽车保险杠。

8. 发明授权

US08598649B2 Nonvolatile semiconductor memory device and method for manufacturing same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08598649B2
公开(公告)日：2013-12-03
申请号：US12792378
申请日：2010-06-02
申请人： Takayuki Okamura , Noboru Ooike , Wataru Sakamoto , Takashi Izumida
发明人： Takayuki Okamura , Noboru Ooike , Wataru Sakamoto , Takashi Izumida
IPC分类号： H01L29/792 , H01L21/3205 , H01L21/4763
CPC分类号： H01L27/11565 , H01L21/28282 , H01L27/11568
摘要： A nonvolatile semiconductor memory device according to embodiment includes: a semiconductor substrate having an upper portion being partitioned into a plurality of semiconductor portions extending in a first direction; a charge storage film provided on the semiconductor portion; a word-line electrode provided on the semiconductor substrate and extending in a second direction intersecting with the first direction; and a pair of selection gate electrodes provided on both sides of the word-line electrode in the first direction on the semiconductor substrate and extending in the second direction, a shortest distance between a corner portion of each of the semiconductor portions and each of the selection gate electrodes being longer than a shortest distance between the corner portion of the semiconductor portion and the word-line electrode in a cross section parallel to the second direction.
摘要翻译：根据实施例的非易失性半导体存储器件包括：半导体衬底，其具有被分隔成沿第一方向延伸的多个半导体部分的上部; 设置在半导体部分上的电荷存储膜; 字线电极，其设置在所述半导体基板上并沿与所述第一方向交叉的第二方向延伸; 以及一对选择栅电极，其设置在所述半导体基板上的所述字线电极的所述第一方向的两侧，并且沿所述第二方向延伸，所述半导体部分的每个的角部与所述选择中的每一个之间的最短距离栅电极比与半导体部分的角部和字线电极之间的平行于第二方向的截面中的最短距离更长。

9. 发明授权

US07936005B2 Semiconductor memory device including laminated gate having electric charge accumulating layer and control gate and method of manufacturing the same 有权
标题翻译：包括具有电荷累积层和控制栅极的层叠栅极的半导体存储器件及其制造方法
公开(公告)号：US07936005B2
公开(公告)日：2011-05-03
申请号：US12473709
申请日：2009-05-28
申请人： Takayuki Okamura
发明人： Takayuki Okamura
IPC分类号： H01L29/792
CPC分类号： H01L27/11568
摘要： A semiconductor memory device includes a first active region, a second active region, an element isolation region, memory cell transistors. Each of memory cell transistors includes a laminated gate and a first impurity diffusion layer functioning as a source and a drain. The laminated gate includes a first insulating film, a second insulating film, and a control gate electrode. The second insulating film is commonly connected between the plurality of memory cell transistors to step over the element isolation region and is in contact with an upper surface of the element isolation region. An upper surface of the element isolation region is higher than a bottom surface of the first insulating film and is located under the upper surface of the first insulating film.
摘要翻译：半导体存储器件包括第一有源区，第二有源区，元件隔离区，存储单元晶体管。每个存储单元晶体管包括层叠栅极和用作源极和漏极的第一杂质扩散层。层叠栅极包括第一绝缘膜，第二绝缘膜和控制栅电极。第二绝缘膜通常连接在多个存储单元晶体管之间，以跨越元件隔离区并与元件隔离区的上表面接触。元件隔离区的上表面高于第一绝缘膜的底面，位于第一绝缘膜的上表面的下方。

10. 发明申请

US20100320527A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100320527A1
公开(公告)日：2010-12-23
申请号：US12792378
申请日：2010-06-02
申请人： Takayuki OKAMURA , Noboru OOIKE , Wataru SAKAMOTO , Takashi IZUMIDA
发明人： Takayuki OKAMURA , Noboru OOIKE , Wataru SAKAMOTO , Takashi IZUMIDA
IPC分类号： H01L29/792 , H01L21/28
CPC分类号： H01L27/11565 , H01L21/28282 , H01L27/11568
摘要： A nonvolatile semiconductor memory device according to embodiment includes: a semiconductor substrate having an upper portion being partitioned into a plurality of semiconductor portions extending in a first direction; a charge storage film provided on the semiconductor portion; a word-line electrode provided on the semiconductor substrate and extending in a second direction intersecting with the first direction; and a pair of selection gate electrodes provided on both sides of the word-line electrode in the first direction on the semiconductor substrate and extending in the second direction, a shortest distance between a corner portion of each of the semiconductor portions and each of the selection gate electrodes being longer than a shortest distance between the corner portion of the semiconductor portion and the word-line electrode in a cross section parallel to the second direction.
摘要翻译：根据实施例的非易失性半导体存储器件包括：半导体衬底，其具有被分隔成沿第一方向延伸的多个半导体部分的上部; 设置在半导体部分上的电荷存储膜; 字线电极，其设置在所述半导体基板上并沿与所述第一方向交叉的第二方向延伸; 以及一对选择栅电极，其设置在所述半导体基板上的所述字线电极的所述第一方向的两侧，并且沿所述第二方向延伸，所述半导体部分的每个的角部与所述选择中的每一个之间的最短距离栅电极比与半导体部分的角部和字线电极之间的平行于第二方向的截面中的最短距离更长。

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