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1. 发明授权

US08271994B2 Reduced data transfer during processor context switching 失效
公开(公告)号：US08271994B2
公开(公告)日：2012-09-18
申请号：US11353288
申请日：2006-02-11
申请人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
IPC分类号： G06F9/46
CPC分类号： G06F9/462
摘要： Data transfer during processor context switching is reduced, particularly in relation to a time-sharing microtasking programming model. Prior to switching context of a processor having local memory from a first to a second process, a portion of the local memory that does not require transfer to system memory for proper saving of data associated with the first process is determined. The context of the processor is then switched from the first to the second process, including transferring all of the local memory as the data associated with the first process, to system memory—except for the portion of the local memory that has been determined as not requiring saving to the system memory for proper saving of the data associated with the first process. Therefore, switching the context from the first to the second process results in a reduction of data transferred from the local memory to the system memory.

2. 发明申请

US20090070514A1 PROGRAMMABLE CONTROLLER 有权
标题翻译：可编程控制器
公开(公告)号：US20090070514A1
公开(公告)日：2009-03-12
申请号：US12042068
申请日：2008-03-04
申请人： Takao MORIYAMA , Hideyuki Oguro , Seigo Inobe
发明人： Takao MORIYAMA , Hideyuki Oguro , Seigo Inobe
IPC分类号： G06F13/36
CPC分类号： G05B19/054 , G05B2219/1144
摘要： In a programmable controller including a special unit, a special-purpose integrated circuit element can be readily utilized for multiple purposes to extend the range of applications to reduce a manufacture cost. A special unit (130) connected to a microprocessor for performing I/O control through a bus includes an integrated circuit element (10) having a logic circuit unit (1000n (n=0 to 7)) whose operation specifications are determined by a parameter memory. The logic circuit unit (1000n) includes a reversible counter used for both high-speed input processing and high-speed output processing as a main component, and is connected to I/O interface circuits (139X) (139Y) through a first port (11) and a second port (12). In addition, because the function of the logic circuit unit (1000n) is determined by a content of a special instruction in a sequential program, the logic circuit unit (1000n) is commonly used for various types of I/O interface circuits to allow the integrated circuit element to be used for multiple purposes.
摘要翻译：在包括特殊单元的可编程控制器中，专用集成电路元件可以容易地用于多个目的以扩展应用范围以降低制造成本。连接到微处理器以通过总线执行I / O控制的特殊单元（130）包括具有逻辑电路单元（1000n（n = 0至7））的集成电路元件（10），其操作规格由参数确定记忆。逻辑电路单元（1000n）包括用于高速输入处理和高速输出处理两者的可逆计数器作为主要组件，并且通过第一端口（I / O接口电路（139Y））连接到I / O接口电路 11）和第二端口（12）。此外，由于逻辑电路单元（1000n）的功能由顺序程序中的特殊指令的内容决定，逻辑电路单元（1000n）通常用于各种类型的I / O接口电路，以允许集成电路元件用于多种用途。

3. 发明申请

US20050132038A1 Resource reservation system and resource reservation method and recording medium storing program for executing the method 审中-公开
标题翻译：资源预留系统和资源预留方法以及用于执行该方法的记录介质存储程序
公开(公告)号：US20050132038A1
公开(公告)日：2005-06-16
申请号：US10998237
申请日：2004-11-27
申请人： Hiroshi Inoue , Takao Moriyama , Yasushi Negishi , Moriyoshi Ohara
发明人： Hiroshi Inoue , Takao Moriyama , Yasushi Negishi , Moriyoshi Ohara
IPC分类号： G06F9/46 , G06F9/48 , G06F15/173
CPC分类号： G06F9/4887
摘要： A system, method and computer program product for guaranteeing a process requesting a predetermined amount of calculation of a calculation resource that a predetermined amount of calculation is obtained by a deadline. The invention includes measuring an amount of calculation of the process obtained through calculation processing by the calculation resource, generating an interrupt to the calculation processing using the calculation resource and acquiring the amount of calculation acquired by an interrupt generation time, providing the amount of calculation acquired to the calculation resource so as to calculate a slack time and determining whether said slack time is available or not, and interrupting the processing of other processes by said calculation resource if the slack time is not available.
摘要翻译：一种系统，方法和计算机程序产品，用于保证在期限内获得预定量的计算的计算资源的预定量的计算的处理。本发明包括测量通过计算资源的计算处理获得的处理的计算量，使用计算资源产生对计算处理的中断并获取通过中断产生时间获取的计算量，提供获得的计算量以计算松弛时间并确定所述松弛时间是否可用，以及如果松弛时间不可用则中断所述计算资源的其他处理的处理。

4. 发明授权

US06725283B2 Programmable controller 有权
标题翻译：可编程控制器
公开(公告)号：US06725283B2
公开(公告)日：2004-04-20
申请号：US10151866
申请日：2002-05-22
申请人： Takao Moriyama
发明人： Takao Moriyama
IPC分类号： G06F300
CPC分类号： G05B19/0423 , G05B2219/21015 , G05B2219/25296
摘要： The programmable controller composed of a main body unit and a plurality of input/output extension blocks is provided with type identifying means for identifying the number of input output points and present organization storing means. Upon receiving an organization update instruction signal, it can allocate input and output numbers in various ways by rewrite setting means in a system memory and can select a second allocation method with which existing input and output numbers are not changed or a first allocation method with which input and output numbers are completely changed anew. When input and output numbers are completely changed anew, it can automatically change input and output numbers accompanying an instruction in a program memory by instruction changing means in the system memory.
摘要翻译：由主体单元和多个输入/输出扩展块组成的可编程控制器设置有用于识别输入输出点的数量和存在组织存储装置的类型识别装置。在接收到组织更新指令信号时，可以通过系统存储器中的重写设置装置以各种方式分配输入和输出数字，并且可以选择现有输入和输出数字不改变的第二分配方法，输入和输出数字全部重新变化。当输入和输出数字重新完全改变时，它可以通过系统存储器中的指令改变装置自动地改变伴随程序存储器中的指令的输入和输出数字。

5. 发明授权

US5802570A Multiprocessor system with parallel execution of data 失效
公开(公告)号：US5802570A
公开(公告)日：1998-09-01
申请号：US702424
申请日：1996-08-14
申请人： Kei Kawase , Takao Moriyama
发明人： Kei Kawase , Takao Moriyama
IPC分类号： G06F15/16 , G06F12/08 , G06F12/00 , G06F13/00
CPC分类号： G06F12/0831
摘要： Data sets of sequential data strings at a particular point in time are assigned to processing elements of a multiprocessor system at high speed and processing is executed efficiently in parallel. A mechanism for preventing allocation due to all-read to a cache block which has not yet been referred from another cache is added by providing a reference bit with respect to cache blocks. The reference bit becomes 0 when new data is read to the cache block and becomes 1 when the cache block is referenced by a CPU. In the case of reading data from another cache, if a block corresponding thereto can be replaced without the need to be written back to the other cache and the reference bit is 1, data is fetched to the shared cache memory.

6. 发明授权

US08769547B2 Reduced data transfer during processor context switching 有权
标题翻译：在处理器上下文切换期间减少数据传输
公开(公告)号：US08769547B2
公开(公告)日：2014-07-01
申请号：US13563713
申请日：2012-07-31
申请人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
IPC分类号： G06F9/46
CPC分类号： G06F9/462
摘要： Data transfer during processor context switching is reduced, particularly in relation to a time-sharing microtasking programming model. Prior to switching context of a processor having local memory from a first to a second process, a portion of the local memory that does not require transfer to system memory for proper saving of data associated with the first process is determined. The context of the processor is then switched from the first to the second process, including transferring all of the local memory as the data associated with the first process, to system memory—except for the portion of the local memory that has been determined as not requiring saving to the system memory for proper saving of the data associated with the first process. Therefore, switching the context from the first to the second process results in a reduction of data transferred from the local memory to the system memory.
摘要翻译：处理器上下文切换期间的数据传输减少，特别是在分时微任务编程模型方面。在将具有本地存储器的处理器从第一处理切换到第二处理之前，确定不需要传送到系统存储器以适当地保存与第一处理相关联的数据的本地存储器的一部分。然后，处理器的上下文从第一处理切换到第二处理，包括将与第一处理相关联的所有本地存储器传送到系统存储器 - 除了被确定为不是的本地存储器的部分之外需要保存到系统存储器以适当地保存与第一进程相关联的数据。因此，将上下文从第一处理切换到第二处理导致从本地存储器传送到系统存储器的数据的减少。

7. 发明授权

US08331435B2 Compression system, program and method 有权
标题翻译：压缩系统，程序和方法
公开(公告)号：US08331435B2
公开(公告)日：2012-12-11
申请号：US12361648
申请日：2009-01-29
申请人： Hiroshi Inoue , Takao Moriyama
发明人： Hiroshi Inoue , Takao Moriyama
IPC分类号： H04N13/04 , H04N7/12
CPC分类号： H04N19/543 , H04N19/162 , H04N19/527 , H04N19/61
摘要： An object is to calculate an accurate motion vector with a small computational effort. To this end, provided is a system for compressing a motion picture generated by projecting objects onto a screen, the objects moving relatively to the screen in a 3D space, the system including: a motion calculating component which calculates a motion vector of the object within the screen by projecting onto the screen a motion of the object in the 3D space between a time corresponding to a compression target frame and a time corresponding to another frame; and a compressing component which compresses the compression target frame by motion compensation based on the motion vector.
摘要翻译：一个目的是计算精确的运动矢量，计算量小。为此，提供了一种用于压缩通过将对象投影到屏幕上而产生的运动图像的系统，所述对象在3D空间中相对于屏幕移动，所述系统包括：运动计算部件，其计算所述对象的运动矢量所述屏幕通过在对应于压缩目标帧的时间与对应于另一帧的时间之间的3D空间中投射到所述屏幕上的所述对象的运动; 以及通过基于运动矢量的运动补偿来压缩压缩对象帧的压缩部件。

8. 发明授权

US08266627B2 Reduced data transfer during processor context switching 失效
公开(公告)号：US08266627B2
公开(公告)日：2012-09-11
申请号：US12172253
申请日：2008-07-13
申请人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
发明人： Hiroshi Inoue , Moriyoshi Ohara , Takao Moriyama , Yukihiko Sohda , Hideaki Komatsu
IPC分类号： G06F9/46
CPC分类号： G06F9/462
摘要： Data transfer during processor context switching is reduced, particularly in relation to a time-sharing microtasking programming model. Prior to switching context of a processor having local memory from a first to a second process, a portion of the local memory that does not require transfer to system memory for proper saving of data associated with the first process is determined. The context of the processor is then switched from the first to the second process, including transferring all of the local memory as the data associated with the first process, to system memory—except for the portion of the local memory that has been determined as not requiring saving to the system memory for proper saving of the data associated with the first process. Therefore, switching the context from the first to the second process results in a reduction of data transferred from the local memory to the system memory.

9. 发明申请

US20090207172A1 COMPRESSION SYSTEM, PROGRAM AND METHOD 有权
标题翻译：压缩系统，程序和方法
公开(公告)号：US20090207172A1
公开(公告)日：2009-08-20
申请号：US12361648
申请日：2009-01-29
申请人： Hiroshi Inoue , Takao Moriyama
发明人： Hiroshi Inoue , Takao Moriyama
IPC分类号： G06T15/20 , H04N7/26
CPC分类号： H04N19/543 , H04N19/162 , H04N19/527 , H04N19/61
摘要： An object is to calculate an accurate motion vector with a small computational effort. To this end, provided is a system for compressing a motion picture generated by projecting objects onto a screen, the objects moving relatively to the screen in a 3D space, the system including: a motion calculating component which calculates a motion vector of the object within the screen by projecting onto the screen a motion of the object in the 3D space between a time corresponding to a compression target frame and a time corresponding to another frame; and a compressing component which compresses the compression target frame by motion compensation based on the motion vector.
摘要翻译：一个目的是计算精确的运动矢量，计算量小。为此，提供了一种用于压缩通过将对象投影到屏幕上而产生的运动图像的系统，所述对象在3D空间中相对于屏幕移动，所述系统包括：运动计算部件，其计算所述对象的运动矢量所述屏幕通过在对应于压缩目标帧的时间与对应于另一帧的时间之间的3D空间中投射到所述屏幕上的所述对象的运动; 以及通过基于运动矢量的运动补偿来压缩压缩对象帧的压缩部件。

10. 发明申请

US20090119654A1 COMPILER FOR OPTIMIZING PROGRAM 失效
标题翻译：编译器优化程序
公开(公告)号：US20090119654A1
公开(公告)日：2009-05-07
申请号：US12259746
申请日：2008-10-28
申请人： Motohiro Kawahito , Hideaki Komatsu , Takao Moriyama
发明人： Motohiro Kawahito , Hideaki Komatsu , Takao Moriyama
IPC分类号： G06F9/45
CPC分类号： G06F8/443 , G06F8/4435
摘要： A compiler system and method for calculating a value to be assigned to a variable for optimizing a program. The apparatus includes a subrange analysis unit for analyzing, for an instruction to assign a value to a variable in the program, a range of the value being assignable to the variable by the instruction, as a subrange of the variable in a case where instruction is executed; a determination unit for determining if the execution result of the program changes if the instruction assigns any value in the subrange of the variable to the variable on the basis of the analyzed subrange of the variable; and a replacement unit for replacing the instruction to assign the value to the variable with an instruction to assign a constant value in the subrange of the variable to the variable.
摘要翻译：用于计算要分配给用于优化程序的变量的值的编译器系统和方法。该装置包括一个子范围分析单元，用于对于在程序中的变量分配值的指令，分析指令中可变量值的范围，作为在指令为执行确定单元，用于如果所述指令基于所分析的所述变量的子范围将所述变量的子范围中的任何值分配给所述变量，则确定所述程序的执行结果是否改变; 以及替换单元，用于用指令将变量的子范围中的常数值分配给变量来替换指定给变量的指令。

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