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1. 发明授权

US09262500B2 Memory system including key-value store 有权
标题翻译：内存系统包括键值存储
公开(公告)号：US09262500B2
公开(公告)日：2016-02-16
申请号：US13569542
申请日：2012-08-08
申请人： Atsuhiro Kinoshita , Takao Marukame , Kosuke Tatsumura
发明人： Atsuhiro Kinoshita , Takao Marukame , Kosuke Tatsumura
IPC分类号： G06F17/30 , G06F12/02
CPC分类号： G06F17/30587 , G06F12/0292
摘要： According to one embodiment, a memory system including a key-value store containing key-value data as a pair of a key and a value corresponding to the key, includes a first memory, a control circuit and a second memory. The first memory is configured to contain a data area for storing data, and a table area containing the key-value data. The control circuit is configured to perform write and read to the first memory by addressing, and execute a request based on the key-value store. The second memory is configured to store the key-value data in accordance with an instruction from the control circuit. The control circuit performs a set operation by using the key-value data stored in the first memory, and the key-value data stored in the second memory.
摘要翻译：根据一个实施例，包括包含键值数据作为一对键和与该键对应的值的键值存储器的存储器系统包括第一存储器，控制电路和第二存储器。第一存储器被配置为包含用于存储数据的数据区域和包含键值数据的表区域。控制电路被配置为通过寻址来执行对第一存储器的写入和读取，并且基于键值存储执行请求。第二存储器被配置为根据来自控制电路的指令存储键值数据。控制电路通过使用存储在第一存储器中的键值数据和存储在第二存储器中的键值数据来执行设置操作。

2. 发明授权

US09246709B2 Storage device in which forwarding-function-equipped memory nodes are mutually connected and data processing method 有权
标题翻译：具有转发功能的存储器节点相互连接的存储设备和数据处理方法
公开(公告)号：US09246709B2
公开(公告)日：2016-01-26
申请号：US13293399
申请日：2011-11-10
申请人： Kosuke Tatsumura , Atsuhiro Kinoshita , Hirotaka Nishino , Masamichi Suzuki , Yoshifumi Nishi , Takao Marukame , Takahiro Kurita
发明人： Kosuke Tatsumura , Atsuhiro Kinoshita , Hirotaka Nishino , Masamichi Suzuki , Yoshifumi Nishi , Takao Marukame , Takahiro Kurita
IPC分类号： G06F12/02 , H04L12/64 , G06F3/06
CPC分类号： H04L49/253 , G06F3/0605 , G06F3/0635 , G06F3/0656 , G06F3/0658 , G06F3/0683 , H04L12/6418 , H04L45/74
摘要： According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.
摘要翻译：根据一个实施例，存储设备包括多个存储器节点。每个存储器节点包括多个输入端口，多个输出端口，选择器，分组控制器和存储器。选择器将输入到输入端口的数据包输出输出到其中一个输出端口。分组控制器控制选择器。内存存储数据。存储器节点在输入端口和输出端口相互连接。存储器节点具有由其物理位置确定的地址。当接收到没有寻址到具有分组控制器的存储器节点的分组时，分组控制器基于包括分组的目的地地址的信息和具有分组控制器的存储器节点的地址来切换输出分组的输出端口。

3. 发明申请

US20130254240A1 METHOD OF PROCESSING DATABASE, DATABASE PROCESSING APPARATUS, COMPUTER PROGRAM PRODUCT 审中-公开
标题翻译：数据库处理方法，数据库处理设备，计算机程序产品
公开(公告)号：US20130254240A1
公开(公告)日：2013-09-26
申请号：US13729633
申请日：2012-12-28
申请人： Takahiro KURITA , Takao Marukame , Atsuhiro Kinoshita
发明人： Takahiro KURITA , Takao Marukame , Atsuhiro Kinoshita
IPC分类号： G06F17/30
CPC分类号： G06F16/21 , G06F16/278
摘要： According to an embodiment, a method of processing a database includes dividing a first data table that includes records including data in a plurality of columns into a plurality of second data tables based on a predetermined criterion for dividing columns. Each of the second data tables includes data in at least one column. The method also includes dividing each of the second data tables into a plurality of third data tables based on a predetermined criterion for dividing data in units of a record based on the data. Each of the third data tables includes at least one record. The method also includes storing the third data tables in a plurality of storage units, respectively. Each of the storage units allows the data to be read independently.
摘要翻译：根据实施例，处理数据库的方法包括：基于用于划分列的预定标准，将包括多列中的数据的记录划分成多个第二数据表的第一数据表。每个第二数据表包括至少一列中的数据。该方法还包括基于用于基于数据以记录为单位划分数据的预定标准，将每个第二数据表分成多个第三数据表。每个第三数据表包括至少一个记录。该方法还包括分别将第三数据表存储在多个存储单元中。每个存储单元允许独立地读取数据。

4. 发明申请

US20130076551A1 ANALOG-TO-DIGITAL CONVERTER 失效
标题翻译：模拟数字转换器
公开(公告)号：US20130076551A1
公开(公告)日：2013-03-28
申请号：US13535118
申请日：2012-06-27
申请人： Takao MARUKAME , Tetsufumi Tanamoto , Atsuhiro Kinoshita , Tomoaki Inokuchi , Masamichi Suzuki , Yoshiaki Saito
发明人： Takao MARUKAME , Tetsufumi Tanamoto , Atsuhiro Kinoshita , Tomoaki Inokuchi , Masamichi Suzuki , Yoshiaki Saito
IPC分类号： H03M1/36
CPC分类号： H03M1/1061 , H03F3/45183 , H03F2203/45391 , H03F2203/45392 , H03F2203/45674 , H03K5/2481 , H03M1/365
摘要： According to an embodiment, an analog-to-digital converter includes a voltage generating unit to generate comparative voltages; and comparators. Each comparator compares any one of the comparative voltages with an analog input voltage and output a digital signal. Each comparator includes a differential pair circuit to detect a potential difference between two inputs. The differential pair circuit includes first and second circuit portions. The first circuit portion includes a first transistor having a gate to which one input is supplied; and a resistor connected in series with the first transistor. The second circuit portion includes a second transistor having a gate to which the other input is supplied and forms a differential pair with the first transistor; and a variable resistor connected in series with the second transistor. The variable resistor includes variable resistive elements each having a resistance value variably set according to a control signal.
摘要翻译：根据实施例，模数转换器包括产生比较电压的电压产生单元; 和比较者。每个比较器将比较电压中的任何一个与模拟输入电压进行比较，并输出数字信号。每个比较器包括用于检测两个输入之间的电位差的差分对电路。差分对电路包括第一和第二电路部分。第一电路部分包括具有一个输入端的栅极的第一晶体管; 以及与第一晶体管串联连接的电阻器。第二电路部分包括第二晶体管，其具有提供另一输入的栅极，并与第一晶体管形成差分对; 以及与第二晶体管串联连接的可变电阻器。可变电阻器包括可变电阻元件，每个电阻元件具有根据控制信号可变地设置的电阻值。

5. 发明申请

US20130069440A1 INCOMING CIRCUIT USING MAGNETIC RESONANT COUPLING 审中-公开
标题翻译：使用磁共振耦合电路
公开(公告)号：US20130069440A1
公开(公告)日：2013-03-21
申请号：US13537144
申请日：2012-06-29
申请人： Takao MARUKAME , Hirotaka NISHINO , Masamichi SUZUKI , Atsuhiro KINOSHITA
发明人： Takao MARUKAME , Hirotaka NISHINO , Masamichi SUZUKI , Atsuhiro KINOSHITA
IPC分类号： H02J17/00
CPC分类号： H02J50/12 , H02J17/00
摘要： According to one embodiment, an incoming circuit using a magnetic resonant coupling includes an incoming coil which receives magnetic field energy transmitted from an outgoing coil under conditions of energy power transmission by the magnetic resonant coupling, and an incoming circuit which comprises a variable capacitor and a rectifier circuit and which outputs, as a direct-current voltage, the magnetic field energy received by the incoming coil. A capacitance of the variable capacitor is automatically controlled to change in an analog form along with the change of the direct-current voltage and to keep the transmission efficiency of the magnetic field energy at a fixed value by directly feeding back the direct-current voltage to the variable capacitor.
摘要翻译：根据一个实施例，使用磁共振耦合的输入电路包括输入线圈，其在由磁共振耦合的能量功率传输的条件下接收从输出线圈传输的磁场能量，以及输入电路，其包括可变电容器和整流电路，其输出由输入线圈接收的磁场能量作为直流电压。随着直流电压的变化，可变电容器的电容被自动控制为模拟形式的变化，并且通过将直流电压直接反馈到直流电压来保持磁场能量的传输效率为固定值可变电容器。

6. 发明申请

US20120168838A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120168838A1
公开(公告)日：2012-07-05
申请号：US13419947
申请日：2012-03-14
申请人： Takao MARUKAME , Mizue Ishikawa , Tomoaki Inokuchi , Hideyuki Sugiyama , Yoshiaki Saito
发明人： Takao MARUKAME , Mizue Ishikawa , Tomoaki Inokuchi , Hideyuki Sugiyama , Yoshiaki Saito
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/66984 , H01L21/823814 , H01L21/84 , H01L21/845 , H01L29/41766 , H01L29/456 , H01L29/49 , H01L29/66075
摘要： A semiconductor device according to an embodiment includes: a semiconductor layer; source and drain regions in the semiconductor layer; a magnetic metal semiconductor compound film on each of the source and drain regions, the magnetic metal semiconductor compound film including the same semiconductor as a semiconductor of the semiconductor layer and a magnetic metal; a gate insulating film on the semiconductor layer between the source region and the drain region; a gate electrode on the gate insulating film; a gate sidewall formed at a side portion of the gate electrode, the gate sidewall being made of an insulating material; a film stack formed on the magnetic metal semiconductor compound film on each of the source and drain regions, the film stack including a magnetic layer; and an oxide layer formed on the gate sidewall, the oxide layer containing the same element as an element in the film stack.
摘要翻译：根据实施例的半导体器件包括：半导体层; 半导体层中的源极和漏极区域; 在源极和漏极区域中的每一个上的磁性金属半导体化合物膜，包括与半导体层的半导体相同的半导体的磁性金属半导体化合物膜和磁性金属; 源极区域和漏极区域之间的半导体层上的栅极绝缘膜; 栅极绝缘膜上的栅电极; 栅极侧壁，其形成在所述栅电极的侧部，所述栅极侧壁由绝缘材料制成; 在所述源极和漏极区域中的每一个上形成在所述磁性金属半导体化合物膜上的膜堆叠，所述膜堆叠包括磁性层; 以及形成在栅极侧壁上的氧化物层，所述氧化物层包含与膜堆叠中的元件相同的元件。

7. 发明授权

US08026561B2 Spin MOSFET and reconfigurable logic circuit 有权
标题翻译：旋转MOSFET和可重构逻辑电路
公开(公告)号：US08026561B2
公开(公告)日：2011-09-27
申请号：US12725561
申请日：2010-03-17
申请人： Yoshiaki Saito , Hideyuki Sugiyama , Tomoaki Inokuchi , Takao Marukame , Mizue Ishikawa
发明人： Yoshiaki Saito , Hideyuki Sugiyama , Tomoaki Inokuchi , Takao Marukame , Mizue Ishikawa
IPC分类号： H01L21/02
CPC分类号： H01L43/02 , B01D53/1493 , B01D53/62 , G11C11/16 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/1695 , H01L28/00 , H01L29/0843 , H01L29/0895 , H01L29/66984 , H01L43/10
摘要： A spin MOSFET includes: a first ferromagnetic layer provided on an upper face of a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on an upper face of the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower face and the upper face; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on an upper face of the second ferromagnetic layer; a third ferromagnetic layer provided on an upper face of the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween.
摘要翻译：自旋MOSFET包括：设置在半导体衬底的上表面上并且具有与膜平面垂直的固定磁化方向的第一铁磁层; 设置在所述第一铁磁层的上表面上的半导体层，包括与所述第一铁磁层的上表面相对的下表面，与所述下表面相对的上表面，以及与所述下表面和所述上表面不同的侧面 ; 第二铁磁层，设置在所述半导体层的上表面上，并且具有与膜平面垂直的可变磁化方向; 设置在所述第二铁磁层的上表面上的第一隧道势垒; 设置在所述第一隧道屏障的上表面上的第三铁磁层; 设置在所述半导体层的侧面上的栅极绝缘膜; 以及设置在半导体层的侧面上的栅电极，其间插入有栅极绝缘膜。

8. 发明申请

US20100072529A1 STACK HAVING HEUSLER ALLOY, MAGNETORESISTIVE ELEMENT AND SPIN TRANSISTOR USING THE STACK, AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：具有合金的堆叠，使用堆叠的磁体元件和旋转晶体管及其制造方法
公开(公告)号：US20100072529A1
公开(公告)日：2010-03-25
申请号：US12565303
申请日：2009-09-23
申请人： Takao MARUKAME , Mizue ISHIKAWA , Tomoaki INOKUCHI , Hideyuki SUGIYAMA , Yoshiaki SAITO
发明人： Takao MARUKAME , Mizue ISHIKAWA , Tomoaki INOKUCHI , Hideyuki SUGIYAMA , Yoshiaki SAITO
IPC分类号： H01L29/82 , B05D3/02 , B32B15/04
CPC分类号： H01L29/66984 , H01F10/1936 , H01F10/265 , H01L27/228 , H01L43/10 , H01L43/12 , Y10T428/12611
摘要： A stack includes a crystalline MgO layer, crystalline Heusler alloy layer, and amorphous Heusler alloy layer. The crystalline Heusler alloy layer is provided on the MgO layer. The amorphous Heusler alloy layer is provided on the crystalline Heusler alloy layer.
摘要翻译：堆叠包括结晶MgO层，结晶Heusler合金层和非晶Heusler合金层。结晶Heusler合金层设置在MgO层上。非晶Heusler合金层设置在结晶Heusler合金层上。

9. 发明授权

US08658999B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US08658999B2
公开(公告)日：2014-02-25
申请号：US13728552
申请日：2012-12-27
申请人： Yoshifumi Nishi , Takao Marukame , Takayuki Ishikawa , Masato Koyama
发明人： Yoshifumi Nishi , Takao Marukame , Takayuki Ishikawa , Masato Koyama
IPC分类号： H01L29/02
CPC分类号： H01L45/14 , H01L27/2472 , H01L45/08 , H01L45/1233 , H01L45/1253 , H01L45/16
摘要： According to an embodiment, a semiconductor device includes first and second memristors. The first memristor includes a first electrode made of a first material, a second electrode made of a second material, and a first resistive switching film arranged between the first and second electrodes. The first resistive switching film is connected to both the first and second electrodes. The second memristor includes a third electrode made of a third material, a fourth electrode made of the second material, and a second resistive switching film arranged between the third and fourth electrodes. The second resistive switching film is connected to both the third and fourth electrodes. The work function of the first material is smaller than that of the second material. The work function of the third material is larger than that of the second material.
摘要翻译：根据实施例，半导体器件包括第一和第二忆阻器。第一忆阻器包括由第一材料制成的第一电极，由第二材料制成的第二电极和布置在第一和第二电极之间的第一电阻切换膜。第一电阻开关膜连接到第一和第二电极。第二忆阻器包括由第三材料制成的第三电极，由第二材料制成的第四电极和布置在第三和第四电极之间的第二电阻切换膜。第二电阻开关膜连接到第三和第四电极。第一材料的功函数小于第二材料的功函数。第三种材料的功函数大于第二种材料的功函数。

10. 发明申请

US20130076550A1 ANALOG-TO-DIGITAL CONVERTER 失效
标题翻译：模拟数字转换器
公开(公告)号：US20130076550A1
公开(公告)日：2013-03-28
申请号：US13536085
申请日：2012-06-28
申请人： Takao MARUKAME , Tetsufumi Tanamoto , Atsuhiro Kinoshita , Tomoaki Inokuchi , Masamichi Suzuki , Yoshiaki Saito
发明人： Takao MARUKAME , Tetsufumi Tanamoto , Atsuhiro Kinoshita , Tomoaki Inokuchi , Masamichi Suzuki , Yoshiaki Saito
IPC分类号： H03M1/34
CPC分类号： H03M1/1061 , H01L27/22 , H01L43/08 , H03M1/365
摘要： According to an embodiment, an analog-to-digital converter includes a voltage generating unit, and a plurality of comparators. The voltage generating unit is configured to divide a reference voltage by a plurality of variable resistors to generate a plurality of comparative voltages. Each of the plurality of comparator is configured to compare any one of the plurality of comparative voltages with an analog input voltage and output a digital signal based on a result of a comparison between the comparative voltage and the analog input voltage. Each of the plurality of variable resistors includes a plurality of variable resistive elements that are connected in series, and each of the plurality of variable resistive elements has a resistance value that is variably set according to an external signal.
摘要翻译：根据实施例，模数转换器包括电压产生单元和多个比较器。电压产生单元被配置为通过多个可变电阻器分压参考电压以产生多个比较电压。多个比较器中的每一个被配置为将多个比较电压中的任何一个与模拟输入电压进行比较，并且基于比较电压和模拟输入电压之间的比较结果输出数字信号。多个可变电阻器中的每一个包括串联连接的多个可变电阻元件，并且多个可变电阻元件中的每一个具有根据外部信号可变地设置的电阻值。

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