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1. 发明授权

US08084696B2 Printed circuit board and manufacturing method thereof 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US08084696B2
公开(公告)日：2011-12-27
申请号：US12428776
申请日：2009-04-23
申请人： Tae-Gui Kim , Young-Hwan Shin , Jae-Soo Lee , Tae-Gon Lee
发明人： Tae-Gui Kim , Young-Hwan Shin , Jae-Soo Lee , Tae-Gon Lee
IPC分类号： H05K1/11
CPC分类号： H05K3/0035 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/15311 , H01L2924/181 , H05K3/108 , H05K3/243 , H05K3/421 , H05K3/427 , H05K2201/0394 , H05K2201/09481 , H05K2201/09736 , H05K2203/0369 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board and a method of manufacturing the same are disclosed. The method of manufacturing a printed circuit board including a connecting layer configured to which is configured to electrically connect both sides of an insulator, and a pad part, electrically connect both sides of an insulator, and a pad part formed in one side of the insulator to be directly in contact with the connecting layer, includes: forming a seed layer part on one side of the insulator, a portion of the seed layer part being bulged, forming a via hole by processing the other side of the insulator, corresponding to the bulged portion of the seed layer part, forming the connecting layer inside the via hole, and forming a plating layer, corresponding to the pad part, on the seed layer part. A pattern having a finer pitch, maintaining a VOP structure, can be formed and a lower side of a substrate is not penetrated through when a via hole is processed.
摘要翻译：公开了一种印刷电路板及其制造方法。制造印刷电路板的方法包括：被配置为电连接绝缘体的两侧的连接层和电连接绝缘体的两侧的焊盘部分和形成在绝缘体的一侧的焊盘部分的连接层与连接层直接接触的方法包括：在绝缘体的一侧形成种子层部分，种子层部分的一部分被凸起，通过加工绝缘体的另一侧形成通孔，对应于种子层部分的隆起部分，在通孔内形成连接层，并在种子层部分上形成对应于焊盘部分的镀层。当形成通孔时，可以形成具有更细的间距，保持VOP结构的图案，并且当基板的下侧不被穿透时。

2. 发明授权

US07030500B2 Package substrate manufactured using electrolytic leadless plating process, and method for manufacturing the same 失效
标题翻译：使用电解无铅电镀工艺制造的封装衬底及其制造方法
公开(公告)号：US07030500B2
公开(公告)日：2006-04-18
申请号：US11034251
申请日：2005-01-13
申请人： Young-Hwan Shin , Chong-Ho Kim , Tae-Gui Kim
发明人： Young-Hwan Shin , Chong-Ho Kim , Tae-Gui Kim
IPC分类号： H01L23/48 , H01L23/52
CPC分类号： H05K3/243 , H01L21/4846 , H01L23/3128 , H01L23/498 , H01L23/50 , H01L24/48 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/00015 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H05K3/282 , H05K2203/0361 , H05K2203/0542 , H05K2203/1572 , Y10T29/49124 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , Y10T29/49204 , H01L2224/05599 , H01L2224/85399 , H01L2224/45099 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A package substrate of, for example, a BGA type or a CSP type, manufactured by carrying out an electrolytic Au plating process without using any plating lead line for formation of bond fingers and solder ball pads, and a method for manufacturing the package substrate. The method includes the steps of laminating first dry films over upper and lower surfaces of a base substrate having via holes while being formed at its upper and lower surfaces with copper foils, and patterning the first dry films to expose predetermined surface portions of the base substrate, removing portions of the copper foils not covered by the first dry films to form circuits, stripping the first dry films, and forming a plated layer over the base substrate, laminating second dry films over the plated surfaces of the base substrate, and patterning the second dry films to expose portions of the plated surfaces of the base substrate corresponding to regions where Au is to be plated, removing the plated layer from the exposed surface portions of the base substrate corresponding to the Au plating regions, plating Au on the exposed surface portions of the base substrate, stripping the second dry films, and removing the remaining plated layer to expose the circuits, and coating a solder resist on the exposed circuits while exposing predetermined portions of the circuits.
摘要翻译：通过进行电解Au电镀工艺而不使用用于形成粘合指状物的焊接引线和焊球焊盘来制造的例如BGA型或CSP型的封装衬底以及制造封装衬底的方法。该方法包括以下步骤：在具有通孔的基底基板的上表面和下表面上层叠第一干膜，同时用铜箔在其上表面和下表面上形成，并且对第一干膜进行图案化，以暴露基底基板的预定表面部分除去未被第一干膜覆盖的铜箔的部分以形成电路，剥离第一干膜，并在基底基板上形成镀层，将第二干膜层叠在基底基板的镀覆表面上，第二干膜，以暴露对应于要镀覆的区域的基底基板的镀面的部分，从与Au镀区相对应的基底基板的暴露表面部分去除镀层，在暴露表面上镀Au 部分基底，剥离第二干膜，并除去剩余的镀层以露出电路，并涂覆已售出在露出电路的同时暴露电路的预定部分。

3. 发明授权

US06872590B2 Package substrate for electrolytic leadless plating and manufacturing method thereof 失效
标题翻译：电解无铅电镀用封装基板及其制造方法
公开(公告)号：US06872590B2
公开(公告)日：2005-03-29
申请号：US10626437
申请日：2003-07-24
申请人： Jong-Jin Lee , Tae-Gui Kim
发明人： Jong-Jin Lee , Tae-Gui Kim
IPC分类号： H01L23/12 , H01L21/48 , H05K3/02 , H05K3/06 , H05K3/24 , H05K3/42 , H01L21/44
CPC分类号： H05K3/243 , H01L21/4846 , H01L21/4857 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H05K3/064 , H05K3/426 , H05K3/427 , H05K2201/0352 , H05K2203/072 , H05K2203/0723 , H05K2203/1394 , H05K2203/1476 , H01L2924/00014 , H01L2924/00
摘要： Disclosed is a package substrate for electrolytic leadless plating, characterized in that a wire bonding pad onto which a semiconductor chip is mounted is subjected to electrolytic leadless Au plating, and a solder ball pad is subjected to OSP metal finishing or electroless Au plating without use of plating lead lines, upon preparation thereof. A method of manufacturing the package substrate is also disclosed. The method includes Cu plating a whole surface of a base substrate having through-holes, developing a first dry film laminated onto the through-holes, removing a copper foil not covered with the first dry film, stripping the first dry film, exposing and developing a second dry film on the substrate so that only an upper portion to be subjected to electrolytic Au plating is exposed, grounding an electrolytic Au plating terminal to a solder ball pad, Ni—Au plating the wire bonding pad, removing the second dry film by a stripping solution, exposing and developing a third dry film, removing the exposed copper foil by an etching solution, removing the third dry film by a stripping solution, performing a series of processes of coating, exposing, developing and drying a solder resist, and subjecting the solder ball pad to OSP metal finishing.
摘要翻译：公开了一种用于电解无铅电镀的封装衬底，其特征在于，对其上安装有半导体芯片的引线焊盘进行电解无铅镀Au，并且焊球垫经受OSP金属整理或无电镀Au，而不使用电镀引线在制备时。还公开了一种制造封装衬底的方法。该方法包括对具有通孔的基底基板的整个表面进行镀铜，形成层压在通孔上的第一干膜，除去未被第一干膜覆盖的铜箔，剥离第一干膜，曝光和显影在基板上的第二干膜，使得只有待进行电解Au电镀的上部暴露，将电解Au电镀端子接地到焊球垫，Ni-Au电镀引线接合焊盘，通过以下步骤除去第二干膜剥离溶液，曝光和显影第三干膜，通过蚀刻溶液除去暴露的铜箔，通过剥离溶液除去第三干膜，进行一系列涂布，曝光，显影和干燥阻焊剂的工艺，以及对焊锡球进行OSP金属加工。

4. 发明申请

US20100122842A1 PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：US20100122842A1
公开(公告)日：2010-05-20
申请号：US12428776
申请日：2009-04-23
申请人： Tae-Gui KIM , Young-Hwan Shin , Jae-Soo Lee , Tae-Gon Lee
发明人： Tae-Gui KIM , Young-Hwan Shin , Jae-Soo Lee , Tae-Gon Lee
IPC分类号： H01R12/06 , H05K3/00
CPC分类号： H05K3/0035 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/15311 , H01L2924/181 , H05K3/108 , H05K3/243 , H05K3/421 , H05K3/427 , H05K2201/0394 , H05K2201/09481 , H05K2201/09736 , H05K2203/0369 , H01L2924/00014 , H01L2924/00012
摘要： A printed circuit board and a method of manufacturing the printed circuit board are disclosed. The method of manufacturing a printed circuit board including a via, which is configured to electrically connect both sides of an insulator, and a pad part, which is formed in one side of the insulator to be directly in contact with the via, can include forming a seed layer part on one side of the insulator, a portion of the seed layer part being bulged, forming a via hole by processing the other side of the insulator, corresponding to the bulged portion of the seed layer part, forming the via inside the via hole, and forming a plating layer, corresponding to the pad part, on the seed layer part. With the present invention, it is possible to form a pattern having a finer pitch, maintaining a VOP structure and to prevent a lower side of a substrate from being penetrated through when a via hole is processed.
摘要翻译：公开了印刷电路板和印刷电路板的制造方法。制造包括通孔的印刷电路板的制造方法，该印刷电路板被配置为电连接绝缘体的两侧，并且形成在绝缘体的一个侧面中以与通孔直接接触的焊盘部分可以包括成形种子层部分在绝缘体的一侧上，种子层部分的一部分被凸出，通过处理绝缘体的另一侧形成通孔，对应于种子层部分的凸起部分，在该内部形成通孔并且在种子层部分上形成对应于焊盘部分的镀层。利用本发明，可以形成具有更细的间距的图案，保持VOP结构并且防止当加工通孔时衬底的下侧被穿透。

5. 发明申请

US20050194696A1 Package substrate manufactured using electrolytic leadless plating process, and method for manufacturing the same 失效
公开(公告)号：US20050194696A1
公开(公告)日：2005-09-08
申请号：US11034251
申请日：2005-01-13
申请人： Young-Hwan Shin , Chong-Ho Kim , Tae-Gui Kim
发明人： Young-Hwan Shin , Chong-Ho Kim , Tae-Gui Kim
IPC分类号： C25D7/00 , H01L21/48 , H01L23/12 , H01L23/31 , H01L23/498 , H01L23/50 , H05K3/02 , H05K3/24 , H05K3/28 , H01L23/48
CPC分类号： H05K3/243 , H01L21/4846 , H01L23/3128 , H01L23/498 , H01L23/50 , H01L24/48 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/00015 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H05K3/282 , H05K2203/0361 , H05K2203/0542 , H05K2203/1572 , Y10T29/49124 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , Y10T29/49204 , H01L2224/05599 , H01L2224/85399 , H01L2224/45099 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A package substrate of, for example, a BGA type or a CSP type, manufactured by carrying out an electrolytic Au plating process without using any plating lead line for formation of bond fingers and solder ball pads, and a method for manufacturing the package substrate. The method includes the steps of laminating first dry films over upper and lower surfaces of a base substrate having via holes while being formed at its upper and lower surfaces with copper foils, and patterning the first dry films to expose predetermined surface portions of the base substrate, removing portions of the copper foils not covered by the first dry films to form circuits, stripping the first dry films, and forming a plated layer over the base substrate, laminating second dry films over the plated surfaces of the base substrate, and patterning the second dry films to expose portions of the plated surfaces of the base substrate corresponding to regions where Au is to be plated, removing the plated layer from the exposed surface portions of the base substrate corresponding to the Au plating regions, plating Au on the exposed surface portions of the base substrate, stripping the second dry films, and removing the remaining plated layer to expose the circuits, and coating a solder resist on the exposed circuits while exposing predetermined portions of the circuits.

6. 发明授权

US06852625B2 Package substrate manufactured using electrolytic leadless plating process, and method for manufacturing the same 失效
标题翻译：使用电解无铅电镀工艺制造的封装衬底及其制造方法
公开(公告)号：US06852625B2
公开(公告)日：2005-02-08
申请号：US10617726
申请日：2003-07-14
申请人： Young-Hwan Shin , Chong-Ho Kim , Tae-Gui Kim
发明人： Young-Hwan Shin , Chong-Ho Kim , Tae-Gui Kim
IPC分类号： C25D7/00 , H01L21/48 , H01L23/12 , H01L23/31 , H01L23/498 , H01L23/50 , H05K3/02 , H05K3/24 , H05K3/28 , H01L21/44 , H05K3/00
CPC分类号： H05K3/243 , H01L21/4846 , H01L23/3128 , H01L23/498 , H01L23/50 , H01L24/48 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014 , H01L2924/00015 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H05K3/282 , H05K2203/0361 , H05K2203/0542 , H05K2203/1572 , Y10T29/49124 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165 , Y10T29/49204 , H01L2224/05599 , H01L2224/85399 , H01L2224/45099 , H01L2924/00012 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A package substrate of, for example, a BGA type or a CSP type, manufactured by carrying out an electrolytic Au plating process without using any plating lead line for formation of bond fingers and solder ball pads, and a method for manufacturing the package substrate. The method includes the steps of laminating first dry films over upper and lower surfaces of a base substrate having via holes while being formed at its upper and lower surfaces with copper foils, and patterning the first dry films to expose predetermined surface portions of the base substrate, removing portions of the copper foils not covered by the first dry films to form circuits, stripping the first dry films, and forming a plated layer over the base substrate, laminating second dry films over the plated surfaces of the base substrate, and patterning the second dry films to expose portions of the plated surfaces of the base substrate corresponding to regions where Au is to be plated, removing the plated layer from the exposed surface portions of the base substrate corresponding to the Au plating regions, plating Au on the exposed surface portions of the base substrate, stripping the second dry films, and removing the remaining plated layer to expose the circuits, and coating a solder resist on the exposed circuits while exposing predetermined portions of the circuits.
摘要翻译：通过进行电解Au电镀工艺而不使用用于形成粘合指状物的焊接引线和焊球焊盘来制造的例如BGA型或CSP型的封装衬底以及制造封装衬底的方法。该方法包括以下步骤：在具有通孔的基底基板的上表面和下表面上层叠第一干膜，同时用铜箔在其上表面和下表面上形成，并且对第一干膜进行图案化，以暴露基底基板的预定表面部分除去未被第一干膜覆盖的铜箔的部分以形成电路，剥离第一干膜，并在基底基板上形成镀层，将第二干膜层叠在基底基板的镀覆表面上，第二干膜，以暴露对应于要镀覆的区域的基底基板的镀面的部分，从与Au镀区相对应的基底基板的暴露表面部分去除镀层，在暴露表面上镀Au 部分基底，剥离第二干膜，并除去剩余的镀层以露出电路，并涂覆已售出在露出电路的同时暴露电路的预定部分。

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