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1. 发明授权

US07868907B2 Thermal head driving IC and method of controlling the same 有权
标题翻译：热敏头驱动IC及其控制方法
公开(公告)号：US07868907B2
公开(公告)日：2011-01-11
申请号：US12011383
申请日：2008-01-24
申请人： Tadao Akamine , Toshihiko Omi
发明人： Tadao Akamine , Toshihiko Omi
IPC分类号： B41J2/32
CPC分类号： B41J2/35
摘要： A thermal head driving IC for supplying voltage to a plurality of heating resistors each controlled by a driving MOS transistor includes a switch for making and breaking electrically between a substrate and a source of the plurality of driving MOS transistors. In a case where the plurality of heating resistors are activated, the plurality of driving MOS transistors are turned on and the switch is turned off, whereby the substrate potential is floated. As a result, the substrate potential is forward-biased against the source by a substrate current generated in a high-electric-field depletion region near the drain, and a parasitic bipolar transistor turns on, whereby both the plurality of driving MOS transistors and the parasitic bipolar transistor turn on. In a case where the plurality of heating resistors are not activated, a signal for turning off the plurality of driving NMOS transistors is given, and the switch is turned on.
摘要翻译：用于向由驱动MOS晶体管控制的多个加热电阻器提供电压的热敏头驱动IC包括用于在衬底和多个驱动MOS晶体管的源极之间电气断开的开关。在多个加热电阻器被激活的情况下，多个驱动MOS晶体管导通，开关断开，从而基板电位浮起。结果，衬底电位通过在漏极附近的高电场耗尽区中产生的衬底电流而相对于源极被偏置，并且寄生双极晶体管导通，由此多个驱动MOS晶体管和寄生双极晶体管导通。在多个加热电阻器未被激活的情况下，给出用于关闭多个驱动NMOS晶体管的信号，并且开关导通。

2. 发明授权

US5874352A Method of producing MIS transistors having a gate electrode of matched conductivity type 失效
标题翻译：制造具有匹配导电型栅极的MIS晶体管的方法
公开(公告)号：US5874352A
公开(公告)日：1999-02-23
申请号：US544454
申请日：1995-10-18
申请人： Tadao Akamine , Kenji Aoki
发明人： Tadao Akamine , Kenji Aoki
IPC分类号： H01L21/225 , H01L21/3215 , H01L21/336 , H01L29/78 , H01L21/223
CPC分类号： H01L29/66575 , H01L21/2254 , H01L21/32155 , H01L29/78
摘要： A method of producing an MIS transistor by preparing a substrate formed with a gate electrode and a semiconductor layer which defines a source region and a drain region, removing a natural oxide film from a surface of the gate electrode and from a surface of the semiconductor layer to expose an active surface, delivering a source gas containing an impurity component to the exposed active surface to deposit thereon an impurity adsorption film, and annealing the substrate to diffuse the impurity component from the impurity adsorption film into the gate electrode and concurrently into the semiconductor layer to form the source and drain regions. The gate electrode has the same conductivity type as the source and drain regions.
摘要翻译：一种制造MIS晶体管的方法，该方法通过制备形成有栅电极的基板和限定源区和漏区的半导体层，从栅电极的表面和半导体层的表面去除自然氧化膜暴露活性表面，将含有杂质组分的源气体输送到暴露的活性表面上以沉积杂质吸附膜，并使衬底退火以将杂质成分从杂质吸附膜扩散到栅电极中并同时进入半导体层以形成源区和漏区。栅电极具有与源区和漏区相同的导电类型。

3. 发明授权

US5744850A Photoelectric conversion semiconductor device 失效
标题翻译：光电转换半导体器件
公开(公告)号：US5744850A
公开(公告)日：1998-04-28
申请号：US733967
申请日：1996-10-18
申请人： Keiji Sato , Yutaka Saitoh , Tadao Akamine
发明人： Keiji Sato , Yutaka Saitoh , Tadao Akamine
IPC分类号： H01L31/10 , H01L27/144 , H01L31/107 , H01L31/075 , H01L31/105 , H01L31/117
CPC分类号： H01L27/1443 , H01L31/107
摘要： A novel photoelectric conversion semiconductor device having an amplifying function which can be readily fabricated is provided. An N.sup.+ -type impurity domain whose impurity concentration is higher than that of an N.sup.- -type semiconductor substrate is formed on one surface thereof and a P.sup.+ -type impurity domain is formed on the opposite surface. An SiO.sub.2 film, an Si.sub.3 N.sub.4 film and an SiO.sub.2 film are formed extending to the domain of the N.sup.- -type semiconductor substrate, exceeding the N.sup.+ -type impurity domain. An anode electrode is formed on the N.sup.+ -type impurity domain and a cathode electrode is formed on the P.sup.+ -type impurity domain. A polysilicon gate electrode is formed on the SiO.sub.2 film, i.e. the top layer, and an Al gate electrode is formed thereon. A reverse voltage is applied between the anode electrode and the cathode electrode and a predetermined voltage is applied between the anode electrode and the Al gate electrode.
摘要翻译：提供了具有可容易地制造的放大功能的新颖的光电转换半导体器件。在其一个表面上形成杂质浓度高于N型半导体衬底的杂质浓度的N +型杂质区域，在相对的表面上形成P +型杂质区域。形成了延伸到N型半导体衬底的超过N +型杂质域的SiO 2膜，Si 3 N 4膜和SiO 2膜。在N +型杂质区域上形成阳极电极，在P +型杂质区域上形成阴极电极。在SiO 2膜即顶层上形成多晶硅栅电极，在其上形成Al栅电极。在阳极电极和阴极电极之间施加反向电压，并且在阳极电极和Al栅电极之间施加预定电压。

4. 发明授权

US5338697A Doping method of barrier region in semiconductor device 失效
标题翻译：半导体器件屏障区掺杂法
公开(公告)号：US5338697A
公开(公告)日：1994-08-16
申请号：US620615
申请日：1990-12-03
申请人： Kenji Aoki , Tadao Akamine , Naoto Saito
发明人： Kenji Aoki , Tadao Akamine , Naoto Saito
IPC分类号： H01L21/225 , H01L21/336 , H01L21/762 , H01L29/06 , H01L29/10 , H01L21/76
CPC分类号： H01L29/66651 , H01L21/2254 , H01L21/762 , H01L29/0653 , H01L29/1083 , Y10S148/037
摘要： An exposed active surface is prepared on a major surface of a semiconductor substrate. A source gas containing an impurity component is applied to the exposed active surface to adsorb thereon a film of the impurity component so as to form a barrier region along the major surface of the semiconductor substrate. A semiconductor device is formed on the major surface of the semiconductor substrate and is protected by the barrier region.
摘要翻译：在半导体衬底的主表面上制备曝光的活性表面。将含有杂质成分的源气体施加到暴露的活性表面上以在其上吸附杂质成分的膜，以沿着半导体基板的主表面形成阻挡区域。半导体器件形成在半导体衬底的主表面上并被阻挡区保护。

5. 发明授权

US5925574A Method of producing a bipolar transistor 失效
标题翻译：双极晶体管的制造方法
公开(公告)号：US5925574A
公开(公告)日：1999-07-20
申请号：US865646
申请日：1992-04-10
申请人： Kenji Aoki , Tadao Akamine , Yoshikazu Kojima
发明人： Kenji Aoki , Tadao Akamine , Yoshikazu Kojima
IPC分类号： H01L21/225 , H01L21/331 , H01L21/265
CPC分类号： H01L29/66287 , H01L21/2254 , Y10S148/017 , Y10S148/034 , Y10S148/144
摘要： A method of producing a bipolar transistor composed of collector, base and emitter regions disposed sequentially on a semiconductor substrate. According to the method, a semiconductor layer is deposited on the collector region, the semiconductor layer is cleaned to expose an active surface, an impurity source gas is applied to the exposed active surface while heating the substrate to form an impurity adsorption layer, the impurity is diffused into the semiconductor layer to form the base region, another semiconductor layer is deposited on the base region, this semiconductor layer is cleaned to expose an active surface, another impurity source gas is applied to the exposed active surface while heating the substrate to form another impurity adsorption layer, and impurity is diffused into the semiconductor layer to from the impurity adsorption layer to form the emitter region.
摘要翻译：一种制造由依次设置在半导体衬底上的集电极，基极和发射极组成的双极晶体管的方法。根据该方法，在集电极区域上淀积半导体层，对半导体层进行清洗以露出活性表面，在对基板进行加热而形成杂质吸附层的同时，向露出的活性表面施加杂质源气体，杂质吸附层扩散到半导体层中以形成基极区域，另一半导体层沉积在基极区上，该半导体层被清洁以暴露活性表面，另一杂质源气体被加到暴露的有源表面上，同时加热衬底形成另一杂质吸附层，杂质从杂质吸附层扩散到半导体层中，形成发射极区域。

6. 发明授权

US5124272A Method of producing field effect transistor 失效
标题翻译：生产场效应晶体管的方法
公开(公告)号：US5124272A
公开(公告)日：1992-06-23
申请号：US565960
申请日：1990-08-13
申请人： Naoto Saito , Kenji Aoki , Tadao Akamine , Yoshikazu Kojima , Kunihiro Takahashi , Masahiko Kinbara
发明人： Naoto Saito , Kenji Aoki , Tadao Akamine , Yoshikazu Kojima , Kunihiro Takahashi , Masahiko Kinbara
IPC分类号： H01L21/225 , H01L21/336
CPC分类号： H01L29/66575 , H01L21/2254 , H01L29/66628 , H01L29/66636
摘要： An impurity adsorption layer is selectively formed from a gas containing an impurity on a semiconductor surface. Solid-phase diffusion of the impurity is effected from the impurity adsorption layer into the semiconductor surface to form a source region and a drain region having a sufficiently small resistivity and an ultrashallow PN junction depth, thereby producing a metal-insulator semiconductor field-effect-transistor featuring fast operating speed and reduced dimensions.

7. 发明申请

US20080180512A1 Thermal head driving IC and method of controlling the same 有权
标题翻译：热敏头驱动IC及其控制方法
公开(公告)号：US20080180512A1
公开(公告)日：2008-07-31
申请号：US12011383
申请日：2008-01-24
申请人： Tadao Akamine , Toshihiko Omi
发明人： Tadao Akamine , Toshihiko Omi
IPC分类号： B41J2/35
CPC分类号： B41J2/35
摘要： Provided is a thermal head driving IC for supplying voltage to a plurality of heating resistors each controlled by a driving MOS transistor, including a switch for making and breaking between a substrate and a source of the plurality of driving MOS transistors. In a case where the plurality of heating resistors are activated, the plurality of driving MOS transistors are turned on and the switch is turned off, a substrate is floated. As a result, a substrate potential is forward-biased against the source by a substrate current generated in a high-electric-field depletion region near the drain, and a parasitic bipolar transistor turns on, whereby both the plurality of driving MOS transistors and the parasitic bipolar transistor turn on. In a case where the plurality of heating resistors are not activated, a signal for turning off the plurality of driving NMOS transistors is given, and the switch is turned on.
摘要翻译：提供了一种用于向由驱动MOS晶体管控制的多个加热电阻器提供电压的热敏头驱动IC，包括用于在基板和多个驱动MOS晶体管的源极之间制造和断开的开关。在多个加热电阻器被激活的情况下，多个驱动MOS晶体管导通，开关截止，基板浮起。结果，衬底电位通过在漏极附近的高电场耗尽区域中产生的衬底电流而相对于源极被正向偏置，并且寄生双极晶体管导通，由此多个驱动MOS晶体管和寄生双极晶体管导通。在多个加热电阻器未被激活的情况下，给出用于关闭多个驱动NMOS晶体管的信号，并且开关导通。

8. 发明授权

US5763903A Avalanche photodiode for light detection 失效
标题翻译：用于光检测的雪崩光电二极管
公开(公告)号：US5763903A
公开(公告)日：1998-06-09
申请号：US516234
申请日：1995-08-17
申请人： Masaaki Mandai , Tomoyuki Yoshino , Tadao Akamine , Yutaka Saitoh , Junko Yamanaka , Osamu Koseki
发明人： Masaaki Mandai , Tomoyuki Yoshino , Tadao Akamine , Yutaka Saitoh , Junko Yamanaka , Osamu Koseki
IPC分类号： H01L27/144 , H01L31/02 , H01L31/0203 , H01L31/107 , H01L31/0328
CPC分类号： H01L31/0203 , H01L27/1443 , H01L27/1464 , H01L31/107 , H01L2224/73265 , H01L2924/01322 , H01L2924/10158
摘要： An avalanche photodiode for detecting x-rays and other radiation comprises a first substrate having a portion removed therefrom, a first insulating film formed on the first substrate, a second substrate comprising a floating zone silicon semiconductor substrate disposed on the first insulating film, an impurity region selectively formed in the second substrate at a surface corresponding to the removed portion, a PN junction formed on the second substrate, a glass substrate mounted to the second substrate, a first electrode formed on the first substrate for applying a voltage to the impurity region, a second electrode formed on the second substrate for applying a voltage to the second substrate, a third electrode formed on the glass substrate and electrically connected to the second electrode, and an integrated circuit package having a lead pin connected to the third electrode. Accordingly, a shallow depletion layer may be provided on a floating zone SOI substrate. The substrates may be joined to the glass substrate using a eutectic bonding process.
摘要翻译：用于检测X射线和其它辐射的雪崩光电二极管包括：第一衬底，其具有从其中去除的部分;第一绝缘膜，形成在第一衬底上;第二衬底，包括布置在第一绝缘膜上的浮动区硅半导体衬底，在与第二基板对应的表面上选择性地形成在第二基板上的区域，形成在第二基板上的PN结，安装到第二基板的玻璃基板，形成在第一基板上的用于向杂质区域施加电压的第一电极形成在第二基板上的用于向第二基板施加电压的第二电极，形成在玻璃基板上并电连接到第二电极的第三电极，以及具有连接到第三电极的引脚的集成电路封装。因此，可以在浮动区域SOI衬底上提供浅耗尽层。可以使用共晶接合工艺将基板连接到玻璃基板。

9. 发明授权

US5532185A Impurity doping method with adsorbed diffusion source 失效
标题翻译：杂质掺杂法与吸附扩散源
公开(公告)号：US5532185A
公开(公告)日：1996-07-02
申请号：US858173
申请日：1992-03-27
申请人： Tadao Akamine , Naoto Saito , Kenji Aoki
发明人： Tadao Akamine , Naoto Saito , Kenji Aoki
IPC分类号： H01L21/22 , H01L21/225 , H01L21/385
CPC分类号： H01L21/2254 , H01L21/2225
摘要： The surface of a silicon wafer is cleaned to expose chemically active surface. Diborane gas is fed to the exposed active surface for adsorbing boron to the active surface. The adsorbed boron on the silicon wafer works as an impurity diffusion source. Boron is diffused from the impurity diffusion source into the silicon wafer to make an impurity diffusion layer by heat treatment. The amount of diborane gas fed to the active surface is set in an amount at which the sheet resistance of the impurity diffusion layer does not depend on variations in feed amount.
摘要翻译：清洁硅晶片的表面以暴露化学活性表面。将二烷烃气体供给到暴露的活性表面，以将硼吸附到活性表面。硅晶片上吸附的硼作为杂质扩散源。硼从杂质扩散源扩散到硅晶片中，通过热处理形成杂质扩散层。供给到活性表面的乙硼烷气体的量设定为杂质扩散层的薄层电阻不依赖于进料量的变化。

10. 发明授权

US5753530A Impurity doping method with diffusion source of boron-silicide film 失效
标题翻译：掺杂掺杂硼硅化物膜扩散源的方法
公开(公告)号：US5753530A
公开(公告)日：1998-05-19
申请号：US449655
申请日：1995-05-24
申请人： Tadao Akamine , Naoto Saito , Kenji Aoki , Yoshikazu Kojima
发明人： Tadao Akamine , Naoto Saito , Kenji Aoki , Yoshikazu Kojima
IPC分类号： H01L21/225 , H01L21/285 , H01L21/306 , H01L21/331 , H01L21/336 , H01L21/385
CPC分类号： H01L21/02046 , H01L21/2257 , H01L21/28512 , H01L29/66272 , H01L29/66545 , H01L29/66575 , Y10S438/906
摘要： A solid phase diffusion process using boron silicide film as diffusion source to improve controllability of diffusion of boron impurity into a silicon substrate in order to achieve a shallow junction. The process includes: cleaning the surface of a Si substrate by removing the native oxide film thereof to expose an active surface; treating the active surface to form thereon a boron silicide film as an impurity source; and introducing boron impurity from the boron silicide film into the Si substrate to form a boron diffusion layer. In this manner, a boron diffusion layer having a high surface concentration and a shallow junction can be formed because the boron silicide film is formed directly on the surface of the Si substrate. Because the boron silicide film is chemically and physically stable, an improved diffusion controllability is obtained. The diffusion controllability is further improved by accurately evaluating the impurity film optically during the fabrication process. A structure composed of a boron diffusion layer and a boron silicide region provides a high speed, highly integrated, and highly reliable semiconductor device, particularly when the boron silicide region is disposed between an impurity region and an electrode metal.
摘要翻译：使用硅化硅膜作为扩散源的固相扩散工艺，以提高硼杂质扩散到硅衬底中的可控性，以便实现浅结。该方法包括：通过去除其自然氧化膜以暴露活性表面来清洁Si衬底的表面; 处理活性表面以形成作为杂质源的硼化硅膜; 并将硼杂质从硅化硅膜引入Si衬底中以形成硼扩散层。以这种方式，可以形成具有高表面浓度和浅结的硼扩散层，因为硅化硅膜直接形成在Si衬底的表面上。因为硼化硅膜在化学和物理上是稳定的，所以获得改进的扩散控制性。通过在制造过程中光学地精确评估杂质膜，进一步提高了扩散控制性。由硼扩散层和硼硅化物区组成的结构提供高速，高度集成且高度可靠的半导体器件，特别是当硅化硼区域设置在杂质区域和电极金属之间时。

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