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1. 发明授权

US06171947B2 Method of reducing incidence of stress-induced voiding in semiconductor interconnect lines 失效
标题翻译：降低半导体互连线中应力诱发空隙的发生率的方法
公开(公告)号：US06171947B2
公开(公告)日：2001-01-09
申请号：US09209367
申请日：1998-12-08
申请人： Suzette K. Pangrle , Paul R. Besser , Minh Van Ngo , Stephan Keetai Park , Susan Tovar
发明人： Suzette K. Pangrle , Paul R. Besser , Minh Van Ngo , Stephan Keetai Park , Susan Tovar
IPC分类号： H01L2131
CPC分类号： H01L21/3145 , H01L21/76834
摘要： In a method for forming an interlayer dielectric (ILD) coating on microcircuit interconnect lines of a substrate, the substrate and interconnect lines are annealed prior to deposition of an ILD. A post annealing SiON layer is formed by using plasma-enhanced chemical vapor deposition. The deposition using a plasma formed of nitrogen, nitrous oxide, and silane gases, with the gases being dispensed at regulated flow rates and being energized by a radio frequency power source. The plasma reacts to form SiON which is deposited on a semiconductor substrate. Additionally, during deposition, minor adjustments are made to deposition temperature and process pressure to control the optical characteristics of the SiON layer. The SiON layer is tested for acceptable optical properties and acceptable SiON layers are coated with a SiO2 layer to complete formation of the ILD. Once the ILD is formed the substrate is in readiness for further processing. The pre-ILD annealing results in a substantially reduced incidence of stress-induced voiding in the underlying interconnect lines. Furthermore, the pre-ILD annealing can be combined with other advantageous process environments to more significantly reduce the incidence of stress-induced voiding in the underlying interconnect lines. Such combinations include process temperature reduction to below about 380 degrees Celsius and reduction of silane flow rate to less than about sixty standard cubic centimeters per minute.
摘要翻译：在用于在衬底的微电路互连线上形成层间电介质（ILD）涂层的方法中，衬底和互连线在沉积ILD之前被退火。通过使用等离子体增强化学气相沉积形成后退火SiON层。使用由氮气，一氧化二氮和硅烷气体形成的等离子体的沉积，其中气体以稳定的流速分配并由射频电源激励。等离子体反应形成沉积在半导体衬底上的SiON。此外，在沉积期间，对沉积温度和工艺压力进行微调，以控制SiON层的光学特性。测试SiON层的可接受的光学性能，并且用SiO 2层涂覆可接受的SiON层以完成ILD的形成。一旦形成了ILD，底物就可以进行进一步的处理。前ILD退火导致底层互连线中应力诱发的排泄的发生率显着降低。此外，前ILD退火可以与其他有利的工艺环境组合，以更显着地降低底层互连线中的应力诱发的排空的发生。这样的组合包括将工艺温度降低至低于约380摄氏度，并将硅烷流速降低至小于约60标准立方厘米每分钟。

2. 发明授权

US06383950B1 Insulating and capping structure with preservation of the low dielectric constant of the insulating layer 有权
标题翻译：绝缘和封盖结构保存绝缘层的低介电常数
公开(公告)号：US06383950B1
公开(公告)日：2002-05-07
申请号：US09974568
申请日：2001-10-10
申请人： Suzette K. Pangrle , Minh Van Ngo , Susan Tovar
发明人： Suzette K. Pangrle , Minh Van Ngo , Susan Tovar
IPC分类号： H01L21469
CPC分类号： H01L21/76801 , H01L21/76829
摘要： An insulating and capping structure of an integrated circuit is formed on a semiconductor wafer. An insulating layer is formed on the semiconductor wafer, and the insulating layer is comprised of a dielectric material having a low dielectric constant that is less than about 4.0 and having chemical bonds that are chemically reactive with a predetermined reactant. A reaction barrier layer is formed on the insulating layer, and the reaction barrier layer is comprised of a material that is not chemically reactive with the predetermined reactant. A capping layer is formed on the reaction barrier layer, and the capping layer is formed using the predetermined reactant. The reaction barrier layer prevents contact of the predetermined reactant with the insulating layer to prevent reaction of the predetermined reactant with the chemical bonds of the dielectric material of the insulating layer that are chemically reactive with the predetermined reactant such that the low dielectric constant of the dielectric material of the insulating layer is not increased by the formation of the capping layer. The present invention may be used to particular advantage when the predetermined reactant used for forming the capping layer and that is reactive with the insulating layer is oxygen plasma and when the reaction barrier layer is comprised of silicon nitride.
摘要翻译：在半导体晶片上形成集成电路的绝缘和封盖结构。在半导体晶片上形成绝缘层，绝缘层由具有小于约4.0的低介电常数且具有与预定反应物发生化学反应的化学键的电介质材料构成。在绝缘层上形成反应阻挡层，反应阻挡层由与预定反应物不具有化学反应性的材料构成。在反应阻挡层上形成覆盖层，使用规定的反应物形成覆盖层。反应阻挡层防止预定反应物与绝缘层的接触，以防止预定反应物与绝缘层的电介质材料与预定反应物发生化学反应的化学键的反应，使得电介质的低介电常数通过形成覆盖层，绝缘层的材料不会增加。当用于形成覆盖层并且与绝缘层反应的预定反应物是氧等离子体和当反应阻挡层由氮化硅构成时，本发明可以特别有用。

3. 发明授权

US06326692B1 Insulating and capping structure with preservation of the low dielectric constant of the insulating layer 有权
标题翻译：绝缘和封盖结构保存绝缘层的低介电常数
公开(公告)号：US06326692B1
公开(公告)日：2001-12-04
申请号：US09511465
申请日：2000-02-23
申请人： Suzette K. Pangrle , Minh Van Ngo , Susan Tovar
发明人： Suzette K. Pangrle , Minh Van Ngo , Susan Tovar
IPC分类号： H01L2348
CPC分类号： H01L21/76801 , H01L21/76829
摘要： An insulating and capping structure of an integrated circuit is formed on a semiconductor wafer. An insulating layer is formed on the semiconductor wafer, and the insulating layer is comprised of a dielectric material having a low dielectric constant that is less than about 4.0 and having chemical bonds that are chemically reactive with a predetermined reactant. A reaction barrier layer is formed on the insulating layer, and the reaction barrier layer is comprised of a material that is not chemically reactive with the predetermined reactant. A capping layer is formed on the reaction barrier layer, and the capping layer is formed using the predetermined reactant. The reaction barrier layer prevents contact of the predetermined reactant with the insulating layer to prevent reaction of the predetermined reactant with the chemical bonds of the dielectric material of the insulating layer that are chemically reactive with the predetermined reactant such that the low dielectric constant of the dielectric material of the insulating layer is not increased by the formation of the capping layer. The present invention may be used to particular advantage when the predetermined reactant used for forming the capping layer and that is reactive with the insulating layer is oxygen plasma and when the reaction barrier layer is comprised of silicon nitride.
摘要翻译：在半导体晶片上形成集成电路的绝缘和封盖结构。在半导体晶片上形成绝缘层，绝缘层由具有小于约4.0的低介电常数且具有与预定反应物发生化学反应的化学键的电介质材料构成。在绝缘层上形成反应阻挡层，反应阻挡层由与预定反应物不具有化学反应性的材料构成。在反应阻挡层上形成覆盖层，使用规定的反应物形成覆盖层。反应阻挡层防止预定反应物与绝缘层的接触，以防止预定反应物与绝缘层的电介质材料与预定反应物发生化学反应的化学键的反应，使得电介质的低介电常数通过形成覆盖层，绝缘层的材料不会增加。当用于形成覆盖层并且与绝缘层反应的预定反应物是氧等离子体和当反应阻挡层由氮化硅构成时，本发明可以特别有用。

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