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1. 发明授权

US06455331B2 Process of top-surface-metallurgy plate-up bonding and rewiring for multilayer devices 失效
标题翻译：多层器件顶表面冶金平板焊接和再布线工艺
公开(公告)号：US06455331B2
公开(公告)日：2002-09-24
申请号：US09867364
申请日：2001-05-29
申请人： Roy Yu , Kamalesh S. Desai , Peter A. Franklin , Suryanarayana Kaja , Kimberley A. Kelly , Yeeling L. Lee , Arthur G. Merryman , Frank R. Morelli , Thomas A. Wassick
发明人： Roy Yu , Kamalesh S. Desai , Peter A. Franklin , Suryanarayana Kaja , Kimberley A. Kelly , Yeeling L. Lee , Arthur G. Merryman , Frank R. Morelli , Thomas A. Wassick
IPC分类号： H01L2100
CPC分类号： H01L21/485 , H05K3/225
摘要： A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.
摘要翻译：包括去除钝化聚酰亚胺层的器件修复过程。钝化聚酰亚胺层使用前半灰，然后是二分之一灰分除去。该设备在后半段灰分期间旋转。然后使用氢氧化钠（NaOH）清洁该装置，然后实施随后的轻灰步骤。在去除钝化聚酰亚胺层之后，将晶种层沉积在器件上。在种子层上形成光致抗蚀剂，并且在光致抗蚀剂中形成结合位点。修复冶金通过焊接点进行电镀。通过将设备耦合到固定装置并将电镀电镀施加到固定装置上来对接合部位进行电镀。设备和夹具之间的接触是通过底部表面冶金制成的。电镀后，去除残留的种子层，实施激光删除处理，以断开和隔离设备的网络。

2. 发明授权

US06329609B1 Method and structure to prevent distortion and expansion of organic spacer layer for thin film transfer-join technology 失效
标题翻译：防止有机间隔层变形和膨胀的薄膜转移接合技术的方法和结构
公开(公告)号：US06329609B1
公开(公告)日：2001-12-11
申请号：US09607098
申请日：2000-06-29
申请人： Suryanarayana Kaja , Chandrika Prasad , RongQing Yu
发明人： Suryanarayana Kaja , Chandrika Prasad , RongQing Yu
IPC分类号： H01R909
CPC分类号： H01R12/62 , H01R12/58 , H05K1/0306 , H05K3/3436 , H05K3/368 , H05K3/467 , H05K2201/0367 , H05K2201/09745 , H05K2201/2036 , Y02P70/613
摘要： An electronic component structure assembly comprising a thin film structure bonded to a multilayer ceramic substrate (MLC) using solder connections and wherein a non-conductive, compliant spacer preferably with a layer of thermoplastic adhesive on each surface thereof is interposed between the underlying MLC carrier and overlying thin film structure. The spacer includes a pattern of through-holes which corresponds to opposing contact pads of the thin film structure and MLC. The contact pads of at least one of the thin film structure or MLC have posts (e.g., metallic) thereon and the posts extend partly into the spacer through-holes whereby the height of the posts are greater than the thickness of the adhesive. The posts of the MLC have solder bumps thereon. After reflow under pressure the thin film structure is electrically and mechanically connected to the MLC and the join method has been found to provide a reliable and cost-effective process. The joined components also have enhanced operating life.
摘要翻译：一种电子部件结构组件，其包括使用焊料连接而结合到多层陶瓷基板（MLC）的薄膜结构，并且其中优选地在其每个表面上具有热塑性粘合剂层的非导电柔性间隔件插入在下面的MLC载体和上覆薄膜结构。间隔件包括对应于薄膜结构和MLC的相对接触焊盘的通孔图案。薄膜结构或MLC中的至少一个的接触垫在其上具有柱（例如金属），并且柱部分地延伸到间隔件通孔中，由此柱的高度大于粘合剂的厚度。 MLC的柱在其上具有焊料凸块。在压力下回流之后，薄膜结构电气和机械地连接到MLC，并且已经发现连接方法提供可靠和成本有效的方法。连接的部件也具有增强的使用寿命。

3. 发明授权

US06248599B1 Top-surface-metallurgy plate-up bonding and rewiring for multilayer devices 失效
标题翻译：多层器件的顶表面冶金平板接合和重新布线
公开(公告)号：US06248599B1
公开(公告)日：2001-06-19
申请号：US09452935
申请日：1999-12-02
申请人： Roy Yu , Kamalesh S. Desai , Peter A. Franklin , Suryanarayana Kaja , Kimberley A. Kelly , Yeeling L. Lee , Arthur G. Merryman , Frank R. Morelli , Thomas A. Wassick
发明人： Roy Yu , Kamalesh S. Desai , Peter A. Franklin , Suryanarayana Kaja , Kimberley A. Kelly , Yeeling L. Lee , Arthur G. Merryman , Frank R. Morelli , Thomas A. Wassick
IPC分类号： H01L2100
CPC分类号： H01L21/485
摘要： A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.
摘要翻译：包括去除钝化聚酰亚胺层的器件修复过程。钝化聚酰亚胺层使用前半灰，然后是二分之一灰分除去。然后使用氢氧化钠（NaOH）清洁该装置，然后实施随后的轻灰步骤。在去除钝化聚酰亚胺层之后，将晶种层沉积在器件上。在种子层上形成光致抗蚀剂，并且在光致抗蚀剂中形成结合位点。修复冶金通过焊接点进行电镀。通过将设备耦合到固定装置并将电镀电镀施加到固定装置上来对接合部位进行电镀。设备和夹具之间的接触是通过底部表面冶金制成的。电镀后，去除残留的种子层，实施激光删除处理，以断开和隔离设备的网络。

4. 发明授权

US6048741A Top-surface-metallurgy plate-up bonding and rewiring for multilayer devices 失效
标题翻译：多层器件的顶表面冶金平板接合和重新布线
公开(公告)号：US6048741A
公开(公告)日：2000-04-11
申请号：US962199
申请日：1997-10-31
申请人： Roy Yu , Kamalesh S. Desai , Peter A. Franklin , Suryanarayana Kaja , Kimberley A. Kelly , Yeeling L. Lee , Arthur G. Merryman , Frank R. Morelli , Thomas A. Wassick
发明人： Roy Yu , Kamalesh S. Desai , Peter A. Franklin , Suryanarayana Kaja , Kimberley A. Kelly , Yeeling L. Lee , Arthur G. Merryman , Frank R. Morelli , Thomas A. Wassick
IPC分类号： H01L21/48 , H05K3/22 , H01L21/00 , H01L21/44
CPC分类号： H01L21/485 , H05K3/225 , Y10S438/906 , Y10S438/94
摘要： A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.
摘要翻译：包括去除钝化聚酰亚胺层的器件修复过程。钝化聚酰亚胺层使用前半灰，然后是二分之一灰分除去。该设备在后半段灰分期间旋转。然后使用氢氧化钠（NaOH）清洁该装置，然后实施随后的轻灰步骤。在去除钝化聚酰亚胺层之后，将晶种层沉积在器件上。在种子层上形成光致抗蚀剂，并且在光致抗蚀剂中形成结合位点。修复冶金通过焊接点进行电镀。通过将设备耦合到固定装置并将电镀电镀施加到固定装置上来对接合部位进行电镀。设备和夹具之间的接触是通过底部表面冶金制成的。电镀后，去除残留的种子层，实施激光删除处理，以断开和隔离设备的网络。

5. 发明授权

US5483105A Module input-output pad having stepped set-back 失效
标题翻译：模块输入输出垫具有阶梯式回退
公开(公告)号：US5483105A
公开(公告)日：1996-01-09
申请号：US233025
申请日：1994-04-25
申请人： Suryanarayana Kaja , Eric D. Perfecto , William H. Price , Sampath Purushothaman , Srinivasa N. Reddy , Vivek M. Sura , George E. White
发明人： Suryanarayana Kaja , Eric D. Perfecto , William H. Price , Sampath Purushothaman , Srinivasa N. Reddy , Vivek M. Sura , George E. White
IPC分类号： H01R12/32 , H01L23/498 , H01R12/04 , H05K1/02 , H05K1/03 , H05K1/11 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/49811 , H05K1/111 , H01L2924/0002 , H01L2924/09701 , H05K1/0306 , H05K2201/09736 , H05K2201/098 , Y02P70/611
摘要： A ceramic substrate pad used for establishing brazed connection between a pin and the substrate in the packaging of microelectronic semiconductor circuit chip. The pad is characterized by a stepped setback in the upper surface thereof which setback is oxidized to prevent wetting by the brazing alloy which bonds the pin to the pad. Stresses attributable to the brazing are isolated from the setback area and thus have reduced effect in causing cracking at the edges of the pad-substrate interface.
摘要翻译：一种用于在微电子半导体电路芯片的封装中在引脚和衬底之间建立钎焊连接的陶瓷衬底焊盘。该焊盘的特征在于在其上表面具有阶梯状的挫折，其挫折被氧化以防止通过将销钉固定到焊盘的钎焊合金的润湿。由于钎焊产生的应力与塌陷区域隔离，因此在焊盘 - 衬底界面的边缘处产生破裂的效果降低。

6. 发明授权

US5382447A Process for fabricating improved multilayer interconnect systems 失效
标题翻译：制造改进的多层互连系统的方法
公开(公告)号：US5382447A
公开(公告)日：1995-01-17
申请号：US161764
申请日：1993-12-02
申请人： Suryanarayana Kaja , Eugene J. O'Sullivan , Alejandro G. Schrott
发明人： Suryanarayana Kaja , Eugene J. O'Sullivan , Alejandro G. Schrott
IPC分类号： H01L21/48 , H01L21/768 , H05K3/38 , H05K3/46 , B05D5/12
CPC分类号： H01L21/76886 , H01L21/4857 , H05K3/384 , H05K2201/0154 , H05K2203/0315 , H05K2203/072 , H05K3/385 , H05K3/4644
摘要： The invention provides a multilayer laminar interconnect package comprising a plurality of conductor circuit layers adhering to and sandwiched between a plurality of dielectric polyimide polymer layers where the conductor circuit layers are a circuit pattern of lines of conductive metal. The conductive metal, e.g. copper, is coated with a capping layer of a metal, e.g. cobalt, which capping layer is further characterized as having a thin layer of the capping metal oxide adhered to the surface thereof. The conductive layer is in contact with an overcoated polyimide dielectric layer such that the surface oxidized capping layer forms an adherent barrier layer at the interface of the polyimide and conductive line layers. The invention also provides a process for producing such interconnect packages.
摘要翻译：本发明提供一种多层层状互连封装，其包括粘附并夹在多个电介质聚酰亚胺聚合物层之间的多个导体电路层，其中导体电路层是导电金属线的电路图案。导电金属，例如铜被涂覆有金属覆盖层，例如金属。钴，该封盖层进一步表征为具有附着在其表面上的封盖金属氧化物的薄层。导电层与外涂聚酰亚胺电介质层接触，使得表面氧化覆盖层在聚酰亚胺和导电层的界面处形成粘附阻挡层。本发明还提供了一种用于生产这种互连封装的方法。

7. 发明授权

US4821578A Apparatus and methods for testing surface properties of a material 失效
公开(公告)号：US4821578A
公开(公告)日：1989-04-18
申请号：US212441
申请日：1988-06-28
申请人： Amarjit S. Brar , Jagdish P. Sherma , Suryanarayana Kaja
发明人： Amarjit S. Brar , Jagdish P. Sherma , Suryanarayana Kaja
IPC分类号： G01N3/00 , G01N3/30 , G01N3/48 , G01N19/04 , G01N33/38 , G01B21/00
CPC分类号： G01N3/303 , G01N3/48 , G01N19/04 , G01N2203/008 , G01N2203/0098 , G01N33/388
摘要： An apparatus for testing the surface properties of a material is disclosed. The apparatus includes an indentor which is suspended above the surface of a sample and dropped onto the sample. Several testing methods are also disclosed. Surface toughness is measured by dropping the indentor from a variable height and inspecting the surface for failure. Thin film strength is tested by making several drops from various heights and inspecting the surface for flaking of the layer. In addition, damping capacity can be measured by comparing the kinetic energy of the resulting from the drop of the indentor to the strain energy measured by a probe on the opposing surface of the sample.

8. 发明授权

US06669833B2 Process and apparatus for electroplating microscopic features uniformly across a large substrate 失效
标题翻译：电镀显微镜特征的方法和装置均匀地穿过大的基片
公开(公告)号：US06669833B2
公开(公告)日：2003-12-30
申请号：US10405537
申请日：2003-04-02
申请人： Suryanarayana Kaja , Chandrika Prasad , RongQing Roy Yu
发明人： Suryanarayana Kaja , Chandrika Prasad , RongQing Roy Yu
IPC分类号： C25D500
CPC分类号： C25D7/123 , C25D17/001 , C25D17/007 , C25D17/008 , H05K3/241 , Y10S204/07
摘要： A process and apparatus are provided for electroplating a film onto a substrate having a top side including a plating surface includes the following steps. Provide a plating tank with an electroplating bath. Provide an anode in the bath. Place a substrate having a plating surface to be electroplated into the electroplating bath connecting surfaces to be plated to a first cathode. Support a second cathode including a portion thereof with openings therethrough extending across the plating surface of the substrate and positioned between the substrate and the anode. Connect power to provide a negative voltage to the first cathode and provide a negative voltage to the second cathode, and provide a positive voltage to the anode.
摘要翻译：提供了一种用于将膜电镀到具有包括电镀表面的顶侧的基板上的工艺和设备，包括以下步骤。提供带电镀槽的电镀槽。在浴缸里提供阳极。将具有要电镀的电镀表面的衬底放置到要镀覆的电镀浴连接表面到第一阴极。支撑包括其一部分的第二阴极，其开口穿过基板的电镀表面延伸并且定位在基板和阳极之间。连接电源以向第一阴极提供负电压，并向第二阴极提供负电压，并向阳极提供正电压。

9. 发明授权

US6131796A Direct brazing of refractory metal features 失效
$Direct brazing of refractory metal features$
标题翻译：耐火金属特征的直接钎焊
公开(公告)号：US6131796A
公开(公告)日：2000-10-17
申请号：US960563
申请日：1997-10-30
申请人： Suryanarayana Kaja , Srinivasa N. Reddy , Donald Rene Wall
发明人： Suryanarayana Kaja , Srinivasa N. Reddy , Donald Rene Wall
IPC分类号： B23K1/19 , B23K35/00 , B23K35/30 , B23K20/22 , B23K31/02 , B23K35/24
CPC分类号： B23K1/19 , B23K35/005 , B23K35/3006 , B23K2201/40
摘要： A brazing method for the direct bonding of a metallic item to a refractory metal without the need for an adhesion layer. The direct brazing process uses a Cu--Ag--Ni alloy which eliminates the need for the steps of plating a refractory metal to be bonded to a metallic material with a nickel layer (or other nickel-containing adhesion layer) and diffusion annealing the plated refractory metal prior to brazing. The brazed joint produced by the direct brazing method between a refractory metal and a metallic item has a substantially reduced layer of nickel in the as-brazed joint which improves the mechanical properties of the joint.
摘要翻译：用于将金属物品直接接合到难熔金属而不需要粘合层的钎焊方法。直接钎焊工艺使用Cu-Ag-Ni合金，其不需要用镍层（或其它含镍粘合层）将待接合的难熔金属电镀到金属材料上，并且对镀层耐火材料进行扩散退火钎焊前的金属。在难熔金属和金属制品之间通过直接钎焊方法制造的钎焊接头在钎焊接头中具有大大降低的镍层，这提高了接头的机械性能。

10. 发明授权

US5549808A Method for forming capped copper electrical interconnects 失效
标题翻译：形成封盖铜电互连的方法
公开(公告)号：US5549808A
公开(公告)日：1996-08-27
申请号：US440413
申请日：1995-05-12
申请人： Mukta S. Farooq , Suryanarayana Kaja , Eric D. Perfecto , George E. White
发明人： Mukta S. Farooq , Suryanarayana Kaja , Eric D. Perfecto , George E. White
IPC分类号： H01L21/768 , H05K1/03 , H05K3/06 , H05K3/10 , H05K3/38 , C25D5/02 , H01L21/288
CPC分类号： H05K3/108 , H01L21/76886 , H05K1/0306 , H05K2203/0597 , H05K2203/1105 , H05K3/062 , H05K3/388 , Y10S205/917
摘要： The present invention relates generally to a new structure and method for capped copper electrical interconnects. More particularly, the invention encompasses a novel structure in which one or more of the copper electrical interconnects within a semiconductor substrate are capped to obtain a robust electrical interconnect structure. A method for obtaining such capped copper electrical interconnect structure is also disclosed. These capped interconnects can be a single layer or multi-layer structures. Similarly, the interconnect structure that is being capped can itself be composed of single or multi-layered material.
摘要翻译：本发明一般涉及一种用于封盖铜电互连的新结构和方法。更具体地，本发明包括一种新颖的结构，其中半导体衬底内的一个或多个铜电互连被封盖以获得坚固的电互连结构。还公开了一种用于获得这种封盖铜电互连结构的方法。这些封装的互连可以是单层或多层结构。类似地，被封装的互连结构本身可以由单层或多层材料组成。

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