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1. 发明授权

US06451704B1 Method for forming PLDD structure with minimized lateral dopant diffusion 有权
标题翻译：用最小化横向掺杂剂扩散形成PLDD结构的方法
公开(公告)号：US06451704B1
公开(公告)日：2002-09-17
申请号：US09849672
申请日：2001-05-07
申请人： Yelehanka Ramachandramurthy Pradeep , Subrahmanyam Chivukula , Jie Ye , Madhudsudan Mukhopdhyay
发明人： Yelehanka Ramachandramurthy Pradeep , Subrahmanyam Chivukula , Jie Ye , Madhudsudan Mukhopdhyay
IPC分类号： H01L2100
CPC分类号： H01L29/6659 , H01L21/823814 , H01L29/6656
摘要： A new method is provided for the creation of PLDD regions that is aimed at reducing lateral p-type impurity diffusion. The process starts with a silicon substrate on the surface of which gate electrodes have been created. An NLDD implantation is performed self-aligned with the NMOS gate electrode, a layer of oxide (oxide liner) is deposited over the structure over which a layer of nitride is deposited over which a first layer of top oxide is deposited. First gate spacers are formed by etching the first layer of top oxide, stopping on the nitride layer. NS/D and PS/D implantations are performed self-aligned with respectively the NMOS and the PMOS devices, the S/D implantations are annealed. The first gate oxide spacers are removed, a PLDD implantation is performed self-aligned with the PMOS gate electrode. A second layer of top oxide is deposited over the structure and etched to form the second gate spacers on the sidewalls of the NMOS and PMOS gate electrodes. After this sequence of processing steps has been completed, the gate electrodes can be completed following conventional methods of gate electrode processing.
摘要翻译：提供了一种用于创建旨在减少横向p型杂质扩散的PLDD区域的新方法。该工艺从在其上形成栅电极的表面上的硅衬底开始。执行NIGD注入与NMOS栅电极自对准，一层氧化物（氧化物衬垫）沉积在其上沉积有一层氮化物的结构上，第一层顶层氧化物沉积在该层上。通过蚀刻顶部氧化物的第一层，停止在氮化物层上形成第一栅极间隔物。 NS / D和PS / D注入分别与NMOS和PMOS器件自对准，S / D注入退火。去除第一栅极氧化物间隔物，执行PLDD注入与PMOS栅电极自对准。在结构上沉积第二层顶部氧化物，并被蚀刻以在NMOS和PMOS栅电极的侧壁上形成第二栅极间隔物。在该处理步骤顺序完成之后，可以按照常规的栅电极处理方法来完成栅电极。

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