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    • 1. 发明授权
    • Gated transmission line model structure for characterization of
field-effect transistors
    • 用于表征场效应晶体管的门控传输线模型结构
    • US4638341A
    • 1987-01-20
    • US647769
    • 1984-09-06
    • Steven M. BaierNicholas C. Cirillo, Jr.Steven A. HankaMichael S. Shur
    • Steven M. BaierNicholas C. Cirillo, Jr.Steven A. HankaMichael S. Shur
    • G01R27/02G01R31/26H01L27/06H01L27/095H01L29/48H01L29/56H01L29/64
    • H01L27/0605G01R27/02G01R31/2621H01L27/095
    • The gated Transmission Line Model (GTLM) structure is a novel characterization device and measurement tool for integrated circuit process monitoring. This test structure has Schottky gates between the ohmic contacts of a TLM pattern. The gate lengths are varied and the gate-to- ohmic separations are kept constant to provide an accurate determination of several important FET channel parameters. It offers a precise method for measuring the FET source resistance which requires no parameter fitting and which works equally well on planar, self-aligned gate, and recessed gate FET's. In addition, the GTLM structure offers the only available means to measure sheet resistance of enhancement-mode FET channels. The gated-TLM structure can also be used to find the effective free surface potential. The structure may be combined with capacitance-voltage analysis or geometric magnetoresistance analysis to create mobility and doping profile of actual FET channels. Further, the GTLM structure may be implemented in any existing semiconductor FET technology, including silicon, GaAs, and modulation-doped structures.
    • 门控传输线模型(GTLM)结构是一种用于集成电路过程监控的新型表征设备和测量工具。 该测试结构在TLM图案的欧姆接触之间具有肖特基门。 栅极长度是变化的,并且栅极 - 欧姆分离保持恒定以提供几个重要的FET沟道参数的精确确定。 它提供了一种用于测量FET源电阻的精确方法,该方法不需要参数拟合,并且在平面,自对准栅极和凹陷栅极FET上同样适用。 此外,GTLM结构提供了唯一可用于测量增强型FET通道的薄层电阻的方法。 门控TLM结构也可用于找到有效的自由表面电位。 该结构可以与电容电压分析或几何磁阻分析结合,以产生实际FET通道的迁移率和掺杂分布。 此外,GTLM结构可以在任何现有的半导体FET技术中实现,包括硅,GaAs和调制掺杂结构。