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1. 发明授权

US06967174B1 Wafer chuck for use in edge bevel removal of copper from silicon wafers 有权
标题翻译：用于从硅晶片去除铜的边缘斜面的晶片卡盘
公开(公告)号：US06967174B1
公开(公告)日：2005-11-22
申请号：US10357999
申请日：2003-02-03
申请人： Steven T. Mayer , Steve Taatjes , Andy McCutcheon , Jim Schall , Jingbin Feng
发明人： Steven T. Mayer , Steve Taatjes , Andy McCutcheon , Jim Schall , Jingbin Feng
IPC分类号： H01L21/00 , H01L21/302
CPC分类号： H01L21/6708 , H01L21/67051
摘要： A wafer chuck includes alignment members that allows a semiconductor wafer to be properly aligned on the chuck without using a separate alignment stage. The alignment members may be cams, for example, attached to arms of the wafer chuck. These members may assume an alignment position when a robot arm places the wafer on the chuck. In this position, they guide the wafer into a proper alignment position with respect to the chuck. During rotation at a particular rotational speed, the alignment members move away from the wafer to allow liquid etchant to flow over the entire edge region of the wafer. At still higher rotational speeds, the wafer is clamped into position to prevent it from flying off the chuck. A clamping cam or other device (such as the alignment member itself) may provide the clamping.
摘要翻译：晶片卡盘包括对准部件，其允许半导体晶片在不使用单独的对准阶段的情况下适当地对准卡盘。对准构件可以是凸轮，例如，附接到晶片卡盘的臂。当机器人臂将晶片放置在卡盘上时，这些构件可以采取对准位置。在这个位置上，它们将晶片引导到相对于卡盘的适当对准位置。在以特定转速旋转期间，对准构件远离晶片移动以允许液体蚀刻剂流过晶片的整个边缘区域。在更高的旋转速度下，晶片被夹紧就位以防止其从卡盘上飞走。夹紧凸轮或其他装置（例如对准构件本身）可以提供夹紧。

2. 发明授权

US06402923B1 Method and apparatus for uniform electroplating of integrated circuits using a variable field shaping element 有权
标题翻译：使用可变场成形元件对集成电路进行均匀电镀的方法和装置
公开(公告)号：US06402923B1
公开(公告)日：2002-06-11
申请号：US09537467
申请日：2000-03-27
申请人： Steven T. Mayer , Richard Hill , Alain Harrus , Evan Patton , Robert Contolini , Steve Taatjes , Jon Reid
发明人： Steven T. Mayer , Richard Hill , Alain Harrus , Evan Patton , Robert Contolini , Steve Taatjes , Jon Reid
IPC分类号： C25D500
CPC分类号： C25D17/08 , C25D7/123 , C25D17/001 , C25D17/008 , C25D17/12 , Y10S204/07
摘要： An electrochemical reactor is used to electrofill damascene architecture for integrated circuits. A shield is used to screen the applied field during electroplating operations to compensate for potential drop along the radius of a wafer. The shield establishes an inverse potential drop in the electrolytic fluid to overcome the resistance of a thin film seed layer of copper on the wafer.
摘要翻译：电化学反应器用于集成电路的大马士革结构。在电镀操作期间使用屏蔽来屏蔽施加的场，以补偿沿着晶片半径的电位降。屏蔽层在电解液中建立反向电位降，以克服晶片上铜的薄膜晶种层的电阻。

3. 发明授权

US06193859B1 Electric potential shaping apparatus for holding a semiconductor wafer during electroplating 失效
标题翻译：电镀期间保持半导体晶片的电位成形装置
公开(公告)号：US06193859B1
公开(公告)日：2001-02-27
申请号：US09074624
申请日：1998-05-07
申请人： Robert J. Contolini , Jonathan Reid , Evan Patton , Jingbin Feng , Steve Taatjes , John Owen Dukovic
发明人： Robert J. Contolini , Jonathan Reid , Evan Patton , Jingbin Feng , Steve Taatjes , John Owen Dukovic
IPC分类号： C25D1700
CPC分类号： C25D7/12 , C25D17/001
摘要： An apparatus for depositing an electrically conductive layer on the surface of a wafer comprises a flange. The flange has a cylindrical wall and an annulus attached to a first end of the cylindrical wall. The annulus shields the edge region of the wafer surface during electroplating reducing the thickness of the deposited electrically conductive layer on the edge region. Further, the cylindrical wall of the flange can be provided with a plurality of apertures adjacent the wafer allowing gas bubbles entrapped on the wafer surface to readily escape.
摘要翻译：用于在晶片表面上沉积导电层的设备包括凸缘。凸缘具有圆柱形壁和连接到圆柱形壁的第一端的环形空间。在电镀过程中，环形屏蔽了晶片表面的边缘区域，从而减小了边缘区域上沉积的导电层的厚度。此外，凸缘的圆柱形壁可以设置有与晶片相邻的多个孔，允许夹在晶片表面上的气泡容易地逸出。

4. 发明授权

US06537416B1 Wafer chuck for use in edge bevel removal of copper from silicon wafers 有权
标题翻译：用于从硅晶片去除铜的边缘斜面的晶片卡盘
公开(公告)号：US06537416B1
公开(公告)日：2003-03-25
申请号：US09558249
申请日：2000-04-25
申请人： Steven T. Mayer , Steve Taatjes , Andy McCutcheon , Jim Schall , Jinbin Feng
发明人： Steven T. Mayer , Steve Taatjes , Andy McCutcheon , Jim Schall , Jinbin Feng
IPC分类号： C23F100
CPC分类号： H01L21/6708 , H01L21/67051
摘要： A wafer chuck includes alignment members that allows a semiconductor wafer to be properly aligned on the chuck without using a separate alignment stage. The alignment members may be cams, for example, attached to arms of the wafer chuck. These members may assume an alignment position when a robot arm places the wafer on the chuck. In this position, they guide the wafer into a proper alignment position with respect to the chuck. During rotation at a particular rotational speed, the alignment members move away from the wafer to allow liquid etchant to flow over the entire edge region of the wafer. At still higher rotational speeds, the wafer is clamped into position to prevent it from flying off the chuck. A clamping cam or other device (such as the alignment member itself) may provide the clamping.
摘要翻译：晶片卡盘包括对准部件，其允许半导体晶片在不使用单独的对准阶段的情况下适当地对准卡盘。对准构件可以是凸轮，例如，附接到晶片卡盘的臂。当机器人臂将晶片放置在卡盘上时，这些构件可以采取对准位置。在这个位置上，它们将晶片引导到相对于卡盘的适当对准位置。在以特定转速旋转期间，对准构件远离晶片移动以允许液体蚀刻剂流过晶片的整个边缘区域。在更高的旋转速度下，晶片被夹紧就位以防止其从卡盘上飞走。夹紧凸轮或其他装置（例如对准构件本身）可以提供夹紧。

5. 发明授权

US06179983B2 Method and apparatus for treating surface including virtual anode 失效
标题翻译：用于处理包括虚拟阳极的表面的方法和装置
公开(公告)号：US06179983B2
公开(公告)日：2001-01-30
申请号：US08969267
申请日：1997-11-13
申请人： Jonathan David Reid , Steve Taatjes
发明人： Jonathan David Reid , Steve Taatjes
IPC分类号： C25D500
CPC分类号： C25D7/123 , C25D17/001 , C25D17/007 , C25D17/12 , Y10S204/07
摘要： An apparatus for depositing an electrical conductive layer on the surface of a wafer includes a virtual anode located between the actual anode and the wafer. The virtual anode modifies the electric current flux and plating solution flow between the actual anode and the wafer to thereby modify the thickness profile of the deposited electrically conductive layer on the wafer. The virtual anode can have openings through which the electrical current flux passes. By selectively varying the radius, length, or both, of the openings, any desired thickness profile of the deposited electrically conductive layer on the wafer can be readily obtained.
摘要翻译：用于在晶片表面上沉积导电层的装置包括位于实际阳极和晶片之间的虚拟阳极。虚拟阳极改变实际阳极和晶片之间的电流通量和电镀液流动，从而改变晶片上沉积的导电层的厚度分布。虚拟阳极可以具有电流通过的开口。通过选择性地改变开口的半径，长度或两者，可以容易地获得晶片上沉积的导电层的任何期望的厚度分布。

6. 发明授权

US6159354A Electric potential shaping method for electroplating 失效
标题翻译：电镀电位成形方法
公开(公告)号：US6159354A
公开(公告)日：2000-12-12
申请号：US970120
申请日：1997-11-13
申请人： Robert J. Contolini , Jonathan Reid , Evan Patton , Jingbin Feng , Steve Taatjes , John Owen Dukovic
发明人： Robert J. Contolini , Jonathan Reid , Evan Patton , Jingbin Feng , Steve Taatjes , John Owen Dukovic
IPC分类号： C25D7/12 , C25D5/00 , C25D3/38 , C25D5/20 , C25D7/04
CPC分类号： C25D7/12 , C25D17/001
摘要： An apparatus for depositing an electrically conductive layer on the surface of a wafer comprises a flange. The flange has a cylindrical wall and an annulus attached to a first end of the cylindrical wall. The annulus shields the edge region of the wafer surface during electroplating reducing the thickness of the deposited electrically conductive layer on the edge region. Further, the cylindrical wall of the flange can be provided with a plurality of apertures adjacent the wafer allowing gas bubbles entrapped on the wafer surface to readily escape.
摘要翻译：用于在晶片表面上沉积导电层的设备包括凸缘。凸缘具有圆柱形壁和连接到圆柱形壁的第一端的环形空间。在电镀过程中，环形屏蔽了晶片表面的边缘区域，从而减小了边缘区域上沉积的导电层的厚度。此外，凸缘的圆柱形壁可以设置有与晶片相邻的多个孔，允许夹在晶片表面上的气泡容易地逸出。

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